Patents by Inventor Douglas J. Cutter

Douglas J. Cutter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6255894
    Abstract: A programmable circuit includes a first node and provides a programmed signal based on the state of the first node. A first anti-fuse has a programmed state and an unprogrammed state and couples the first node to a first power supply when in the programmed state and decouples the first node from the first power supply when in the unprogrammed state. A second anti-fuse has a programmed state and an unprogrammed state and couples the first node to a second power supply when in the programmed state and decouples the first node from the second power supply when in the unprogrammed state. The state of the programmed signal can be used to replace a primary circuit element of an integrated circuit with a redundant circuit element.
    Type: Grant
    Filed: August 9, 1999
    Date of Patent: July 3, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Douglas J. Cutter, Kurt D. Beigel, Fan Ho
  • Patent number: 6198676
    Abstract: As part of a memory array, a circuit is provided for altering the drive applied to an access transistor that regulates electrical communication within the memory array. In one embodiment, the circuit is used to alter the drive applied to a sense amp's voltage-pulling transistor, thereby allowing modification of the voltage-pulling rate for components of the sense amp. A sample of test data is written to the memory array and read several times at varying drive rates in order to determine the sense amp's ability to accommodate external circuitry. In another embodiment, the circuit is used to alter the drive applied to a bleeder device that regulates communication between the digit lines of the memory array and its cell plate. Slowing said communication allows defects within the memory array to have a more pronounced effect and hence increases the chances of finding such defects during testing.
    Type: Grant
    Filed: January 11, 2000
    Date of Patent: March 6, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Kurt D. Beigel, Douglas J. Cutter, Manny K. Ma, Gordon D. Roberts, James E. Miller, Daryl L. Habersetzer, Jeffrey D. Bruce, Eric T. Stubbs
  • Patent number: 6194738
    Abstract: An integrated circuit memory device has a plurality of nonvolatile programmable elements which are used to store a pass/fail status bit at selected milestones in a test sequence. At selected points in the test process an element may be programmed to indicate that the device has passed the tests associated with the selected point in the process. Prior to performing further tests on the device, the element is read to verify that it passed previous tests in the test process. If the appropriate elements are not programmed, the device is rejected. A rejected device may be retested according to the previous test steps. Laser fuses, electrically programmable fuses or antifuses are used to store test results. The use of electrically writeable nonvolatile memory elements allows for programming of the elements after the device has been packaged.
    Type: Grant
    Filed: February 27, 1998
    Date of Patent: February 27, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Brett Debenham, Kim Pierce, Douglas J. Cutter, Kurt Beigel, Fan Ho, Patrick J. Mullarkey, Dien Luong, Hua Zheng, Michael Shore, Jeffrey P. Wright, Adrian E. Ong, Todd A. Merritt
  • Patent number: 6185705
    Abstract: Method and apparatus are disclosed for checking the resistance of antifuse elements in an integrated circuit. A voltage based on the resistance of an antifuse element is compared to a voltage based on a known resistance, and an output signal is generated whose binary value indicates whether the resistance of the antifuse element is higher or lower than the known value of resistance. The method and apparatus are useful in verifying the programming of antifuse elements.
    Type: Grant
    Filed: March 7, 1997
    Date of Patent: February 6, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Douglas J. Cutter, Adrian E. Ong, Fan Ho, Kurt D. Beigel, Brett M. Debenham, Dien Luong, Kim Pierce, Patrick J. Mullarkey
  • Patent number: 6181617
    Abstract: As part of a memory array, a circuit is provided for altering the drive applied to an access transistor that regulates electrical communication within the memory array. In one embodiment, the circuit is used to alter the drive applied to a sense amp's voltage-pulling transistor, thereby allowing modification of the voltage-pulling rate for components of the sense amp. A sample of test data is written to the memory array and read several times at varying drive rates in order to determine the sense amp's ability to accommodate external circuitry. In another embodiment, the circuit is used to alter the drive applied to a bleeder device that regulates communication between the digit lines of the memory array and its cell plate. Slowing said communication allows defects within the memory array to have a more pronounced effect and hence increases the chances of finding such defects during testing.
    Type: Grant
    Filed: January 14, 2000
    Date of Patent: January 30, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Kurt D. Beigel, Douglas J. Cutter, Manny K. Ma, Gordon D. Roberts, James E. Miller, Daryl L. Habersetzer, Jeffrey D Bruce, Eric T. Stubbs
  • Patent number: 6154398
    Abstract: A programmable circuit includes a first node and provides a programmed signal based on the state of the first node. A first anti-fuse has a programmed state and an unprogrammed state and couples the first node to a first power supply when in the programmed state and decouples the first node from the first power supply when in the unprogrammed state. A second anti-fuse has a programmed state and an unprogrammed state and couples the first node to a second power supply when in the programmed state and decouples the first node from the second power supply when in the unprogrammed state. The state of the programmed signal can be used to replace a primary circuit element of an integrated circuit with a redundant circuit element.
    Type: Grant
    Filed: July 18, 1997
    Date of Patent: November 28, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Douglas J. Cutter, Kurt D. Beigel, Fan Ho
  • Patent number: 6154410
    Abstract: Method and apparatus are disclosed for reducing antifuse programming time by connecting the programming voltage to the electrode of the antifuse element that has roughened polysilicon.
    Type: Grant
    Filed: February 5, 1997
    Date of Patent: November 28, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Douglas J. Cutter, Kurt D. Beigel, Adrian E. Ong, Fan Ho, Patrick J. Mullarkey, Dien Luong, Brett Debenham, Kim Pierce
  • Patent number: 6128240
    Abstract: The cancellation of a redundant element of an integrated circuit with a cancel bank is disclosed. In one embodiment, a fuse or antifuse bank is coupled to the redundant element and permanently programmed to respond to the address of a defective primary element. If the redundant element is found to be defective, the fuse or antifuse bank is canceled, and a result the redundant element is also canceled. A cancel line of the fuse or antifuse bank, along with the cancel line of each of a plurality of other fuse or antifuse banks, is coupled to a cancel bank. The cancel bank comprises a multiplexer and a plurality of cancel antifuses less in number than the number of fuse or antifuse banks. The cancel antifuses are selectively enabled such that the fuse or antifuse bank coupled to the defective redundant element may be canceled.
    Type: Grant
    Filed: January 5, 1999
    Date of Patent: October 3, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Douglas J. Cutter, Fan Ho, Kurt D. Beigel
  • Patent number: 6069064
    Abstract: A method and apparatus for forming a junctionless antifuse semiconductor structure comprises forming an antifuse in non-active areas of a semiconductor wafer. In one embodiment, the antifuse is formed over a polysilicon layer, which is coupled to a field oxide layer. In a further embodiment, the polysilicon layer comprises a bottom conductor layer in the antifuse. In another embodiment, a refractory metal silicide layer is formed between the polysilicon layer and the antifuse. In yet a further embodiment, the refractory metal silicide layer comprises the bottom conductor layer in the antifuse.
    Type: Grant
    Filed: August 26, 1996
    Date of Patent: May 30, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Douglas J. Cutter, Fan Ho, Kurt D. Beigel
  • Patent number: 6052322
    Abstract: As part of a memory array, a circuit is provided for altering the drive applied to an access transistor that regulates electrical communication within the memory array. In one embodiment, the circuit is used to alter the drive applied to a sense amp's voltage-pulling transistor, thereby allowing modification of the voltage-pulling rate for components of the sense amp. A sample of test data is written to the memory array and read several times at varying drive rates in order to determine the sense amp's ability to accommodate external circuitry. In another embodiment, the circuit is used to alter the drive applied to a bleeder device that regulates communication between the digit lines of the memory array and its cell plate. Slowing said communication allows defects within the memory array to have a more pronounced effect and hence increases the chances of finding such defects during testing.
    Type: Grant
    Filed: July 28, 1999
    Date of Patent: April 18, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Kurt D. Beigel, Douglas J. Cutter, Manny K. Ma, Gordon D. Roberts, James E. Miller, Daryl L. Habersetzer, Jeffrey D. Bruce, Eric T. Stubbs
  • Patent number: 6026040
    Abstract: As part of a memory array, a circuit is provided for altering the drive applied to an access transistor that regulates electrical communication within the memory array. In one embodiment, the circuit is used to alter the drive applied to a sense amp's voltage-pulling transistor, thereby allowing modification of the voltage-pulling rate for components of the sense amp. A sample of test data is written to the memory array and read several times at varying drive rates in order to determine the sense amp's ability to accommodate external circuitry. In another embodiment, the circuit is used to alter the drive applied to a bleeder device that regulates communication between the digit lines of the memory array and its cell plate. Slowing said communication allows defects within the memory array to have a more pronounced effect and hence increases the chances of finding such defects during testing.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: February 15, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Kurt D. Beigel, Douglas J. Cutter, Manny K. Ma, Gordon D. Roberts, James E. Miller, Daryl L. Habersetzer, Jeffrey D. Bruce, Eric T. Stubbs
  • Patent number: 6023431
    Abstract: A programmable circuit includes a first node and provides a programmed signal based on the state of the first node. A first anti-fuse has a programmed state and an unprogrammed state and couples the first node to a first power supply when in the programmed state and decouples the first node from the first power supply when in the unprogrammed state. A second anti-fuse has a programmed state and an unprogrammed state and couples the first node to a second power supply when in the programmed state and decouples the first node from the second power supply when in the unprogrammed state. The state of the programmed signal can be used to replace a primary circuit element of an integrated circuit with a redundant circuit element.
    Type: Grant
    Filed: October 3, 1996
    Date of Patent: February 8, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Douglas J. Cutter, Kurt D. Beigel, Fan Ho
  • Patent number: 6011736
    Abstract: As part of a memory array, a circuit is provided for altering the drive applied to an access transistor that regulates electrical communication within the memory array. In one embodiment, the circuit is used to alter the drive applied to a sense amp's voltage-pulling transistor, thereby allowing modification of the voltage-pulling rate for components of the sense amp. A sample of test data is written to the memory array and read several times at varying drive rates in order to determine the sense amp's ability to accommodate external circuitry. In another embodiment, the circuit is used to alter the drive applied to a bleeder device that regulates communication between the digit lines of the memory array and its cell plate. Slowing said communication allows defects within the memory array to have a more pronounced effect and hence increases the chances of finding such defects during testing.
    Type: Grant
    Filed: February 25, 1999
    Date of Patent: January 4, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Kurt D. Beigel, Douglas J. Cutter
  • Patent number: 5998069
    Abstract: An electronically programmed mask is connected to an electronic device, such as a processor. In operation, a mask design is first entered into the processor. The processor controls a display of an image on the electronically programmed mask, wherein the display replicates conventional type masks. The electronically programmed mask is designed such that the display presented on its screen provides optical contrast and characteristics that are easily changed or reprogrammed by the processor. Electronically controlled masks provide the same patterns as mechanical type masks without requiring rigid, permanent type structures to form a desired pattern.
    Type: Grant
    Filed: February 27, 1997
    Date of Patent: December 7, 1999
    Assignee: Micron Technology, Inc.
    Inventors: Douglas J. Cutter, Christophe Pierrat
  • Patent number: 5991187
    Abstract: An integrated semiconductor junction antifuse is formed from either adjacent regions of opposite doping types or spaced apart regions of similar doping type within a substrate. In its unblown state, the junction antifuse forms an open circuit that blocks current from flowing while in the blown state, the junction antifuse conducts current. The junction antifuse is blown by applying a breakdown voltage sufficient to overcome a semiconductor junction so that current flows across the reverse-biased semiconductor junction. As current flows across the reverse-biased junction, dopant migration forms a conductive path so that the junction antifuse no longer forms an open circuit.
    Type: Grant
    Filed: December 7, 1998
    Date of Patent: November 23, 1999
    Assignee: Micron Technology, Inc.
    Inventors: Douglas J. Cutter, Kurt D. Beigel
  • Patent number: 5982686
    Abstract: As part of a memory array, a circuit is provided for altering the drive applied to an access transistor that regulates electrical communication within the memory array. In one embodiment, the circuit is used to alter the drive applied to a sense amp's voltage-pulling transistor, thereby allowing modification of the voltage-pulling rate for components of the sense amp. A sample of test data is written to the memory array and read several times at varying drive rates in order to determine the sense amp's ability to accommodate external circuitry. In another embodiment, the circuit is used to alter the drive applied to a bleeder device that regulates communication between the digit lines of the memory array and its cell plate. Slowing said communication allows defects within the memory array to have a more pronounced effect and hence increases the chances of finding such defects during testing.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: November 9, 1999
    Assignee: Micron Technology, Inc.
    Inventors: Kurt D. Beigel, Douglas J. Cutter
  • Patent number: 5982656
    Abstract: Method and apparatus are disclosed for checking the resistance of programmable circuits in an integrated circuit where each programmable circuit includes a programmable element, such as an antifuse. A precharged node is connected to the programmable element and the voltage at the node discharges based on the resistance of the programmable element. An output signal is produced whose binary value is based on the voltage at the node after a sufficient time has elapsed to allow the initial voltage to discharge based on the resistance of the programmable element.
    Type: Grant
    Filed: March 7, 1997
    Date of Patent: November 9, 1999
    Assignee: Micron Technology, Inc.
    Inventors: Douglas J. Cutter, Fan Ho, Kurt D. Beigel, Brett M. Debenham, Dien Luong, Kim Pierce, Patrick J. Mullarkey
  • Patent number: 5973978
    Abstract: A programmable circuit in an integrated circuit provides a programmed signal, which is based on the state of a first node. An anti-fuse includes a first terminal coupled to the first node and a second terminal coupled to a programming bus. An anti-fuse programming pad is coupled to the first programming bus for permitting a sufficient voltage to short the first anti-fuse to be applied to the first programming bus from external to the integrated circuit. The state of the programmed signal can be used to replace a primary circuit element in the integrated circuit, such a row or column of memory cells in a memory integrated circuit, with a redundant circuit element.
    Type: Grant
    Filed: August 28, 1998
    Date of Patent: October 26, 1999
    Assignee: Micron Technology, Inc.
    Inventors: Douglas J. Cutter, Fan Ho, Kurt D. Beigel
  • Patent number: 5973380
    Abstract: An integrated semiconductor junction antifuse is formed from either adjacent regions of opposite doping types or spaced apart regions of similar doping type within a substrate. In its unblown state, the junction antifuse forms an open circuit that blocks current from flowing while in the blown state, the junction antifuse conducts current. The junction antifuse is blown by applying a breakdown voltage sufficient to overcome a semiconductor junction so that current flows across the reverse-biased semiconductor junction. As current flows across the reverse-biased junction, dopant migration forms a conductive path so that the junction antifuse no longer forms an open circuit.
    Type: Grant
    Filed: December 7, 1998
    Date of Patent: October 26, 1999
    Assignee: Micron Technology, Inc.
    Inventors: Douglas J. Cutter, Kurt D. Beigel
  • Patent number: 5877993
    Abstract: As part of a memory array, a circuit is provided for altering the drive applied to an access transistor that regulates electrical communication within the memory array. In one embodiment, the circuit is used to alter the drive applied to a sense amp's voltage-pulling transistor, thereby allowing modification of the voltage-pulling rate for components of the sense amp. A sample of test data is written to the memory array and read several times at varying drive rates in order to determine the sense amp's ability to accommodate external circuitry. In another embodiment, the circuit is used to alter the drive applied to a bleeder device that regulates communication between the digit lines of the memory array and its cell plate. Slowing said communication allows defects within the memory array to have a more pronounced effect and hence increases the chances of finding such defects during testing.
    Type: Grant
    Filed: May 13, 1997
    Date of Patent: March 2, 1999
    Assignee: Micron Technology, Inc.
    Inventors: Kurt D. Biegel, Douglas J. Cutter, Manny K. Ma, Gordon D. Roberts, James E. Miller, Daryl L. Habersetzer, Jeffrey D. Bruce, Eric T. Stubbs