Abstract: Power semiconductor devices comprise a silicon carbide based semiconductor layer structure including an active region defined therein and a gate bond pad that is on the semiconductor layer structure and vertically overlaps the active region.

Abstract: A system for creating an output comprises a processing unit, a user input module operably connected to the processing unit, and a display operably connected to the processing unit. The processing unit provides on the display: a grid image comprising multiple cells, each cell representing a duration of time; and a selection area comprising multiple select icons, each select icon representing a source data file. The processing unit is configured such that a user can create a grid layout representing the correlation between individual selected source data files and one, two, or more of the multiple cells. The processing unit produces the output based on the correlation.

Abstract: Semiconductor devices, and more particularly semiconductor devices with improved edge termination structures are disclosed. A semiconductor device includes a drift region that forms part of an active region. An edge termination region is arranged along a perimeter of the active region and also includes a portion of the drift region. The edge termination region includes one or more sub-regions of an opposite doping type than the drift region and one or more electrodes may be capacitively coupled to the drift region by way of the one or more sub-regions. During a forward blocking mode for the semiconductor device, the one or more electrodes may provide a path that draws ions away from passivation layers that are on the edge termination region and away from the active region. In this manner, the semiconductor device may exhibit reduced leakage, particularly at higher operating voltages and higher associated operating temperatures.

Abstract: Computer-implemented methods, systems and products, the method comprising receiving, at a data server associated with a database, a command for data transfer between a client machine and the data server over a communications network, the data being stored in at least a data table comprising one or more columns; in response to receiving the command for data transfer, determining whether one or more columns of the data table are designated; identifying the one or more designated columns, such that data associated with the one or more designated columns is either considered or not considered for purpose of the data transfer; and executing the command to transfer the data in the database according to the designated columns.

Abstract: A transistor semiconductor die includes a first current terminal, a second current terminal, and a control terminal. A semiconductor structure is between the first current terminal, the second current terminal, and the control terminal and configured such that a resistance between the first current terminal and the second current terminal is based on a control signal provided at the control terminal. Short circuit protection circuitry is coupled between the control terminal and the second current terminal. In a normal mode of operation, the short circuit protection circuitry is configured to provide a voltage drop that is greater than a voltage of the control signal. In a short circuit protection mode of operation, the short circuit protection circuitry is configured to provide a voltage drop that is less than a voltage of the control signal.

Abstract: A vehicle suspension arrangement includes a suspension slider assembly including first and second laterally spaced longitudinal frame members configured to be slidably coupled to a first vehicle frame member, first and second gusset members fixed to the first and second longitudinal frame members and each including a relief, a first lateral frame member extending between the first and second longitudinal frame members, the first lateral frame member having ends received within the reliefs, an axle member configured to support a pair of wheel assemblies, and a suspension assembly configured to support the suspension slider assembly from the axle member, the suspension assembly including a spring member positioned between the suspension slider assembly and the axle member.

Abstract: Systems and methods for establishing a connection with an edge application server are provided. A user equipment (UE) in a wireless communication network establishes a connection with an edge application server to offload the data processing of an application executing on the UE to the edge application server. The UE communicates key performance indicators (KPIs) associated with the application to the edge data network. The KPIs indicate the resources that application uses to process the data. In response, the UE receives edge application server parameters from multiple servers in the edge data network that meet or exceed the KPIs. The parameters include compute, graphical compute, memory and storage parameters with various levels of specificity. The UE selects one of the edge application servers to process the data on behalf of the application based on the parameters.

Abstract: A vertical semiconductor device includes one or more of a substrate, a buffer layer over the substrate, one or more drift layers over the buffer layer, and a spreading layer over the one or more drift layers.

Abstract: Computer-implemented methods, systems and products, the method comprising receiving, at a data server associated with a database, a command for data transfer between a client machine and the data server over a communications network, the data being stored in at least a data table comprising one or more columns; in response to receiving the command for data transfer, determining whether one or more columns of the data table are designated; identifying the one or more designated columns, such that data associated with the one or more designated columns is either considered or not considered for purpose of the data transfer; and executing the command to transfer the data in the database according to the designated columns.

Abstract: An integrated circuit chip can provide protection with registers of a register file. A processor can be part of general or security-oriented (e.g., root-of-trust (RoT)) circuitry. In described implementations, the processor includes multiple register blocks for storing multiple register values. The processor also includes multiple integrity blocks for storing multiple integrity codes. A respective integrity block is associated with a respective register block. The respective integrity block can store a respective integrity code that is derived from a respective register value that is stored in the respective register block. The integrity code can enable detection or correction of one or more corrupted bits in the register value. An integrity controller of the processor can monitor the register value regularly or in response to an access by an execution unit. The controller can take a protective action if corruption is detected. This enables information protection to extend to processor execution units.

Abstract: A vertical semiconductor device includes one or more of a substrate, a buffer layer over the substrate, one or more drift layers over the buffer layer, and a spreading layer over the one or more drift layers.

Abstract: According to some embodiments, a fireproofing system for protecting an elongate member, comprising at least one inner layer configured to at least partially wrap around itself to form an inner passage, the at least one inner layer configured to generally resist heat, and an outer shell or member defining an interior opening, wherein the first layer is configured to be positioned within the interior opening of the outer shell or outer member, wherein an elongate member is configured to pass through the inner passage.

Abstract: Strategic placement and patterning of electrodes, vias, and metal runners can significantly reduce strain in a power semiconductor die. By modifying the path defining electrodes, vias, and metal runners, as well as patterning the material layers thereof, strain can be better managed to increase reliability of a power semiconductor die.

Abstract: A vertical semiconductor device includes a substrate, a buffer layer over the substrate, and a drift layer over the buffer layer. The substrate has a first doping type and a first doping concentration. The buffer layer has the first doping type and a second doping concentration that is less than the first doping concentration. The drift layer has the first doping type and a third doping concentration that is less than the second doping concentration.

Abstract: Apparatus for use in providing isolation, the apparatus including an isolation tent having a body including a roof member, at least one wall extending between a supporting surface and the roof member in use to thereby at least partially define an internal volume substantially isolated from a surrounding environment, a plurality of connectors coupled to the body, the plurality of connectors being adapted to physically attach the body to a frame and an electrical component electrically connected to at least one of the plurality of connectors to allow electrical signals to be transferred to or from the electrical component via the connector.

Abstract: Wafer images and related alignment methods for crystalline wafers are disclosed. Certain aspects relate to accessing and aligning images of a same or similar crystalline wafer captured from different imaging sources. Alignment may include determining spatial differences between shared crystalline features in various wafer images of the same or similar crystalline wafer and transforming at least one of the images according to the determined spatial differences. With sufficient alignment, information may be associated and/or transferred between the various images, thereby providing the capability of forming a combined wafer image and sub-images thereof with high resolution and spatial coordination between different image sources. Certain aspects relate to development of nondestructive, high fidelity defect characterization and/or dislocation counting methods in crystalline materials based on modern deep convolutional neural networks (DCNN).

Abstract: Semiconductor devices, and in particular semiconductor devices for improved resistance measurements and related methods are disclosed. Contact structures for semiconductor devices are disclosed that provide access to resistance measurements with reduced influence of testing-related resistances, thereby improving testing accuracy, particularly for semiconductor devices with low on-resistance ratings. A semiconductor device may include an active region and an inactive region that is arranged along a perimeter of the active region. The semiconductor device may be arranged with a topside contact to provide access for resistance measurements, for example Kelvin-sensing resistance measurements. Related methods include performing resistance measurements from a topside of the semiconductor device, even when the active region of the semiconductor device forms a vertical contact structure.

Abstract: Compounds are provided that antagonize the kappa-opioid receptor (KOR) and products containing such compounds, as well as to methods of their use and synthesis. Such compounds have the structure of Formula (I), or a pharmaceutically acceptable isomer, racemate, hydrate, solvate, isotope or salt thereof. wherein X, Y, R1, R2, R4, R5, R6, R7, R8 and R11 are as defined herein.

Abstract: Semiconductor devices, and in particular protection structures for semiconductor devices that include sensor arrangements are disclosed. A semiconductor device may include a sensor region, for example a current sensor region that occupies a portion of an overall active area of the device. The current sensor region may be configured to provide monitoring of device load currents during operation. Semiconductor devices according to the present disclosure include one or more protection structures that are configured to allow the semiconductor devices to withstand transient voltage events without device failure. A protection structure may include an insulating layer that is provided in a transition region between a device region and the sensor region of the semiconductor device. In the example of an insulated gate semiconductor device, the insulating layer of the protection structure may include a material with a greater breakdown voltage than a breakdown voltage of a gate insulating layer.

Abstract: Semiconductor devices, and more particularly passivation structures for semiconductor devices are disclosed. A semiconductor device may include an active region, an edge termination region that is arranged along a perimeter of the active region, and a passivation structure that may form a die seal along the edge termination region. The passivation structure may include a number of passivation layers in an arrangement that improves mechanical strength and adhesion of the passivation structure along the edge termination region. An interface formed by at least one of the passivation layers may be provided with a pattern that serves to more evenly distribute forces related to thermal expansion and contraction during power cycling, thereby reducing cracking and delamination in the passivation structure. A patterned layer may be at least partially embedded in the passivation structure in an arrangement that forms the corresponding pattern in overlying portions of the passivation structure.