Patents by Inventor Eiichi Nishimura

Eiichi Nishimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110033636
    Abstract: A substrate processing apparatus that enables an oxide layer and an organic layer to be removed efficiently. A substrate formed at its surface with an organic layer covered with the oxide layer is housed in a chemical reaction processing apparatus of the substrate processing apparatus, in which the oxide layer is subjected to chemical reaction with gas molecules, and thus a product is produced on the substrate surface. The substrate is heated in a chamber of a heat treatment apparatus of the substrate processing apparatus, whereby the product is vaporized and the organic layer is exposed. Microwaves are then introduced into the chamber into which oxygen gas is supplied, whereby there are produced oxygen radicals that decompose and remove the organic layer.
    Type: Application
    Filed: October 21, 2010
    Publication date: February 10, 2011
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Eiichi Nishimura, Takamichi Kikuchi
  • Patent number: 7871908
    Abstract: The method of manufacturing a semiconductor device comprising: forming a first hard mask layer and a second hard mask layer on the layer to be etched (S11); a first groove-forming mask pattern forming process for forming a groove-forming mask pattern which has a first pitch, is formed of the second hard mask layer, and is used as an etching mask when forming groove patterns(S12-S14); and a first concave portion-forming mask pattern forming process for etching the first hard mask layer using the second resist pattern as an etching mask, wherein the second resist pattern is formed of the second resist layer having an opening portion that has a fourth pitch and the first organic layer having an opening portion that is connected to an opening portion of the second resist layer and has a smaller size than the opening portion of the second resist layer (S15-S18).
    Type: Grant
    Filed: March 20, 2009
    Date of Patent: January 18, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Koichi Yatsuda, Eiichi Nishimura
  • Publication number: 20100269980
    Abstract: A plasma processing apparatus, for performing a plasma processing on a target substrate by generating an inductively coupled plasma of a processing gas in a depressurized processing chamber, includes: a mounting table; a gas supply unit; a gas exhaust unit; a planar high frequency antenna disposed opposite to the mounting table with a plate-shaped dielectric member therebetween and a shield member covering the high frequency antenna. The high frequency antenna includes an inner antenna element provided at a central portion of a region above the plate-shaped dielectric member and an outer antenna element provided at an edge portion to surround a periphery of the inner antenna element. Further, two ends of each of the antenna elements are open ends and the antenna elements are grounded at central points thereof or points close thereto to resonate at ½ wavelengths of high frequencies from individual high frequency power supplies.
    Type: Application
    Filed: April 28, 2010
    Publication date: October 28, 2010
    Applicants: TOKYO ELECTRON LIMITED, MEIKO Co., Ltd.
    Inventors: Eiichi NISHIMURA, Shimao Yoneyama
  • Publication number: 20100240217
    Abstract: A method of processing a substrate having a processing target layer and an organic film serving as a mask layer includes a mineralizing process of mineralizing the organic film. The mineralizing process includes an adsorption process for allowing a silicon-containing gas to be adsorbed onto a surface of the organic film; and an oxidation process for oxidizing the adsorbed silicon-containing gas to be converted into a silicon oxide film. A monovalent aminosilane is employed as the silicon-containing gas.
    Type: Application
    Filed: March 11, 2010
    Publication date: September 23, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masato KUSHIBIKI, Eiichi Nishimura
  • Publication number: 20100233883
    Abstract: A substrate processing method processes a substrate including a processing target film, an organic film provided on the processing target film and having a plurality of line-shaped portions having fine width, and a hard film covering the line-shaped portions and the processing target film exposed between the line-shaped portions. The method includes a first etching step of etching a part of the hard film to expose the organic film and portions of the processing target film between the line-shaped portions; an ashing step of selectively removing the exposed organic film; and a second etching step of etching a part of the remaining hard film.
    Type: Application
    Filed: March 10, 2010
    Publication date: September 16, 2010
    Applicant: TOKYO ELECTON LIMITED
    Inventors: Eiichi Nishimura, Masato Kushibiki, Fumiko Yamashita
  • Publication number: 20100233885
    Abstract: A method for processing a substrate including a processing target layer and an organic film, include: a deposition/trimming process of forming a reinforcement film on a surface of the organic film and, at the same time, trimming a line width of a line portion of the organic film constituting an opening pattern. The deposition/trimming process includes an adsorption process for allowing a silicon-containing gas to be adsorbed onto the surface of the organic film and an oxidation process in which the line width of the organic film is trimmed while the adsorbed silicon-containing gas is converted into a silicon oxide film. A monovalent aminosilane is employed as the silicon-containing gas.
    Type: Application
    Filed: March 9, 2010
    Publication date: September 16, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masato KUSHIBIKI, Eiichi Nishimura
  • Publication number: 20100206846
    Abstract: A substrate processing apparatus that can appropriately carry out desired plasma processing on a substrate. The substrate is accommodated in an accommodating chamber. An ion trap partitions the accommodating chamber into a plasma producing chamber and a substrate processing chamber. High-frequency antennas are disposed in the plasma producing chamber. A process gas is introduced into the plasma producing chamber. The substrate is mounted on a mounting stage disposed in the substrate processing chamber, and a bias voltage is applied to the mounting stage. The ion trap has grounded conductors and insulating materials covering surfaces of the conductors.
    Type: Application
    Filed: February 16, 2010
    Publication date: August 19, 2010
    Applicants: TOKYO ELECTRON LIMITED, Osaka University
    Inventors: Eiichi Nishimura, Masato Morishima, Morihiro Takanashi, Akitaka Shimizu, Yuichi Setsuhara
  • Publication number: 20100197143
    Abstract: A dry etching method for a silicon nitride film capable of improving throughput is provided. A dry etching method for dry-etching a silicon nitride film 103 includes dry-etching the silicon nitride film 103 without generating plasma by using a processing gas containing at least a hydrogen fluoride gas (HF gas) and a fluorine gas (F2 gas), with respect to a processing target object 100 including the silicon nitride film 103.
    Type: Application
    Filed: February 2, 2010
    Publication date: August 5, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Eiichi Nishimura, Yusuke Shimizu
  • Publication number: 20100170871
    Abstract: A disclosed fine pattern forming method includes steps of: forming patterns made of a first photoresist film, arranged at a first pitch on a film; trimming the patterns made of the first photoresist film; depositing a protection film on the patterns made of the first photoresist film on the trimmed patterns made of the first photoresist film, the protection film being made of reaction products of an etching gas, thereby obtaining first patterns; forming other patterns made of a second photoresist film, arranged at a second pitch, on the protection film, the other patterns made of the second photoresist film being shifted by half of the first pitch from the corresponding patterns made of the first photoresist film; trimming the other patterns made of the second photoresist film into second patterns; and etching the film using the first patterns and the second patterns.
    Type: Application
    Filed: January 4, 2010
    Publication date: July 8, 2010
    Inventors: TAKASHI SONE, Eiichi Nishimura
  • Publication number: 20100173493
    Abstract: The present invention provides a substrate processing method to process a substrate including at least a process layer, an intermediate layer, and a mask layer which are stacked in this order. The mask layer includes an aperture configured to expose a portion of the intermediate layer. The substrate processing method includes a material deposition step of depositing a material on a side surface of the aperture and exposing a portion of the process layer by etching the exposed portion of the intermediate layer by plasma generated from a deposit gas, and an etching step of etching the exposed portion of the process layer.
    Type: Application
    Filed: October 9, 2008
    Publication date: July 8, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masato Kushibiki, Eiichi Nishimura
  • Patent number: 7736942
    Abstract: A substrate processing apparatus is provided to enable to efficiently remove an oxide layer and an organic material layer. A third process unit (36) of a substrate processing apparatus (10) includes a box-shaped process vessel (chamber) (50), a nitrogen gas supply system (190) and an ozone gas supply system (191). The ozone gas supply system (191) includes an ozone gas supply unit (195) and an ozone gas supply pipe (196) connected to the ozone gas supply unit (195). The ozone gas supply pipe (196) has an ozone gas supply hole (197) having an opening arranged opposite to a wafer (W). The ozone gas supply unit (195) supplies an ozone (O3) gas into the chamber (50) through the ozone gas supply hole (197) via the ozone gas supply pipe (196).
    Type: Grant
    Filed: August 13, 2008
    Date of Patent: June 15, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Eiichi Nishimura, Takamichi Kikuchi
  • Publication number: 20100144155
    Abstract: The method of manufacturing a semiconductor device comprising: forming a first hard mask layer and a second hard mask layer on the layer to be etched (S11); a first groove-forming mask pattern forming process for forming a groove-forming mask pattern which has a first pitch, is formed of the second hard mask layer, and is used as an etching mask when forming groove patterns(S12-S14); and a first concave portion-forming mask pattern forming process for etching the first hard mask layer using the second resist pattern as an etching mask, wherein the second resist pattern is formed of the second resist layer having an opening portion that has a fourth pitch and the first organic layer having an opening portion that is connected to an opening portion of the second resist layer and has a smaller size than the opening portion of the second resist layer (S15-S18).
    Type: Application
    Filed: March 20, 2009
    Publication date: June 10, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Koichi YATSUDA, Eiichi NISHIMURA
  • Publication number: 20100130011
    Abstract: According to a disclosed semiconductor device fabrication method according to one embodiment of the present invention, a layer having a line-and-space pattern extending in one direction is etched using another layer having a line-and-space pattern extending in another direction intersecting the one direction, thereby obtaining a mask having two-dimensionally arranged dots. An underlying layer is etched using the mask, thereby providing two-dimensionally arranged pillars.
    Type: Application
    Filed: November 23, 2009
    Publication date: May 27, 2010
    Inventors: TETSUO ENDOH, Eiichi Nishimura
  • Patent number: 7700494
    Abstract: A method is provided for low-pressure plasma ashing to remove photoresist remnants and etch residues that are formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving an oxygen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to remove significant amount of photoresist remnants and etch residues from the substrate, in addition to etching and removing detrimental fluoro-carbon residues from the chamber surfaces. An increased bias is applied to the substrate in the second cleaning step to remove the remains of the photoresist and etch residues from the substrate. A chamber pressure less than 20 mTorr is utilized in the second cleaning step. The two-step process reduces the memory effect commonly observed in conventional one-step ashing processes. A method of endpoint detection can be used to monitor the ashing process.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: April 20, 2010
    Assignee: Tokyo Electron Limited, Inc.
    Inventors: Vaidyanathan Balasubramaniam, Masaaki Hagihara, Eiichi Nishimura, Koichiro Inazawa, Rie Inazawa, legal representative
  • Publication number: 20100086670
    Abstract: A substrate processing method includes performing a deposition process of depositing a thin film on the substrate while depressurizing the inside of the processing chamber and introducing the gas thereinto; and, while the deposition process is being performed, irradiating light, which is transmitted through a monitoring window installed at the processing chamber, toward the inside of the processing chamber through the monitoring window, and monitoring a reflection light intensity of reflection light by receiving the reflection light through the monitoring window. The substrate processing method further includes measuring a temporal variation in the reflection light intensity during the deposition process and calculating a termination time of the deposition process based on a measurement value of the temporal variation; and terminating the deposition process by setting the termination time as an end point of the deposition process.
    Type: Application
    Filed: October 7, 2009
    Publication date: April 8, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masato Kushibiki, Eiichi Nishimura, Akitaka Shimizu
  • Patent number: 7682517
    Abstract: A method of processing a substrate that enables the amount removed of a surface damaged layer to be controlled easily, and enable a decrease in wiring reliability to be prevented. A surface damaged layer having a reduced carbon concentration of a carbon-containing low dielectric constant insulating film on a substrate is exposed to an atmosphere of a mixed gas containing ammonia and hydrogen fluoride under a predetermined pressure. The surface damaged layer that has been exposed to the atmosphere of the mixed gas is heated to a predetermined temperature.
    Type: Grant
    Filed: February 14, 2006
    Date of Patent: March 23, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Eiichi Nishimura, Kenya Iwasaki
  • Publication number: 20100068892
    Abstract: In a substrate processing method of processing a substrate in which a processing target layer, an intermediate layer, and a mask layer are stacked one on top of another, the mask layer having an opening that partially exposes the intermediate layer, a thickness of the mask layer is increased by depositing deposits on an upper surface of the mask layer with plasma generated from a mixed gas of SF6 gas and a depositive gas represented in a general equation, CxHyFz (where, x, y, and z are positive integers).
    Type: Application
    Filed: September 11, 2009
    Publication date: March 18, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masato KUSHIBIKI, Eiichi Nishimura
  • Publication number: 20100040980
    Abstract: In a film reforming method for reforming a film layer to be reformed by irradiating electron beams thereon, the electron beams are irradiated in a state where the film layer is cooled. Further, in a slimming amount controlling method for controlling a slimming amount of a resist film layer, the slimming amount thereof is controlled by the irradiation amount of electron beams irradiated thereon in a state where the resist film layer having a specified opening dimension is cooled. Furthermore, in a film reforming apparatus including a mounting unit for mounting thereon an object to be processed and an electron beam irradiating unit for irradiating electron beams on the object disposed on the mounting unit to thereby reform a film layer to be reformed, formed on an object, the electron beams are irradiated from the electron beam irradiating unit in a state where the film layer is cooled by a cooling unit provided in the mounting unit.
    Type: Application
    Filed: October 20, 2009
    Publication date: February 18, 2010
    Applicant: TOKYO ELECTON LIMITED
    Inventors: Eiichi Nishimura, Takashi Tanaka, Gen You, Minoru Honda, Mitsuaki Iwashita
  • Publication number: 20100029086
    Abstract: A semiconductor device having high reliability is provided by reducing fluorine remaining in a metal forming the semiconductor device. Specifically disclosed is a method for manufacturing a semiconductor device including a fluoride removal step for removing a metal fluoride produced on a metal forming an electrode or wiring of a semiconductor device which is formed on a substrate to be processed. This method for manufacturing a semiconductor device is characterized in that the metal fluoride is removed by supplying formic acid in a gaseous state to the substrate to be processed in the fluoride removal step.
    Type: Application
    Filed: September 8, 2009
    Publication date: February 4, 2010
    Applicant: TOKYO ELECTON LIMITED
    Inventors: Hidenori Miyoshi, Eiichi Nishimura, Kazuhiro Kubota
  • Publication number: 20100018332
    Abstract: A foreign matter detecting method of detecting foreign matter attached to a peripheral edge of a substrate, which makes it possible to accurately detect foreign matter attached to the peripheral edge of the substrate even if the foreign matter is of a minute size below the detection limit of an existing measuring instrument, and which is highly versatile and suitable for mass production of substrates. The substrate is cooled to condense moisture around the foreign matter attached to the peripheral edge of the substrate, and then the condensed moisture is iced to grow an ice crystal. Then, the foreign matter attached to the peripheral edge of the substrate, which is emphasized by the ice crystal, is detected.
    Type: Application
    Filed: July 21, 2009
    Publication date: January 28, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Tsuyoshi MORIYA, Eiichi NISHIMURA