Patents by Inventor Eiichi Nishimura

Eiichi Nishimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8741396
    Abstract: An amorphous carbon film, which has excellent etching resistance and is capable of reducing reflectance when a resist film is exposed to light, is form. A method for manufacturing a semiconductor device includes forming an object film to be etched on a wafer, supplying a process gas containing a CO gas and an N2 gas into a processing container, forming an amorphous carbon nitride film from the supplied CO gas and N2 gas, forming a silicon oxide film on the amorphous carbon nitride film, forming an ArF resist film on the silicon oxide film, patterning the ArF resist film, etching the silicon oxide film by using the ArF resist film as a mask, etching the amorphous carbon nitride film by using the silicon oxide film as a mask, and etching the object film to be etched by using the amorphous carbon nitride film as a mask.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: June 3, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Hiraku Ishikawa, Eiichi Nishimura
  • Publication number: 20140141532
    Abstract: A plasma processing method is used to etch a multilayered material having a stacked structure, in which a first magnetic layer, an insulating layer, a second magnetic layer, and a mask material are stacked in sequence, in a plasma processing apparatus including a processing chamber that partitions a processing space where plasma is generated and a gas supply unit that supplies a processing gas into the processing space. The plasma processing method includes a mask forming process of forming a mask on the second magnetic layer by etching the mask material; an etching process of supplying the processing gas into the processing chamber to generate plasma, etching the second magnetic layer by the mask, and stopping the etching on a surface of the insulating layer. Further, the second magnetic layer contains CoFeB, the insulating layer contains MgO, and the processing gas contains H2 and F or a fluorine compound.
    Type: Application
    Filed: November 14, 2013
    Publication date: May 22, 2014
    Applicant: Tokyo Electron Limited
    Inventors: Eiichi Nishimura, Tadashi Kotsugi, Takashi Sone
  • Patent number: 8715520
    Abstract: There is provided a substrate processing method capable of etching a layer containing, at least, platinum without using a halogen gas. When etching the platinum-manganese layer on a wafer W by using a tantalum (Ta) layer 38 having a certain pattern shape, a processing gas containing, at least, a carbon monoxide gas, a hydrogen gas, and a rare gas is used, and a ratio of a gas flow rate of the hydrogen gas to a total gas flow rate of the carbon monoxide gas and the hydrogen gas is in a range of from about 50% to about 75%.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: May 6, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Takashi Sone, Eiichi Nishimura
  • Publication number: 20140120635
    Abstract: A gas for an etching process and a treatment process of a metal stacked film in which an insulating layer is interposed between two layers of magnetic materials can be optimized. An etching method of etching a multilayered film including a metal stacked film in which an insulating layer is interposed between a first magnetic layer and a second magnetic layer includes etching the metal stacked film with plasma generated by supplying a gas containing at least C, O, and H into a processing chamber; and treating the metal stacked film with plasma generated by supplying a gas containing at least a CF4 gas into the processing chamber.
    Type: Application
    Filed: October 29, 2013
    Publication date: May 1, 2014
    Applicant: Tokyo Electron Limited
    Inventors: Eiichi Nishimura, Masato Kushibiki, Nao Koizumi, Takashi Sone, Fumiko Yamashita
  • Publication number: 20140110373
    Abstract: A method of etching a copper layer of a target object including, on the copper layer, a mask having a pattern to be transferred onto the copper layer is provided. The method includes etching the copper layer by using plasma of a first gas containing a hydrogen gas; and processing the target object by using plasma of a second gas containing a hydrogen gas and a gas (hereinafter, referred to as “deposition gas”) that is deposited on the target object. Further, the etching of the copper layer by using plasma of the first gas and the processing of the target object by using plasma of the second gas are repeated alternately.
    Type: Application
    Filed: October 21, 2013
    Publication date: April 24, 2014
    Inventors: Eiichi Nishimura, Masato Kushibiki, Takashi Sone, Akitaka Shimizu, Fumiko Yamashita
  • Publication number: 20140083979
    Abstract: A deposit removal method for removing deposits deposited on the surface of a pattern formed on a substrate by etching, includes an oxygen plasma treatment process for exposing the substrate to oxygen plasma while heating the substrate and a cycle treatment process for, after the oxygen plasma treatment process, repeating multiple cycles of a first period and a second period. In the first period, the substrate is exposed to a mixture of hydrogen fluoride gas and alcohol gas inside a processing chamber and the partial pressure of the alcohol gas is set to the first partial pressure. In the second period, the partial pressure of the alcohol gas is set to the second partial pressure lower than the first partial pressure by exhausting the inside of the processing chamber.
    Type: Application
    Filed: May 10, 2012
    Publication date: March 27, 2014
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Shigeru Tahara, Eiichi Nishimura, Hiroshi Tomita, Tokuhisa Ohiwa, Hisashi Okuchi, Mitsuhiro Omura
  • Patent number: 8679985
    Abstract: A dry etching method for a silicon nitride film capable of improving throughput is provided. A dry etching method for dry-etching a silicon nitride film 103 includes dry-etching the silicon nitride film 103 without generating plasma by using a processing gas containing at least a hydrogen fluoride gas (HF gas) and a fluorine gas (F2 gas), with respect to a processing target object 100 including the silicon nitride film 103.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: March 25, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Eiichi Nishimura, Yusuke Shimizu
  • Patent number: 8642136
    Abstract: A substrate processing method includes performing a deposition process of depositing a thin film on the substrate while depressurizing the inside of the processing chamber and introducing the gas thereinto; and, while the deposition process is being performed, irradiating light, which is transmitted through a monitoring window installed at the processing chamber, toward the inside of the processing chamber through the monitoring window, and monitoring a reflection light intensity of reflection light by receiving the reflection light through the monitoring window. The substrate processing method further includes measuring a temporal variation in the reflection light intensity during the deposition process and calculating a termination time of the deposition process based on a measurement value of the temporal variation; and terminating the deposition process by setting the termination time as an end point of the deposition process.
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: February 4, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Masato Kushibiki, Eiichi Nishimura, Akitaka Shimizu
  • Patent number: 8608974
    Abstract: There is provided a substrate processing method capable of increasing an etching rate of a copper member without using a halogen gas. A Cu layer 40 having a smoothened surface 50 is obtained, and then, a processing gas produced by adding a methane gas to a hydrogen gas is introduced into an inner space of a processing chamber 15. Plasma is generated from this processing gas. In the inner space of the processing chamber 15, there exist oxygen radicals 52 generated when an oxide layer 42 is etched, and carbon radicals 53 generated from methane. The oxygen radicals 52 and the carbon radicals 53 are compounded to generate an organic acid, and the organic acid makes a reaction with copper atoms of the Cu layer 40. As a result, a complex of the organic acid having the copper atoms is generated, and the generated organic acid complex is vaporized.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: December 17, 2013
    Assignee: Tokyo Electron Limited
    Inventor: Eiichi Nishimura
  • Patent number: 8585831
    Abstract: There is provided a substrate cleaning method capable of cleaning a substrate on which a fine pattern is being formed in a short time with a simple configuration without having a harmful influence on the fine pattern. In the method, the substrate is transferred from a processing chamber for performing a process on the surface of the substrate therein to a cleaning chamber for cleaning the substrate therein. The substrate is cooled to a temperature in the cleaning chamber. A superfluid is supplied to the surface of the substrate, and contaminant components in the fine pattern are flowed out along with the superfluid as the superfluid flows over from the surface of the substrate.
    Type: Grant
    Filed: March 10, 2010
    Date of Patent: November 19, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Hidefumi Matsui, Tsuyoshi Moriya, Eiichi Nishimura, Shinichi Kawaguchi, Jun Yamawaku, Kunio Miyauchi
  • Publication number: 20130302993
    Abstract: A semiconductor device manufacturing method includes a plasma etching step for etching an etching target film formed on a substrate accommodated in a processing chamber. In the plasma etching step, a processing gas including a gaseous mixture containing predetermined gases is supplied into the processing chamber, and a cycle including a first step in which a flow rate of at least one of the predetermined gases is set to a first value during a first time period and a second step in which the flow rate thereof is set to a second value that is different from the first value during a second time period is repeated consecutively at least three times without removing a plasma. The first time period and the second time period are set to about 1 to 15 seconds.
    Type: Application
    Filed: July 22, 2013
    Publication date: November 14, 2013
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masato KUSHIBIKI, Eiichi NISHIMURA
  • Patent number: 8551289
    Abstract: A plasma processing apparatus, for performing a plasma processing on a target substrate by generating an inductively coupled plasma of a processing gas in a depressurized processing chamber, includes: a mounting table; a gas supply unit; a gas exhaust unit; a planar high frequency antenna disposed opposite to the mounting table with a plate-shaped dielectric member therebetween and a shield member covering the high frequency antenna. The high frequency antenna includes an inner antenna element provided at a central portion of a region above the plate-shaped dielectric member and an outer antenna element provided at an edge portion to surround a periphery of the inner antenna element. Further, two ends of each of the antenna elements are open ends and the antenna elements are grounded at central points thereof or points close thereto to resonate at ½ wavelengths of high frequencies from individual high frequency power supplies.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: October 8, 2013
    Assignees: Tokyo Electron Limited, Meiko Co., Ltd.
    Inventors: Eiichi Nishimura, Shimao Yoneyama
  • Publication number: 20130240479
    Abstract: To provide a method for producing a filtration filter that can simplify the process for providing clean water or freshwater. By etching silicon substrate 1 using masking film formed on a surface of substrate 1 and having numerous openings to expose portions of the surface, numerous circular holes 2 with an approximate diameter of 100 nm are formed in substrate 1. Diameter (D1) at minimum-diameter portions 4 near the openings of circular holes 2 to be reduced by silica film 3 is adjusted to be 1 nm˜100 nm by depositing silica film 3 on the inner surfaces of circular holes 2.
    Type: Application
    Filed: May 9, 2013
    Publication date: September 19, 2013
    Inventors: Tsuyoshi MORIYA, Kenichi Kataoka, Shigeru Senzaki, Youichi Shimanuki, Kazuhiko Kano, Yu Wamura, Song yun Kang, Eiichi Nishimura
  • Patent number: 8530354
    Abstract: The present invention provides a substrate processing method to process a substrate including at least a process layer, an intermediate layer, and a mask layer which are stacked in this order. The mask layer includes an aperture configured to expose a portion of the intermediate layer. The substrate processing method includes a material deposition step of depositing a material on a side surface of the aperture and exposing a portion of the process layer by etching the exposed portion of the intermediate layer by plasma generated from a deposit gas, and an etching step of etching the exposed portion of the process layer.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: September 10, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Masato Kushibiki, Eiichi Nishimura
  • Patent number: 8518828
    Abstract: According to a disclosed semiconductor device fabrication method according to one embodiment of the present invention, a layer having a line-and-space pattern extending in one direction is etched using another layer having a line-and-space pattern extending in another direction intersecting the one direction, thereby obtaining a mask having two-dimensionally arranged dots. An underlying layer is etched using the mask, thereby providing two-dimensionally arranged pillars.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: August 27, 2013
    Assignees: Tokyo Electron Limited, Tohoku University
    Inventors: Tetsuo Endoh, Eiichi Nishimura
  • Patent number: 8491805
    Abstract: A semiconductor device manufacturing method includes a plasma etching step for etching an etching target film formed on a substrate accommodated in a processing chamber. In the plasma etching step, a processing gas including a gaseous mixture containing predetermined gases is supplied into the processing chamber, and a cycle including a first step in which a flow rate of at least one of the predetermined gases is set to a first value during a first time period and a second step in which the flow rate thereof is set to a second value that is different from the first value during a second time period is repeated consecutively at least three times without removing a plasma. The first time period and the second time period are set to about 1 to 15 seconds.
    Type: Grant
    Filed: February 2, 2011
    Date of Patent: July 23, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Masato Kushibiki, Eiichi Nishimura
  • Patent number: 8491804
    Abstract: A method of processing a substrate having a processing target layer and an organic film serving as a mask layer includes a mineralizing process of mineralizing the organic film. The mineralizing process includes an adsorption process for allowing a silicon-containing gas to be adsorbed onto a surface of the organic film; and an oxidation process for oxidizing the adsorbed silicon-containing gas to be converted into a silicon oxide film. A monovalent aminosilane is employed as the silicon-containing gas.
    Type: Grant
    Filed: March 11, 2010
    Date of Patent: July 23, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Masato Kushibiki, Eiichi Nishimura
  • Patent number: 8383517
    Abstract: A substrate processing method that can selectively remove deposit produced through dry etching of silicon. A substrate has a silicon base material and a hard mask that is made of a silicon nitride film and/or a silicon oxide film and formed on the silicon base material, the hard mask having an opening to which at least part of the silicon base material is exposed. A trench corresponding to the opening is formed in the silicon base material through dry etching using plasma produced from halogenated gas. After the dry etching, the substrate is heated to a temperature of not less than 200° C., and then hydrogen fluoride gas and helium gas are supplied toward the substrate.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: February 26, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Eiichi Nishimura, Chie Kato, Akitaka Shimizu, Hiroyuki Takahashi
  • Patent number: 8383521
    Abstract: A substrate processing method processes a substrate including a processing target film, an organic film provided on the processing target film and having a plurality of line-shaped portions having fine width, and a hard film covering the line-shaped portions and the processing target film exposed between the line-shaped portions. The method includes a first etching step of etching a part of the hard film to expose the organic film and portions of the processing target film between the line-shaped portions; an ashing step of selectively removing the exposed organic film; and a second etching step of etching a part of the remaining hard film.
    Type: Grant
    Filed: March 10, 2010
    Date of Patent: February 26, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Eiichi Nishimura, Masato Kushibiki, Fumiko Yamashita
  • Patent number: 8377721
    Abstract: A substrate processing system includes a resist pattern forming apparatus including modules each configured to perform a predetermined process on a substrate with an underlying film formed thereon, an etched pattern forming apparatus including chambers each configured to perform patterning of the underlying film by use of a resist pattern as a mask, and examination devices configured to perform measurement and examination of a pattern attribute rendered on a substrate after a process in the resist pattern forming apparatus and after a process in the etched pattern forming apparatus. A controller is preset to utilize measurement results and transfer data to calculate correction value ranges respectively settable in the modules and the chambers and to determine combinations of the modules and the chambers such that corrections made within the correction value ranges cause a pattern attribute to approximate a predetermined value for each of the substrates.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: February 19, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Tsuyoshi Shibata, Eiichi Nishimura