Patents by Inventor Eiichi Nishimura

Eiichi Nishimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090291560
    Abstract: A feedforward control is performed so that a line width of a mask constituted by an Si3N4 layer 102 formed by using a photoresist 105b as a mask is to be the same as a line width of a mask pattern constituted by an SiO2 layer 103 based on a measured line width of the photoresist 105b and the measured line width of the mask pattern constituted by the SiO2 layer 103. For example, a control of a trimming amount of the line width of the photoresist 105b is performed so that the line width of the photoresist 105b is to be the same as the line width of the mask pattern constituted by the SiO2 layer 103.
    Type: Application
    Filed: October 23, 2008
    Publication date: November 26, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Koichi Yatsuda, Eiichi Nishimura
  • Patent number: 7622392
    Abstract: A method of processing a substrate that enables the amount removed of an insulating film to be controlled precisely, without damaging an electronic device. An insulating film on a substrate of a solid-state imaging device is exposed to an atmosphere of a mixed gas containing ammonia and hydrogen fluoride under a predetermined pressure. The insulating film that has been exposed to the atmosphere of the mixed gas is heated to a predetermined temperature.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: November 24, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Eiichi Nishimura, Kenya Iwasaki
  • Publication number: 20090275201
    Abstract: A substrate processing method implemented in a substrate processing system that includes an etching apparatus that carries out plasma etching processing on a substrate and a vacuum-type substrate transferring apparatus to which the etching apparatus is connected is provided. A first step includes forming a protective film on a rear surface of the substrate before the plasma etching processing is carried out. The protective film prevents the rear surface of the substrate from being scratched by an electrostatic chuck that electrostatically attracts the substrate during the plasma etching processing. A second step includes electrostatically attracting the substrate to the electrostatic chuck such that the electrostatic chuck directly contacts the rear surface of the substrate and of carrying out the plasma etching processing on the substrate. A third step includes removing the protective film from the rear surface of the substrate after the plasma etching processing has been carried out.
    Type: Application
    Filed: July 13, 2009
    Publication date: November 5, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Eiichi NISHIMURA
  • Publication number: 20090269682
    Abstract: The method of forming an etching mask includes: forming a mask layer on an object layer that is to be etched, to form an etching mask used in etching the object layer; forming a first mask layer on the mask layer, the first mask layer having a first pattern that is to be transferred onto the mask layer; forming a second mask layer on the first mask layer, the second mask layer having a second pattern that is to be transferred onto the mask layer; obtaining a third mask layer having the first pattern and the second pattern, by transferring the second pattern of the second mask layer onto the first mask layer; and forming the etching mask used in the etching of the object layer, by etching the mask layer using the third mask layer.
    Type: Application
    Filed: March 19, 2009
    Publication date: October 29, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Eiichi NISHIMURA
  • Publication number: 20090229522
    Abstract: A plasma processing apparatus comprises a plasma generation chamber where plasma is generated by exciting a processing gas with high-frequency power applied to a coil wound around a side wall of a reaction container, a processing chamber where a specific type of processing is executed on a wafer with the plasma thus generated and a high-frequency power source capable of selectively outputting either first high-frequency power with a reference frequency or second high-frequency power with a frequency (2n+1)/2 times the reference frequency, to be applied to the coil.
    Type: Application
    Filed: February 26, 2009
    Publication date: September 17, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Eiichi NISHIMURA
  • Publication number: 20090209108
    Abstract: A substrate processing method that can prevent a decrease in the yield of semiconductor devices manufactured from substrates. A gas containing fluorine atoms is supplied into a chamber, and then chlorine gas is supplied into the chamber. Further, a gas containing nitrogen atoms is supplied into the chamber.
    Type: Application
    Filed: February 19, 2009
    Publication date: August 20, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Tsuyoshi MORIYA, Eiichi Nishimura
  • Publication number: 20090188428
    Abstract: A substrate processing apparatus includes a processing vessel; a mounting table for mounting the substrate thereon in the processing vessel; a gas inlet unit provided in the processing vessel; a gas supply mechanism for supplying a hydrogen-containing gas into the processing vessel through the gas inlet unit; a gas discharge port provided at the processing vessel; a gas exhaust mechanism for exhausting an inside of the processing vessel through the gas discharge port; a catalyst provided in the processing vessel; and a heating unit for heating the catalyst. Hydrogen radicals are formed in the processing vessel by a catalytic cracking reaction between the hydrogen-containing gas and the catalyst of high temperature, and the substrate is processed by the hydrogen radicals.
    Type: Application
    Filed: January 28, 2009
    Publication date: July 30, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Isamu SAKURAGI, Shigeru Tahara, Kumiko Yamazaki, Ryo Nonaka, Morihiro Takanashi, Eiichi Nishimura
  • Publication number: 20090179003
    Abstract: An ashing process in which an etching mask is removed through ashing by supplying hydrogen radicals toward a wafer W being heated to a predetermined temperature and a restoration process in which the film quality of a low dielectric constant insulating film having been damaged during an etching process is restored while, at the same time, rendering the low dielectric constant insulating film exposed at a recessed portion into a hydrophobic state by supplying a gas containing a ?-diketone compound with an ignition point equal to or higher than 300° C. toward the wafer W having undergone the ashing process, are executed.
    Type: Application
    Filed: November 24, 2008
    Publication date: July 16, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Eiichi NISHIMURA
  • Patent number: 7532717
    Abstract: An echo canceler removes the echo of a receive signal from a transmit signal while also controlling the signal level of the transmit signal. The echo canceler generates signal level data for the transmit signal, updates the signal level data when the transmit signal is active and the receive signal is inactive, and amplifies the transmit signal according to the signal level data. The echo canceler also generates an echo cancellation signal from the receive signal, amplifies the echo cancellation signal according to the signal level data, and subtracts the amplified echo cancellation signal from the amplified transmit signal to obtain a transmit output signal.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: May 12, 2009
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Eiichi Nishimura
  • Publication number: 20090087990
    Abstract: A manufacturing method of a semiconductor device, which etches a layer to be etched on a substrate into a predetermined pattern based on a first pattern of photoresist produced by exposing and developing a photoresist film, the manufacturing method including the steps of forming an SiO2 film on a first pattern of the photoresist, etching the SiO2 film so that the SiO2 may remain only in a side wall section of a first pattern of the photoresist, removing a first pattern of the photoresist, and forming a second pattern of the SiO2 film.
    Type: Application
    Filed: September 24, 2008
    Publication date: April 2, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Koichi Yatsuda, Eiichi Nishimura
  • Publication number: 20090087991
    Abstract: A manufacturing method of a semiconductor device, which etches a layer to be etched on a substrate into a predetermined pattern based on a first pattern of photoresist produced by exposing and developing a photoresist film, the manufacturing method includes the steps of, patterning an organic membrane based on a first pattern of the photoresist, forming an SiO2 film on the patterned organic membrane, etching the SiO2 film so that the SiO2 remains only in a side wall section of the organic membrane and forming a second pattern of the SiO2 film by removing the organic membrane.
    Type: Application
    Filed: September 24, 2008
    Publication date: April 2, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Koichi Yatsuda, Eiichi Nishimura
  • Patent number: 7510972
    Abstract: A method of processing a substrate which enables a surface damaged layer and polishing remnants on the surface of an insulating film to be removed, and enable the amount removed of the surface damaged layer and polishing remnants to be controlled easily. An insulating film on a substrate, which has been revealed by chemical mechanical polishing, is exposed to an atmosphere of a mixed gas containing ammonia and hydrogen fluoride under a predetermined pressure. The insulating film which has been exposed to the atmosphere of the mixed gas is heated to a predetermined temperature.
    Type: Grant
    Filed: February 14, 2006
    Date of Patent: March 31, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Eiichi Nishimura, Kenya Iwasaki
  • Publication number: 20090081565
    Abstract: Disclosed is a method for forming an etching mask, capable of precisely and easily forming an etching mask having a microscopic pattern of a non-straight-line shape. An exposure pattern of a straight-line shape is transferred to a photoresist by using a first reticle and developed, and after a trimming process, a SiO2 layer is etched by using it as a mask. Thereafter, an exposure pattern of a straight-line shape is transferred to a photoresist by using a second reticle and developed, and then, a protruding amount of an end portion of the photoresist protruding from the SiO2 layer is measured. Subsequently, the pattern of the photoresist is trimmed to have a preset thickness and length, and by forming the protruding amount to have a preset amount or less, and by using this as a mask, a Si3N4 layer is etched, thereby forming an etching mask having an approximately L-shape.
    Type: Application
    Filed: September 19, 2008
    Publication date: March 26, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Koichi Yatsuda, Eiichi Nishimura
  • Publication number: 20090014125
    Abstract: A substrate processing system includes a resist pattern forming apparatus including modules each configured to perform a predetermined process on a substrate with an underlying film formed thereon, an etched pattern forming apparatus including chambers each configured to perform patterning of the underlying film by use of a resist pattern as a mask, and examination devices configured to perform measurement and examination of a pattern attribute rendered on a substrate after a process in the resist pattern forming apparatus and after a process in the etched pattern forming apparatus. A controller is preset to utilize measurement results and transfer data to calculate correction value ranges respectively settable in the modules and the chambers and to determine combinations of the modules and the chambers such that corrections made within the correction value ranges cause a pattern attribute to approximate a predetermined value for each of the substrates.
    Type: Application
    Filed: June 18, 2008
    Publication date: January 15, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Tsuyoshi SHIBATA, Eiichi Nishimura
  • Publication number: 20090008034
    Abstract: A plasma generation chamber and a processing chamber are isolated from each other by a barrier wall member disposed between them. The barrier wall member includes two plate members and stacked one on top of the other over a gap, a plurality of through holes and, via which hydrogen radicals are allowed to pass, are respectively formed at the plate member and the plate member. The through holes at one plate member are formed with an offset relative to the through holes formed at the other plate member and the plate members are both constituted of an insulating material that does not transmit ultraviolet light.
    Type: Application
    Filed: July 1, 2008
    Publication date: January 8, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Shigeru TAHARA, Eiichi NISHIMURA, Kumiko YAMAZAKI
  • Publication number: 20090011605
    Abstract: The present invention is an apparatus for manufacturing a semiconductor device comprising: a process vessel including a stage on which a substrate is placed, the substrate having a low dielectric constant film with a resist pattern being formed in an upper layer of the low dielectric constant film; an etching-gas supply unit that supplies an etching gas into the process vessel so as to etch the low dielectric constant film; an ashing-gas unit means that supplies an ashing gas into the process vessel so as to ash the resist pattern formed in the upper layer of the low dielectric constant film after the low dielectric constant film has been subjected to an etching process; a plasma generating means that generates a plasma by supplying an energy to the etching gas and the ashing gas in the process vessel; a unit that supplies a dipivaloylmethane gas into the process vessel, after the low dielectric constant film has been subjected to an ashing process, in order to recover a damage layer of the low dielectric con
    Type: Application
    Filed: June 30, 2008
    Publication date: January 8, 2009
    Inventors: Yuki Chiba, Eiichi Nishimura, Ryuichi Asako
  • Patent number: 7465673
    Abstract: A method for etching an organic anti-reflective coating (ARC) layer on a substrate in a plasma processing system comprising: introducing a process gas comprising nitrogen (N), hydrogen (H), and oxygen (O); forming a plasma from the process gas; and exposing the substrate to the plasma. The process gas can, for example, constitute an NH3/O2, N2/H2/O2, N2/H2/CO, NH3/CO, or NH3/CO/O2 based chemistry. Additionally, the process chemistry can further comprise the addition of helium. The present invention further presents a method for forming a bilayer mask for etching a thin film on a substrate, wherein the method comprises: forming the thin film on the substrate; forming an ARC layer on the thin film; forming a photoresist pattern on the ARC layer; and transferring the photoresist pattern to the ARC layer with an etch process using a process gas comprising nitrogen (N), hydrogen (H), and oxygen (O).
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: December 16, 2008
    Assignee: Tokyo Electron Limited
    Inventors: Yoshiki Igarashi, Kouichiro Inazawa, Kimihiro Higuchi, Vaidyanathan Balasubramaniam, Eiichi Nishimura, Ralph Kim, Philip Sansone, Masaaki Hagihara
  • Publication number: 20080305632
    Abstract: A substrate processing apparatus is provided to enable to efficiently remove an oxide layer and an organic material layer. A third process unit (36) of a substrate processing apparatus (10) includes a box-shaped process vessel (chamber) (50), a nitrogen gas supply system (190) and an ozone gas supply system (191). The ozone gas supply system (191) includes an ozone gas supply unit (195) and an ozone gas supply pipe (196) connected to the ozone gas supply unit (195). The ozone gas supply pipe (196) has an ozone gas supply hole (197) having an opening arranged opposite to a wafer (W). The ozone gas supply unit (195) supplies an ozone (O3) gas into the chamber (50) through the ozone gas supply hole (197) via the ozone gas supply pipe (196).
    Type: Application
    Filed: August 13, 2008
    Publication date: December 11, 2008
    Applicant: TOYOTA ELECTRON LIMITED
    Inventors: Eiichi NISHIMURA, Takamichi Kikuchi
  • Publication number: 20080236634
    Abstract: A substrate processing system that enables foreign matter adhered to a rear surface or a periphery of a substrate to be completely removed. A substrate processing apparatus performs predetermined processing on the substrate. A substrate cleaning apparatus cleans the substrate at least one of before and after the predetermined processing. A jetting apparatus jets a cleaning substance in two phases of a gas phase and a liquid phase and a high-temperature gas towards the rear surface or the periphery of the substrate.
    Type: Application
    Filed: March 28, 2008
    Publication date: October 2, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Tsuyoshi MORIYA, Tadashi ONISHI, Ryo NONAKA, Eiichi NISHIMURA
  • Publication number: 20080233754
    Abstract: A substrate peripheral film-removing apparatus which is capable of removing a film from a substrate periphery without complicating the construction of the apparatus. A wafer chamber receives a wafer having an SiO2 film formed on a periphery thereof. In a beveled portion-receiving chamber, film-removing chemical processing is carried out on at least part of the beveled portion of the wafer, using a process gas.
    Type: Application
    Filed: May 23, 2008
    Publication date: September 25, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Eiichi NISHIMURA, Kaoru Maekawa