Abstract: A lower electrode is formed over a substrate, and a raw material including a complex oxide is heated in an atmosphere pressurized to two atmospheres or more and containing oxygen at a volume ratio of 10% or less at a temperature raising rate of 100° C./min or less, thereby forming a lower alloy film of a compound of a first metal which makes up the complex oxide, and a second metal, which makes up the lower electrode, over the lower electrode. A ceramic film in which the raw material is crystallized is formed over the lower alloy film, and an upper electrode is formed over the ceramic film.

Abstract: A ferroelectric film is formed by an oxide that is described by a general formula AB1-xNbxO3. An A element includes at least Pb, and a B element includes at least one of Zr, Ti, V, W, Hf and Ta. The ferroelectric film includes Nb within the range of: 0.05≦x<1. The ferroelectric film can be used for any of ferroelectric memories of 1T1C, 2T2C and simple matrix types.

Abstract: A ferroelectric memory device includes a memory cell array and a peripheral circuit section. The memory cell array, in which memory cells are arranged in a matrix, includes first signal electrodes, second signal electrodes which are arranged in a direction so as to intersect the first signal electrodes, and a ferroelectric layer disposed at least at intersection regions between the first signal electrodes and the second signal electrodes. The peripheral circuit section includes circuits for selectively allowing information to be written into or read from the memory cells, such as a first driver circuit, a second driver circuit, and a signal detection circuit. The memory cell array and the peripheral circuit section are disposed in different layers so as to be layered. This ferroelectric memory device can significantly increase the degree of integration of the memory cells and decrease the chip area.

Abstract: Provided are a memory cell array including ferroelectric capacitors with improved characteristics, a method for making the same, and a ferroelectric memory device including the memory cell of the present invention.

Abstract: A ferroelectric memory device and a method for manufacturing the memory device are provided that facilitate the formation of different types of a plurality of memories on an identical substrate.

Abstract: A ferroelectric memory device of the present invention includes a memory cell array in which memory cells are arranged in a matrix having first signal electrodes, second signal electrodes arranged in a direction intersecting the first signal electrodes, and a ferroelectric layer disposed at least in intersection regions between the first signal electrodes and the second signal electrodes, and a peripheral circuit section for selectively writing information into or reading information from the memory cell. The memory cell array and the peripheral circuit section are formed in different layers. The peripheral circuit section is formed in a region outside the memory cell array.

Abstract: A method of manufacturing a ferroelectric memory of the present invention includes applying pulsed laser light 70 to a ferroelectric capacitor 105 from above the ferroelectric capacitor in a state in which at least the ferroelectric capacitor 105 is formed over a substrate 10.

Abstract: A ferroelectric memory device includes a memory cell array and a peripheral circuit section. The memory cell array, in which memory cells are arranged in a matrix, includes first signal electrodes, second signal electrodes which are arranged in a direction so as to intersect the first signal electrodes, and a ferroelectric layer disposed at least at intersection regions between the first signal electrodes and the second signal electrodes. The peripheral circuit section includes circuits for selectively allowing information to be written into or read from the memory cells, such as a first driver circuit, a second driver circuit, and a signal detection circuit. The memory cell array and the peripheral circuit section are disposed in different layers so as to be layered. This ferroelectric memory device can significantly increase the degree of integration of the memory cells and decrease the chip area.

Abstract: A ferroelectric thin film comprising at least two stock solutions is made so that the stock solutions are mixed homogeneously in the plane and over the thickness on a substrate, or so that the stock solutions are mixed having a distribution in the plane and over the thickness on the substrate. A ferroelectric thin film mixed homogeneously in the plane is made by discharging two stock solutions 105 and 106 separately at a fixed discharging rate by separate inkjet heads using an inkjet apparatus having at least two inkjet heads, and a ferroelectric thin film mixed homogeneously over the thickness is made by repeating this process. Moreover, a ferroelectric thin film having a distribution of the stock solutions is made by changing the discharging rate in the thickness direction or the in-plane direction.

Abstract: The present invention relates to a ferroelectric memory having a matrix-type memory cell array which has an excellent degree of integration, in which the angularity of the ferroelectric layer's hysteresis curve is improved. A ferroelectric memory having both integration and memory characteristics in which the angularity of the ferroelectric layer's hysteresis curve is improved is realized as follows. Namely, a structure is employed in which the memory cell array and the peripheral circuit are in a plane separated from one another, and the ferroelectric layer is made to undergo epitaxial growth on to a Si single crystal via a buffer and the first signal electrodes.

Abstract: [Problem] To provide a film forming apparatus being capable of forming films sequentially with two types of film forming mechanisms in the same chamber.

Abstract: A ferroelectric memory device of the present invention includes a memory cell array in which memory cells are arranged in a matrix having first signal electrodes, second signal electrodes arranged in a direction intersecting the first signal electrodes, and a ferroelectric layer disposed at least in intersection regions between the first signal electrodes and the second signal electrodes, and a peripheral circuit section for selectively writing information into or reading information from the memory cell. The memory cell array and the peripheral circuit section are formed in different layers. The peripheral circuit section is formed in a region outside the memory cell array.

Abstract: A ferroelectric memory device includes memory cells including ferroelectric capacitors formed in regions in which first signal electrodes intersect second signal electrodes. Information is written into a selected memory cell by applying a write voltage between one of the first signal electrodes and one of the second signal electrodes in the memory cell. Information is read from the selected memory cell by applying a read voltage between one of the first signal electrodes and one of the second signal electrodes in the memory cell. Provided that the write voltage is ±Vs and the read voltage is either +Vs or −Vs, |Vs| is less than the absolute value of a saturation voltage at which remanent polarization of the ferroelectric capacitors is saturated.

Abstract: To provide an apparatus and method for forming a thin-film using raw material fluid containing a film ingredient and supercritical fluid or liquid.

Abstract: A ferroelectric memory device includes a memory cell array and a peripheral circuit section. The memory cell array, in which memory cells are arranged in a matrix, includes first signal electrodes, second signal electrodes which are arranged in a direction so as to intersect the first signal electrodes, and a ferroelectric layer disposed at least at intersection regions between the first signal electrodes and the second signal electrodes. The peripheral circuit section includes circuits for selectively allowing information to be written into or read from the memory cells, such as a first driver circuit, a second driver circuit, and a signal detection circuit. The memory cell array and the peripheral circuit section are disposed in different layers so as to be layered. This ferroelectric memory device can significantly increase the degree of integration of the memory cells and decrease the chip area.

Abstract: A ferroelectric memory device includes a simple matrix type memory cell array. Provided that the maximum absolute value of a voltage applied between a first signal electrode and a second signal electrode is Vs, polarization P of a ferroelectric capacitor formed of the first signal electrode, the second signal electrode, and ferroelectric layer is within the range of 0.1P(+Vs)<P(−⅓Vs) when the applied voltage is changed from +Vs to −⅓Vs, and 0.1P(−Vs)>P(+⅓Vs) when the applied voltage is changed from −Vs to +⅓Vs.

Abstract: A ferroelectric memory device includes a simple matrix type memory cell array. Provided that the maximum absolute value of a voltage applied between a first signal electrode and a second signal electrode is Vs, polarization P of a ferroelectric capacitor formed of the first electrode, the second electrode, and ferroelectric layer is within the range of 0.1P(+Vs)<P(−1/3Vs) when the applied voltage is changed from +Vs to −1/3Vs, and 0.1P(−Vs)>P(+1/3Vs) when the applied voltage is changed from −Vs to +1/3Vs.

Abstract: The present invention relates to: a memory cell array which is capable of decreasing the parasitic capacitance of signal electrodes and has ferroelectric layers making up ferroelectric capacitors and having a predetermined pattern; a method of fabricating the memory cell array, and a ferroelectric memory device. In the memory cell array, memory cells formed of ferroelectric capacitors are arranged in a matrix. The ferroelectric capacitors include first signal electrodes, second signal electrodes arranged in a direction intersecting the first signal electrodes, and ferroelectric layers disposed linearly along either the first signal electrodes or the second signal electrodes. Alternatively, the ferroelectric layers may be disposed only in intersection areas of the first and second signal electrodes.

Abstract: A ferroelectric memory device includes first electrodes, second electrodes arranged in a direction which intersects the first electrodes, and ferroelectric films disposed in at least intersecting regions of the first electrodes and the second electrodes. Capacitors formed of the first electrodes, the ferroelectric films, and the second electrodes are disposed in a matrix. A ferroelectric phase and a paraelectric phase are mixed in each of the ferroelectric films.

Abstract: A method of manufacturing a ceramic film includes a step of forming a ceramic film 30 by crystallizing a raw material body 20. The raw material body 20 contains different types of raw materials in a mixed state. The different types of raw materials differ from one another in at least one of a crystal growth condition and a crystal growth mechanism in the crystallization of the raw materials. According to this manufacturing method, a surface morphology of the ceramic film can be improved.