Abstract: In a basic variant of a soldering device whereby a laser device is used for melting solder material (3), a protective device is provided which protects the laser lens system (22) from suctioned liquid solder material.

Abstract: The invention relates to a method for producing a substrate arrangement with the process steps:

Abstract: The present invention relates to a method of producing a contactless chip card. In a first step of the method, a card body with one or a plurality of recesses on one card body side is produced from a theremoplastic material, preferably by injection moulding. Bumps being formed on the base surface of the recesses. Subsequently, conductor tracks corresponding to a coil as a conductor track pattern are impressed directly onto surface areas of the card body side including the recesses using a hot impressing technique. The conductor tracks are impressed especially also onto surface areas inside the recesses such that same extends across the bumps. One or a plurality of chips are then aligned in the recesses and contacted with the conductor tracks in the recesses which extend across the bumps. The method according to the present invention is advantageous insofar as it permits a simple production of a chip card, which requires only a few method steps and is therefore also economical.

Abstract: The invention relates to a method for producing a contact substrate (10) as well as to a contact substrate with through-plating between a connector arrangement (21) arranged at the top of a dielectric carrier substrate (12) and the underside of the carrier substrate, wherein the connector arrangement extends along an aperture margin (22) of a substrate recess (15), and the underside (11) of the carrier substrate (12) is supported by a backstop (23), wherein a formed solder material part (24) is placed in the substrate recess (15), and in a subsequent method-related step said formed solder material part (24) is deformed within the substrate recess so as to form a formed contact part (50), such that radial displacement of the material of the formed solder material part in the substrate recess results in a non-positive connection between an intrados surface (28) of the substrate recess and the connector arrangement (21), and that the formed contact part provides through-plating between the connector arrangement

Abstract: Method for thermally bonding contact elements (14, 15) of a flexible film substrate (10) to contact metallizations (17) of an electronic component (12), the flexible film substrate having a support layer (13) of transparent plastics material and energy being applied to the contact elements from their rear by means of laser radiation (11), the transparency of the support layer (13), the absorption of the contact elements (14, 15) and the wavelength of the laser radiation (11) being matched to one another in such a way that the laser radiation is essentially transmitted through the support layer (13) and absorbed in the contact elements (14, 15), and the pressure being applied to the substrate (10) in such a way that the contact elements (14, 15) of the substrate (10) and the contact metallizations (17) of the component (12) are up against one another during the application of the laser radiation (11) in the region of an application point of the optical fibre.

Abstract: An electronic contacting method for contacting a chip having a plurality of conductive contact areas, which are not provided with an additional metallization layer, a carrier substrate is provided, which has a first surface having arranged thereon a plurality of conductive connecting sections. A non-conductive adhesive layer is arranged on the first surface of the carrier substrate and subsequently, the carrier substrate is aligned with a chip to be contacted in such away that a plurality of conductive contact areas on said chip to be contacted is in alignment with the connecting sections on the first surface of said carrier substrate. Then the carrier substrate is connected to the chip to be contacted by means of the adhesive layer in such a way that the connecting sections of the carrier substrate and the contact areas of the chip abut on one another by means of pressure contact, without any intermetallic connection being established.

Abstract: A semiconductor substrate has an underbump metallization for solder materials. The semiconductor substrate has applied thereto a titanium layer serving as a diffusion barrier and as a wettable surface for the solder-material bump. The solder-material bump is adapted to be applied directly to said diffusion barrier.

Abstract: Process for the formation of a spatial chip arrangement having several chips (32, 36, 37, 38, 39) arranged in several planes and electrically connected to one another, in which the chips are connected via their peripheral connection surfaces (33) to assigned conducting paths (23) of a conducting-path structure (24, 25) arranged on at least one carrier substrate (21, 22) by the chips being arranged transverse to the longitudinal extent of the carrier substrate.

Abstract: The present invention relates to a method of forming a structured metallization on a semiconductor wafer, wherein a main surface of the wafer has a passivation layer applied thereto, which is structured so as to determine at least one bond pad. Initially, a metal bump is produced on the at least one bond pad. An activated dielectric is then produced on the areas of the passivation layer on which the structured metallization is to be formed. Finally, metal is chemically deposited directly on the activated dielectric and on the metal bump in such a way that the structured metallization formed on the activated dielectric and the metal chemically deposited on the metal bump are electro-conductively joined.

Abstract: In a chip bonding method, first bonding bumps are applied to bonding electrodes of the chip, a first flexible circuit carrier is arranged on the chip, the flexible circuit carrier having cavities which are aligned with the bonding bumps, and second bonding bumps are applied to the first bonding bumps in such a way that bonding areas on the first flexible circuit carrier are in contact with the first and/or second bonding bumps.

Abstract: Process for the formation of a spatial chip arrangement having several chips (32, 36, 37, 38, 39) arranged in several planes and electrically connected to one another, in which the chips are connected via their peripheral connection surfaces (33) to assigned conducting paths (23) of a conducting-path structure (24, 25) arranged on at least one carrier substrate (21, 22) by the chips being arranged either transverse to the longitudinal extent of the carrier substrate or parallel to the longitudinal extent of the flexibly constructed carrier substrate, as well as a spatial chip arrangement that is formed by means of this process.

Abstract: Method and apparatus for the testing of substrates which are provided with a wiring structure, in particular, chips (21), in conjunction with which, by means of a solder-deposit carrier (25) which is provided with a structured, electrically conductive coating (12) with bond pads (17) for the arranging of solder deposits (28) and their transfer to correspondingly arranged bond pads (22) of a substrate (21), an electrical check of the wiring structure of the substrate (21) takes place during the transfer of the solder deposits (28).

Abstract: Method and apparatus for the testing of substrates which are provided with a wiring structure, in particular, chips (21), in conjunction with which, by means of a solder-deposit carrier (25) which is provided with a structured, electrically conductive coating (12) with bond pads (17) for the arranging of solder deposits (28) and their transfer to correspondingly arranged bond pads (22) of a substrate (21), an electrical check of the wiring structure of the substrate (21) takes place during the transfer of the solder deposits (28).

Abstract: A housing to accept at least one electronic component, e.g., a chip with a cover and an opposing cover. The cover and opposing cover are formed to surround the component. On the inner surface of the cover and the opposing cover, there are conductive paths arranged such that the paths on the cover connect terminal areas of the component to the paths on the opposing cover and the paths on the opposing cover open into external terminals of the housing. The cover and/or the opposing cover is/are flexible and are suitable to be interconnected with surrounding sub-housings.

Abstract: The invention relates to a solder bump of an inhomogeneous material compoion for connecting contact pad metallizations of different electronic components or substrates in flip-chip technology, as well as to a method of making such a solder bump. A solder bump consists of a space defining high-melting solder bump core and a layer of a preferably low-melting solder material deposited thereon. The preconditions required for soldering, such as solder deposition, bump height and soldering temperature are thus all combined in the solder bump.

Abstract: In a contact-bumpless chip contacting method for contacting a chip having a plurality of conductive contact areas, which are not provided with an additional metallization layer, a carrier substrate is provided, which has a first surface having arranged thereon a plurality of conductive connecting sections. A non-conductive adhesive layer is arranged on the first surface of the carrier substrate and subsequently, the carrier substrate is aligned with the chip to be contacted such that a plurality of conductive contact areas on the chip to be contacted is in alignment with the connecting sections on the first surface of the carrier substrate. Then the carrier substrate is connected to the chip to be contacted by means of the adhesive layer in such a way that the connecting sections of the carrier substrate and the contact areas of the chip abut on one another by means of pressure contact, without any intermetallic connection being established.

Abstract: Chip module (20) with a chip carrier (21) and at least one chip (22), wherein the chip carrier is designed as a sheet with a carrier layer (23) of plastics material and a conductor path structure (24) with conductor paths (28), and the chip carrier is connected to the chip with interposition of a filling material (37), wherein the conductor paths are connected on their front to attachment faces (32) of the chip and, on their rear side (27), have external bonding regions (26) for forming a flatly distributed attachment face arrangement (34) for the connection of the chip module to an electronic component or a substrate (31), and the conductor paths (28) extend in a plane on the chip bonding side (35) of the carrier layer (23) facing the chip (22), the external bonding regions (26) are formed by recesses in the carrier layer (23) which extend toward the rear side (27) of the conductor paths (28) and the carrier layer (23) extends over the region of the attachment faces (30) of the chip.

Abstract: A method of applying molten solder to connection surfaces on a substrate. The substrate, which has a surface which can be wetted with solder or at least one area which can be wetted while the rest cannot, is immersed in an organic liquid medium whose boiling point is the same as or above the melting point of the solder. Solder is applied to the surface or the area on the substrate where a terminal is to be formed to produce a solder bump, the quantity of solder to be placed on the connection surface is in the liquid medium, at least at the moment when it makes contact with the surface, and the temperature of the liquid medium is at or above the melting point of the solder.

Abstract: A connecting structure (23) for establishing a thermal connection between at lest two components (21, 22) composed of materials with different expansion coefficients, wherein at least one component forms an electronic power element (21) and higher-melting-point materials are used for the contacting, which higher-melting-point materials form isolated connecting elements (29) between the contact surfaces (27, 28) of the components (21, 22).

Abstract: Process and device is available for forming a raised contact metallization 18) on a connection surface (11) of a substrate (10) with the use of a wire bonding device with a bonding tool (26). First of all, a wire end section of a contact material wire (13), drawn from a nose-piece (27), is connected to the connection surface (11) with the application of pressure and temperature, and subsequently a separation of the wire end section (29), connected to the connection surface (11), from the remaining contact material wire (13) takes place.