Patents by Inventor En-Hsiang Yeh

En-Hsiang Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7002393
    Abstract: A switched capacitor circuit includes a capacitor; a switch element for selectively coupling a first node to a second node according to a control signal, wherein the first node is coupled to the capacitor; and a charge circuit coupled to the first node for coupling the first node to a third node and for controlling a first voltage difference across the first switch element in the off-state to be greater than a charge voltage. By ensuring the charge voltage is large enough to minimize a parasitic capacitance of the switch element, the clock feedthrough effect is eliminated, the locking period of the VCO is shortened, and the phase noise of the VCO is minimized.
    Type: Grant
    Filed: March 19, 2004
    Date of Patent: February 21, 2006
    Assignee: MediaTek Inc.
    Inventor: En-Hsiang Yeh
  • Patent number: 7002411
    Abstract: An amplifier with substantially fixed input impedance being operated in a plurality of gain modes. The amplifier includes an input port for receiving an input signal, an amplifying circuit for amplifying the input signal with corresponding amplifying ratios in various gain modes, a plurality of resistive negative feedback circuits electrically connected to the input port and the amplifying circuit for keeping the input impedance substantially fixed in various gain modes, and an output port for outputting the input signal processed by the amplifying circuit.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: February 21, 2006
    Assignee: MediaTek Inc.
    Inventor: En-Hsiang Yeh
  • Patent number: 6975156
    Abstract: A first switch element selectively connects a first node being connected to a capacitor to a second node according to a first control signal. A precharge circuit is connected to the first node for precharging the first node to a precharge voltage for a predetermined time period when the switched capacitor circuit is switched off. The precharge circuit includes a second switch element for selectively connecting a third node to the first node according to a second control signal; a precharge switch element for selectively connecting the precharge voltage to the third node according to the first control signal; and a delay unit for delaying the first control signal to generate the second control signal. In this way, the clock feedthrough effect is minimized and the capacitance of a varactor formed by the first switch element in the off-state is stabilized during the VCO locking period.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: December 13, 2005
    Assignee: MediaTek Inc.
    Inventor: En-Hsiang Yeh
  • Publication number: 20050206434
    Abstract: A switched capacitor circuit includes a capacitor; a switch element for selectively coupling a first node to a second node according to a control signal, wherein the first node is coupled to the capacitor; and a charge circuit coupled to the first node for coupling the first node to a third node and for controlling a first voltage difference across the first switch element in the off-state to be greater than a charge voltage. By ensuring the charge voltage is large enough to minimize a parasitic capacitance of the switch element, the clock feedthrough effect is eliminated, the locking period of the VCO is shortened, and the phase noise of the VCO is minimized.
    Type: Application
    Filed: March 19, 2004
    Publication date: September 22, 2005
    Inventor: En-Hsiang Yeh
  • Publication number: 20050143020
    Abstract: The present invention discloses a transceiver module used in a wireless communication system. The transceiver module includes a transceiver IC, a T/R switch, and an amplification path electrically connected between the transceiver IC and the T/R switch. The transceiver IC includes an amplifier control unit, and a pre-amplifying unit electrically connected to the amplification path. The pre-amplifying unit pre-amplifies a first RF signal to generate a second RF signal. The amplification path amplifies the second RF signal to generate a third RF signal, and sends the third RF signal to the T/R switch. Wherein the transceiver module only uses one discrete power amplifier transistor in the amplification path to amplify the second RF signal.
    Type: Application
    Filed: December 6, 2004
    Publication date: June 30, 2005
    Inventors: Chuansheng Ren, Hongxi Xue, En-Hsiang Yeh
  • Publication number: 20050068086
    Abstract: A switched capacitor circuit includes a positive side capacitor coupled to a first positive side node; a first positive side switch element for selectively coupling the first positive side node to a second node according to a first control signal; and precharge circuit coupled to the first positive side node for precharging the first positive side node to a precharge voltage for a predetermined time when the first positive side switch element is switched off according to the first control signal, and then for charging the first positive side node to a charge voltage until the first positive side switch element is switched on according to the first control signal. By rapidly precharging the first positive side node, the clock feedthrough effect is eliminated and the locking period of the VCO is shortened. Afterwards by charging the first positive side node, the phase noise of the VCO is minimized.
    Type: Application
    Filed: July 14, 2004
    Publication date: March 31, 2005
    Inventor: En-Hsiang Yeh
  • Publication number: 20050068084
    Abstract: A first switch element selectively connects a first node being connected to a capacitor to a second node according to a first control signal. A precharge circuit is connected to the first node for precharging the first node to a precharge voltage for a predetermined time period when the switched capacitor circuit is switched off. The precharge circuit includes a second switch element for selectively connecting a third node to the first node according to a second control signal; a precharge switch element for selectively connecting the precharge voltage to the third node according to the first control signal; and a delay unit for delaying the first control signal to generate the second control signal. In this way, the clock feedthrough effect is minimized and the capacitance of a varactor formed by the first switch element in the off-state is stabilized during the VCO locking period.
    Type: Application
    Filed: September 30, 2003
    Publication date: March 31, 2005
    Inventor: En-Hsiang Yeh
  • Publication number: 20040246039
    Abstract: A switched capacitor circuit for use in a voltage controlled oscillator (VCO) capable of minimizing clock feedthrough effect and an undesired momentary frequency drift in the VCO output frequency when the switched capacitor circuit is shut off. By gradually switching the switched capacitor circuit from an on state to an off state the clock feedthrough effect can be minimized. Several differently sized switch elements are used to selectively switch the capacitor from an internal capacitive node to ground. When switching the switched capacitor circuit to an off state, the control signals are sequenced to shut the switch elements off in order based on decreasing switch size. The smallest switch element can have a low-pass filter added to its control terminal to further decrease the clock feedthrough effect.
    Type: Application
    Filed: June 3, 2003
    Publication date: December 9, 2004
    Inventors: Chi-Ming Hsiao, Guang-Kaai Dehng, Ming-Horng Tsai, Ling-Wei Ke, En-Hsiang Yeh, Chi-Kun Chiu
  • Publication number: 20040246040
    Abstract: A switched capacitor circuit for use in a voltage controlled oscillator (VCO) capable of minimizing clock feedthrough effect and an undesired momentary frequency drift in the VCO output frequency when the switched capacitor circuit is shut off. By gradually switching the switched capacitor circuit from an on state to an off state the clock feedthrough effect can be minimized. Several differently sized switch elements are used to selectively switch the capacitor from an internal capacitive node to ground. When switching the switched capacitor circuit to an off state, the control signals are sequenced to shut the switch elements off in order based on decreasing switch size. The smallest switch element can have a low-pass filter added to its control terminal to further decrease the clock feedthrough effect.
    Type: Application
    Filed: May 6, 2004
    Publication date: December 9, 2004
    Inventors: Chi-Ming Hsiao, Guang-Kaai Dehng, Ming-Horng Tsai, Ling-Wei Ke, En-Hsiang Yeh, Chi-Kun Chiu
  • Publication number: 20040232987
    Abstract: An amplifier with substantially fixed input impedance being operated in a plurality of gain modes. The amplifier includes an input port for receiving an input signal, an amplifying circuit for amplifying the input signal with corresponding amplifying ratios in various gain modes, a plurality of resistive negative feedback circuits electrically connected to the input port and the amplifying circuit for keeping the input impedance substantially fixed in various gain modes, and an output port for outputting the input signal processed by the amplifying circuit.
    Type: Application
    Filed: September 30, 2003
    Publication date: November 25, 2004
    Inventor: En-Hsiang Yeh
  • Publication number: 20040232993
    Abstract: A multi-band low noise amplifier capable of operating in a plurality of band modes includes a plurality of input amplifiers respectively corresponding to the plurality of band modes and an output amplifier. Each input amplifier includes a receiving port for receiving a corresponding input signal in the band mode. The output amplifier includes at least a lowest-impedance port being a lowest-impedance node of the multi-band low noise amplifier and an output port for outputting the input signal processed by the output amplifier. The output amplifier is coupled to the plurality of input amplifiers at the lowest-impedance port.
    Type: Application
    Filed: May 18, 2004
    Publication date: November 25, 2004
    Inventor: En-Hsiang Yeh
  • Publication number: 20040147238
    Abstract: An analog demodulator used in a low IF receiver to down-convert a pair of quadratureIF signals and to perform image-rejection operations. The analog demodulator includes at least one first calibration apparatus and/or at least one second calibration apparatus so that the analog demodulator can reduce DC offset that would cause LO leakage in the low IF receiver by using the first calibration apparatus and/or the second calibration apparatus. The analog demodulator further includes a filtering device connected to a LO generator for removing the 3rd and 5th order harmonic components.
    Type: Application
    Filed: January 28, 2004
    Publication date: July 29, 2004
    Inventors: Shou-Tsung Wang, Chung-Chiang Ku, En-Hsiang Yeh