Patents by Inventor Eun-Soo Nam

Eun-Soo Nam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11505120
    Abstract: A frunk lighting system applied to a vehicle is mounted on a hood provided with an emblem on a front of the vehicle to cover or open a space of a frunk, and has an illuminating direction of light emitted by a light source changed into lighting for the emblem and lighting for the frunk by movement of a rotating mechanism connected to a motor whose rotating direction is changed by a closing signal and an opening signal of the hood, thereby easily implementing an appearance design suitable for a future motorized vehicle with a light-emitting effect for the front emblem of the vehicle, and particularly, automatically switches the lighting, which has illuminated the emblem in a state where the hood is closed, toward the frunk to illuminate a frunk space, thereby maximizing visibility and usability of the frunk.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: November 22, 2022
    Assignees: Hyundai Motor Company, Kia Corporation
    Inventors: Yu-Sang Park, Eun-Soo Park, Seung-Mok Lee, Geun-Hyung Nam
  • Patent number: 11452627
    Abstract: The present invention relates to a stent delivery device having: a first support rod into which a first movable body is inserted; a fixed magnet; and a second support rod into which a second movable body is inserted, wherein a first driving magnet included in the first movable body and a second driving magnet included in the second movable body rotate relative to each other by means of the control of an external magnetic field at a predetermined angle around an axis in a first direction with respect to the fixed magnet, thereby separating a first coupling piece and a second coupling piece from a first coupling groove and a second coupling groove and enabling a stent to unfold.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: September 27, 2022
    Assignee: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Gunhee Jang, Wonseo Lee, Jae Kwang Nam, Eun Soo Jung
  • Publication number: 20220242308
    Abstract: A frunk lighting system applied to a vehicle is mounted on a hood provided with an emblem on a front of the vehicle to cover or open a space of a frunk, and has an illuminating direction of light emitted by a light source changed into lighting for the emblem and lighting for the frunk by movement of a rotating mechanism connected to a motor whose rotating direction is changed by a closing signal and an opening signal of the hood, thereby easily implementing an appearance design suitable for a future motorized vehicle with a light-emitting effect for the front emblem of the vehicle, and particularly, automatically switches the lighting, which has illuminated the emblem in a state where the hood is closed, toward the frunk to illuminate a frunk space, thereby maximizing visibility and usability of the frunk.
    Type: Application
    Filed: June 22, 2021
    Publication date: August 4, 2022
    Inventors: Yu-Sang Park, Eun-Soo Park, Seung-Mok Lee, Geun-Hyung Nam
  • Patent number: 10134854
    Abstract: A high electron mobility transistor includes a substrate including a first surface and a second surface facing each other and having a via hole passing through the first surface and the second surface, an active layer on the first surface, a cap layer on the active layer and including a gate recess region exposing a portion of the active layer, a source electrode and a drain electrode on one of the cap layer and the active layer, an insulating layer on the source electrode and the drain electrode and having on opening corresponding to the gate recess region to expose the gate recess region, a first field electrode on the insulating layer, a gate electrode electrically connected to the first field electrode on the insulating layer, and a second field electrode on the second surface and contacting the active layer through the via hole.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: November 20, 2018
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Ho Kyun Ahn, Dong Min Kang, Yong-Hwan Kwon, Dong-Young Kim, Seong Il Kim, Hae Cheon Kim, Eun Soo Nam, Jae Won Do, Byoung-Gue Min, Hyung Sup Yoon, Sang-Heung Lee, Jong Min Lee, Jong-Won Lim, Hyun Wook Jung, Kyu Jun Cho
  • Patent number: 10020201
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: an active region provided on a substrate; an inlet channel formed as a single cavity buried in one side of the substrate; an outlet channel formed as a single cavity buried in the other side of the substrate; a micro channel array comprising a plurality of micro channels, wherein the plurality of micro channels are formed as a plurality of cavities buried in the substrate, and one end of the micro channel array is connected to a side of the inlet channel and the other end of the micro channel array is connected to a side of the outlet channel; and a micro heat sink array separating the micro channels from one another.
    Type: Grant
    Filed: April 8, 2016
    Date of Patent: July 10, 2018
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chi Hoon Jun, Sang Choon Ko, Seok-Hwan Moon, Woojin Chang, Sung-Bum Bae, Young Rak Park, Je Ho Na, Jae Kyoung Mun, Eun Soo Nam
  • Patent number: 9905654
    Abstract: Provided is a bridge diode according to an embodiment of the inventive concept. The bridge diode includes a first structure including a first lower nitride film and a first upper nitride film, which are laminated on the substrate, a second structure including a second lower nitride film and a second upper nitride film, which are laminated on the substrate, a first electrode structural body disposed on the first structure, and a second electrode structural body disposed on the second structure.
    Type: Grant
    Filed: July 20, 2016
    Date of Patent: February 27, 2018
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Dong Yun Jung, Hyun Soo Lee, Sang Choon Ko, Minki Kim, Jeho Na, Eun Soo Nam, Young Rak Park, Junbo Park, Hyung Seok Lee, Hyun-Gyu Jang, Chi Hoon Jun
  • Patent number: 9899226
    Abstract: Provided herein is a semiconductor device including a substrate; an active layer formed on top of the substrate; a protective layer formed on top of the active layer and having a first aperture; a source electrode, driving gate electrode and drain electrode formed on top of the protective layer; and a first additional gate electrode formed on top of the first aperture, wherein an electric field is applied to the active layer, protective layer and driving gate electrode due to a voltage applied to each of the source electrode, drain electrode and driving gate electrode, and the first additional gate electrode is configured to attenuate a size of the electric field applied to at least a portion of the active layer, protective layer and driving gate electrode.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: February 20, 2018
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Ho Kyun Ahn, Hae Cheon Kim, Jong Won Lim, Dong Min Kang, Yong Hwan Kwon, Seong Il Kim, Zin Sig Kim, Eun Soo Nam, Byoung Gue Min, Hyung Sup Yoon, Kyung Ho Lee, Jong Min Lee, Kyu Jun Cho
  • Patent number: 9755027
    Abstract: Provided is an electronic device. The electronic device includes a first semiconductor layer and a second semiconductor layer sequentially stacked on a substrate and a source electrode, a gate electrode, and a drain electrode arranged on the second semiconductor layer. The electronic device further includes a field plate which is electrically connected to the source electrode and extends towards the drain electrode, wherein the field plate becomes farther away from the substrate as the field plate becomes closer to the drain electrode.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: September 5, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hyung Seok Lee, Ki Hwan Kim, Sang Choon Ko, Zin-Sig Kim, Jeho Na, Eun Soo Nam, Young Rak Park, Junbo Park, Chi hoon Jun, Dong Yun Jung
  • Publication number: 20170236909
    Abstract: A high electron mobility transistor includes a substrate including a first surface and a second surface facing each other and having a via hole passing through the first surface and the second surface, an active layer on the first surface, a cap layer on the active layer and including a gate recess region exposing a portion of the active layer, a source electrode and a drain electrode on one of the cap layer and the active layer, an insulating layer on the source electrode and the drain electrode and having on opening corresponding to the gate recess region to expose the gate recess region, a first field electrode on the insulating layer, a gate electrode electrically connected to the first field electrode on the insulating layer, and a second field electrode on the second surface and contacting the active layer through the via hole.
    Type: Application
    Filed: August 26, 2016
    Publication date: August 17, 2017
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Ho Kyun AHN, Dong Min KANG, Yong-Hwan KWON, Dong-Young KIM, SEONG IL KIM, Hae Cheon KIM, Eun Soo NAM, Jae Won DO, Byoung-Gue MIN, Hyung Sup YOON, Sang-Heung LEE, Jong Min LEE, Jong-Won LIM, Hyun Wook JUNG, Kyu Jun CHO
  • Patent number: 9613884
    Abstract: Provided is a semiconductor device. The semiconductor device includes a substrate including a cantilever configured to generate a flow of cooling media through dynamic movement, an active area on the substrate which an electronic device is provided on, an insulation layer disposed to be spaced apart from the active area on the substrate, a lower electrode on the insulation layer, a piezoelectric film on the lower electrode, and an upper electrode on the piezoelectric film.
    Type: Grant
    Filed: October 1, 2015
    Date of Patent: April 4, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chi Hoon Jun, Jeho Na, Dong Yun Jung, Sang Choon Ko, Eun Soo Nam, Hyung Seok Lee
  • Publication number: 20170077282
    Abstract: Provided is an electronic device. The electronic device includes a first semiconductor layer and a second semiconductor layer sequentially stacked on a substrate and a source electrode, a gate electrode, and a drain electrode arranged on the second semiconductor layer. The electronic device further includes a field plate which is electrically connected to the source electrode and extends towards the drain electrode, wherein the field plate becomes farther away from the substrate as the field plate becomes closer to the drain electrode.
    Type: Application
    Filed: September 14, 2016
    Publication date: March 16, 2017
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hyung Seok LEE, Ki Hwan KIM, Sang Choon KO, Zin-Sig KIM, Jeho NA, EUN SOO NAM, Young Rak PARK, Junbo PARK, Chi Hoon JUN, Dong Yun JUNG
  • Publication number: 20170062385
    Abstract: Disclosed is a power converting device including: a first laminate having a plurality of non-magnetic substrates which are laminated; electronic devices disposed on at least one of the non-magnetic substrates; first conductive patterns disposed on the non-magnetic substrate on which the electronic devices are disposed, the first conductive patterns being connected to the electronic devices; at least one via electrode connecting the respective first conductive patterns to each other; a second laminate disposed on one side of the first laminate and having a plurality of magnetic sheets which are laminated; second conductive patterns disposed on at least two magnetic sheets among the plurality of magnetic sheets; and at least one via electrode connecting the respective second conductive patterns to each other, wherein the first and second via electrodes are connected to each other.
    Type: Application
    Filed: July 27, 2016
    Publication date: March 2, 2017
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Dong Yun JUNG, Sang Choon KO, Chi Hoon JUN, Minki KIM, Jeho NA, EUN SOO NAM, Young Rak PARK, Junbo PARK, Hyun Soo LEE, Hyung Seok LEE, Hyun-Gyu JANG
  • Publication number: 20170025550
    Abstract: Provided is a bridge diode according to an embodiment of the inventive concept. The bridge diode includes a first structure including a first lower nitride film and a first upper nitride film, which are laminated on the substrate, a second structure including a second lower nitride film and a second upper nitride film, which are laminated on the substrate, a first electrode structural body disposed on the first structure, and a second electrode structural body disposed on the second structure.
    Type: Application
    Filed: July 20, 2016
    Publication date: January 26, 2017
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Dong Yun JUNG, Hyun Soo LEE, Sang Choon KO, Minki KIM, Jeho NA, EUN SOO NAM, Young Rak PARK, Junbo PARK, Hyung Seok LEE, Hyun-Gyu JANG, Chi Hoon JUN
  • Publication number: 20160380119
    Abstract: A first nitride semiconductor layer of a semiconductor device is provided on a substrate, a second nitride semiconductor layer is provided on the first nitride semiconductor layer, a first ohmic metal and a second ohmic metal are provided on the second nitride semiconductor layer, a recess region is provided in the second nitride semiconductor layer between the first ohmic metal and the second ohmic metal, a passivation layer covers side of the first ohmic metal and a bottom surface and sides of the recess region, and a Schottky electrode is provided on the first ohmic metal and extends into the recess region.
    Type: Application
    Filed: March 30, 2016
    Publication date: December 29, 2016
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Dong Yun JUNG, Hyun Soo LEE, Sang Choon KO, Jeong-Jin KIM, Zin-Sig KIM, Jeho NA, Eun Soo NAM, Jae Kyoung MUN, Young Rak PARK, Sung-Bum BAE, Hyung Seok LEE, Woojin CHANG, Hyungyu JANG, Chi Hoon JUN
  • Patent number: 9490214
    Abstract: A semiconductor device may include a substrate having a lower via-hole, an epitaxial layer having an opening exposing a top surface of the substrate, a semiconductor chip disposed on the top surface of the substrate and including first, second, and third electrodes, an upper metal layer connected to the first electrode, a supporting substrate disposed on the upper metal layer and having an upper via-hole, an upper pad disposed on the substrate and extending into the upper via-hole, a lower pad connected to the second electrode in the opening, and a lower metal layer covering a bottom surface of the substrate and connected to the lower pad through the lower via-hole.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: November 8, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Byoung-Gue Min, Sang Choon Ko, Jong-Won Lim, Hokyun Ahn, Hyung Sup Yoon, Jae Kyoung Mun, Eun Soo Nam
  • Publication number: 20160260653
    Abstract: Provided is a semiconductor device. The semiconductor device includes a substrate including a cantilever configured to generate a flow of cooling media through dynamic movement, an active area on the substrate which an electronic device is provided on, an insulation layer disposed to be spaced apart from the active area on the substrate, a lower electrode on the insulation layer, a piezoelectric film on the lower electrode, and an upper electrode on the piezoelectric film.
    Type: Application
    Filed: October 1, 2015
    Publication date: September 8, 2016
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chi Hoon JUN, Jeho NA, Dong Yun JUNG, Sang Choon KO, Eun Soo NAM, Hyung Seok LEE
  • Publication number: 20160225631
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: an active region provided on a substrate; an inlet channel formed as a single cavity buried in one side of the substrate; an outlet channel formed as a single cavity buried in the other side of the substrate; a micro channel array comprising a plurality of micro channels, wherein the plurality of micro channels are formed as a plurality of cavities buried in the substrate, and one end of the micro channel array is connected to a side of the inlet channel and the other end of the micro channel array is connected to a side of the outlet channel; and a micro heat sink array separating the micro channels from one another.
    Type: Application
    Filed: April 8, 2016
    Publication date: August 4, 2016
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chi Hoon JUN, Sang Choon KO, Seok-Hwan MOON, Woojin CHANG, Sung-Bum BAE, Young Rak PARK, Je Ho NA, Jae Kyoung MUN, Eun Soo NAM
  • Patent number: 9337121
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: an active region provided on a substrate; an inlet channel formed as a single cavity buried in one side of the substrate; an outlet channel formed as a single cavity buried in the other side of the substrate; a micro channel array comprising a plurality of micro channels, wherein the plurality of micro channels are formed as a plurality of cavities buried in the substrate, and one end of the micro channel array is connected to a side of the inlet channel and the other end of the micro channel array is connected to a side of the outlet channel; and a micro heat sink array separating the micro channels from one another.
    Type: Grant
    Filed: July 7, 2014
    Date of Patent: May 10, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chi Hoon Jun, Sang Choon Ko, Seok-Hwan Moon, Woojin Chang, Sung-Bum Bae, Young Rak Park, Je Ho Na, Jae Kyoung Mun, Eun Soo Nam
  • Patent number: 9270381
    Abstract: Disclosed are a method and an apparatus for transmitting and receiving coherent optical OFDM.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: February 23, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chun Ju Youn, Yong-Hwan Kwon, Duk Jun Kim, Jong-Hoi Kim, Joong-Seon Choe, Kwang-Seong Choi, Eun Soo Nam
  • Publication number: 20160020147
    Abstract: A manufacturing method for a variable capacitor includes forming a first element of which a capacitance value depends on a voltage applied to both of two terminals of a first area on a substrate, forming a second element having a capacitance value fixed to a second area on the substrate adjacent to the first area, and forming metallic wires for connecting the first element and the second element and connecting the first element and the second element with the outside. The first element maybe a bipolar transistor that may include a diode. The second element maybe a capacitor that includes a dielectric.
    Type: Application
    Filed: September 22, 2015
    Publication date: January 21, 2016
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jongmin LEE, Byoung-Gue MIN, Seong-il KIM, Hyung Sup YOON, Jae Kyoung MUN, Eun Soo NAM