Abstract: A method for making graphene-based material is disclosed. A graphene oxide dispersion includes graphene oxide dispersed in solvent. A hydrogen sulfide gas is introduced to the graphene oxide dispersion at a reacting temperature to achieve a graphene dispersion. The hydrogen sulfide reduces graphene oxide into graphene, and elemental sulfur produced from the hydrogen sulfide is deposited on surfaces of the graphene. The solvent is removed to achieve a graphene composite material. Further, a graphene composite material and a lithium sulfur battery using the graphene composite material are also disclosed.

Abstract: The device and method are provided to increase anhydrosugars yield during pyrolysis of biomass. This increase is achieved by injection of a liquid or gas into the vapor stream of any pyrolysis reactor prior to the reactor condensers. A second feature of our technology is the utilization of sonication, microwave excitation, or shear mixing of the biomass to increase the acid catalyst rate for demineralization or removal of hemicellulose prior to pyrolysis. The increased reactivity of these treatments reduces reaction time as well as the required amount of catalyst to less than half of that otherwise required. A fractional condensation system employed by our pyrolysis reactor is another feature of our technology. This system condenses bio-oil pyrolysis vapors to various desired fractions by differential temperature manipulation of individual condensers comprising a condenser chain.

Abstract: Embodiments of the present invention provide an optical module, including an MT-Ferrule and a photoelectric conversion unit. The MT-Ferrule is configured to connect multiple channels of optical channels outside the optical module with multiple channels of optical channels of the photoelectric conversion unit, and implement coupling and transmission of multiple channels of single-mode optical signals between the two. The photoelectric conversion unit is configured to convert multiple channels of single-mode optical signals input from the MT-Ferrule into multiple channels of electrical signals and output the multiple channels of electrical signals, and generate, driven by multiple channels of input electrical signals, multiple channels of single-mode optical signals and output the multiple channels of single-mode optical signals to the MT-Ferrule.

Abstract: A method of making a semiconductor device includes forming a high-k dielectric layer over a substrate; and forming a titanium nitride layer over the high-k dielectric layer. The method further includes performing a silicon treatment on the titanium nitride layer to form at least one silicon monolayer over the titanium nitride layer. The method further includes annealing the semiconductor device to form a TiSiON layer over a remaining portion of the titanium nitride layer.

Abstract: A method of fabricating a gate structure includes depositing a high dielectric constant (high-k) dielectric layer over a substrate. The method further includes performing a multi-stage preheat high-temperature anneal. Performing the multi-stage preheat high-temperature anneal includes performing a first stage preheat at a temperature in a range from about 400° C. to about 600° C., performing a second stage preheat at a temperature in a range from about 700° C. to about 900° C., and performing a high temperature anneal at a peak temperature in a range from 875° C. to about 1200° C.

Abstract: An electrical connector comprises an insulative housing, a plurality of contacts retained in the insulative housing and a metal shell enclosing the insulative housing. The insulative housing has a inserting slot. The contacts include a plurality of grounding contacts and signal contacts, the contacts each comprise a retaining portion retained in the insulative housing, a contacting portion extending forwardly from a side of the retaining potion and extending into the inserting slot and a soldering portion extending from the other side of the retaining portion. The shield shell has a top wall covering a top of the insulative housing and the shield shell comprising at least a pair of resisting arms, the pair of resisting arms resisting the two sides of the grounding contact along a left-to-right direction.

Abstract: An electrical card connector comprises an insulative housing, a plurality of contacts mounted to the insulative housing and a cover covering the insulative housing. The insulative housing defines a receiving space and a mounting wall in a rear of the receiving space. The contact has a contacting portion extending into the receiving space and a retaining portion retained to the mounting wall. The cover has a top wall covering a top of the receiving space. The contacts include a grounding contact, the top wall has an elastic finger extending therefrom and touching the grounding contact to achieve grounding. By this arrangement, the electrical card connector has an additional grounding path, and improves the performance of the electrical card connector.

Abstract: A semiconductor device including a substrate having a source region, a drain region, and a channel region disposed between the source region and the drain region. Additionally, the semiconductor device includes a high-k dielectric layer formed over the channel region, an n-metal formed over the high-k dielectric layer and a barrier layer formed between the high-k dielectric layer and the n-metal, the barrier layer including a layer of annealed silicon.

Abstract: A semiconductor device with a metal gate is disclosed. An exemplary semiconductor device with a metal gate includes a semiconductor substrate, source and drain features on the semiconductor substrate, a gate stack over the semiconductor substrate and disposed between the source and drain features. The gate stack includes a HK dielectric layer formed over the semiconductor substrate, a plurality of barrier layers of a metal compound formed on top of the HK dielectric layer, wherein each of the barrier layers has a different chemical composition; and a stack of metals gate layers deposited over the plurality of barrier layers.

Abstract: A resin composition includes (A) 100 parts by weight of epoxy resin; (B) 20 to 100 parts by weight of polybutadiene styrene divinylbenzene graft terpolymer resin; (C) 2 to 20 parts by weight of di-tert-butylhydroquinone (DTBHQ); (D) 5 to 50 parts by weight of polyphenyl ether modified cyanate ester resin; and at least one of (E) inorganic filler, (F) chain extending sealing agent, and (G) catalyst. The resin composition is characterized by specific ingredients and proportions thereof to attain high heat resistance, low dielectric constant Dk, and low dielectric dissipation factor Df, and being halogen-free, and therefore is applicable to protective film of printed circuit boards, insulating protective film of electronic components, and resin insulation film of leadframes.

Abstract: Multi-stage preheat high-temperature anneal processes after the deposition of the gate dielectric layer(s) reduce the number of interfacial sites and improve the negative bias temperature instability (NTBI) performance of a p-type metal-oxide-semiconductor transistor (PMOS). The gate dielectric layers may include an interfacial oxide layer and a high-k dielectric layer. The multi-stage preheat is designed to reduce dopant deactivation and to improve inter-mixing between the interfacial oxide layer and the high-k dielectric layer. The high-temperature anneal is used to reduce the number of interfacial sites at the interface between the silicon substrate and the interfacial oxide layer.

Abstract: Buffer layer and method of forming the buffer layer, the method including forming a high-k dielectric layer, forming a titanium nitride layer over the high-k dielectric layer, forming a silicon layer on the titanium nitride layer, annealing the silicon layer into the titanium nitride layer to form an annealed silicon layer and forming an n-metal over the high-k dielectric layer.

Abstract: A card connector (100) includes an insulative housing (1), a number of conductive contacts (2) retained in the insulative housing (1) and a shell (3) enclosing over the insulative housing (1). The shell (3) includes a top wall (31) and a pair of side walls (32) downwardly extending from two sides of the top wall (31). The side wall (32) has a latching arm (36) at the bottom thereof to upwardly abut against a bottom face (12) of the insulative housing (1). The insulative housing (1) has a top surface (11) facing the top wall (31). The top surface (11) and the top wall (31) define a receiving cavity (30) to receive an electrical card. The side wall (32) also has a limiting portion (33) extending into the receiving cavity (30) and downwardly abutting against the top surface (11) of the insulative housing (1). Therefore, the size of the card connector (100) is smaller which is in favor of a small-scale development of the card connector (100).

Abstract: An optical module manufacturing method includes: forming a first waveguide layer and a second waveguide layer on a first substrate and a second substrate respectively, or forming a first waveguide layer and a second waveguide layer on a first surface of a first substrate and a second surface of the first substrate respectively; disposing the first substrate on the second substrate; disposing a filter at an end of the first waveguide layer and the second waveguide layer, so that the filter is aligned with the second waveguide layer; and disposing a prism on the filter, so that a first reflective surface of the prism is aligned with the first waveguide layer, and a second reflective surface is aligned with the second waveguide layer. Embodiments of the present application further disclose an optical module.

Abstract: A baking transmission mechanism includes a dustproof assembly, which includes a box, a main transport wheel, and a drive unit. The first transportation assembly includes a first oven assembly, a first feed wheel, a first discharge wheel, a first pulley assembly, and a second pulley assembly. The first feed wheel and the first discharge wheel are located at a top of the first oven assembly, and the first pulley assembly and the second pulley assembly are located at opposite sides of the first oven assembly. The second transportation assembly includes a second oven assembly, a second feed wheel, a second discharge wheel, and a third pulley assembly, wherein the second feed wheel and the second discharge wheel are located at a top of the second oven assembly, and the third pulley assembly is adjacent to the second pulley assembly.

Abstract: A method for producing biofuel and other hydrocarbons from bio-oil is disclosed. The method does not require the use of hydrogen derived from fossil fuel.

Abstract: An electrical card (100) connector includes an insulative housing (1), a set of contacts (2) received in the housing and a locking portion (17) retained in the housing (1). The housing (1) defines a receiving cavity (10) for receiving an electrical card. The locking portion (17) has an elastic arm (171) connected with the housing (1) and a latching portion (172) extending forwardly from the elastic arm (171) and extending into the receiving cavity (10) to retain the electrical card. The locking portion (17) can deflect along a left to right direction under stress, so the insertion and extraction force of the electrical card insert in and eject out of the receiving cavity (10) moderately, it can not only ensure the electrical card connector (100) lock the electrical card firmly but also ensure the electrical card not be damaged easily.

Abstract: A method for fabricating a semiconductor device is disclosed. In one embodiment, the method may include providing a substrate; forming a gate structure including a first dummy gate over the substrate; removing the first dummy gate from the gate structure to form a trench; forming an interfacial layer, high-k dielectric layer, and capping layer to partially fill in the trench; forming a second dummy gate over the capping layer, wherein the second dummy gate fills the trench; and replacing the second dummy gate with a metal gate. In one embodiment, the method may include providing a substrate; forming an interfacial layer over the substrate; forming a high-k dielectric layer over the interfacial layer; forming an etch stop layer over the high-k dielectric layer; forming a capping layer including a low thermal budget silicon over the etch stop layer; forming a dummy gate layer over the capping layer; forming a gate structure; and performing a gate replacement process.

Abstract: A printed circuit board (PCB) includes a first dielectric layer and a differential cable structure embedded in the dielectric layer. The differential cable structure includes a first inner conductor, a second inner conductor, a dielectric surrounding portions of the first inner conductor and portions of the second inner conductor, and a ground shield surrounding the dielectric.