Abstract: The present disclosure relates to an integrated chip structure. The integrated chip structure includes a dielectric stack disposed on a substrate. The integrated chip structure further includes one or more piezoelectric ultrasonic transducers (PMUTs) and one or more capacitive ultrasonic transducers (CMUTs). The one or more PMUTs include a piezoelectric stack disposed within the dielectric stack over one or more PMUT cavities. The one or more CMUTs include electrodes disposed within the dielectric stack and separated by one or more CMUT cavities. An isolation chamber is arranged within the dielectric stack laterally between the one or more PMUTs and the one or more CMUTs. The isolation chamber vertically extends past at least a part of both the one or more PMUTs and the one or more CMUTs.

Abstract: A bioFET device includes a semiconductor substrate having a first surface and an opposite, parallel second surface and a plurality of bioFET sensors on the semiconductor substrate. Each of the bioFET sensors includes a gate formed on the first surface of the semiconductor substrate and a channel region formed within the semiconductor substrate beneath the gate and between source/drain (S/D) regions in the semiconductor substrate. The channel region includes a portion of the second surface of the semiconductor substrate. An isolation layer is disposed on the second surface of the semiconductor substrate. The isolation layer has an opening positioned over the channel region of more than one bioFET sensor of the plurality of bioFET sensors. An interface layer is disposed on the channel region of the more than one bioFET sensor in the opening.

Abstract: The structure of a semiconductor device with an array of bioFET sensors, a biometric fingerprint sensor, and a temperature sensor and a method of fabricating the semiconductor device are disclosed. A method for fabricating the semiconductor device includes forming a gate electrode on a first side of a semiconductor substrate, forming a channel region between source and drain regions within the semiconductor substrate, and forming a piezoelectric sensor region on a second side of the semiconductor substrate. The second side is substantially parallel and opposite to the first side. The method further includes forming a temperature sensing electrode on the second side during the forming of the piezoelectric sensor region, forming a sensing well on the channel region, and binding capture reagents on the sensing well.

Abstract: In some embodiments, a piezoelectric biosensor is provided. The piezoelectric biosensor includes a semiconductor substrate. A first electrode is disposed over the semiconductor substrate. A piezoelectric structure is disposed on the first electrode. A second electrode is disposed on the piezoelectric structure. A sensing reservoir is disposed over the piezoelectric structure and exposed to an ambient environment, where the sensing reservoir is configured to collect a fluid comprising a number of bio-entities.

Abstract: Various embodiments of the present disclosure are directed to a normally-open piezoelectric microelectromechanical systems (MEMS) device. A cantilever has a first end overlying and bonded to a substrate and further has a second end, opposite the first end, overlying an actuator cavity. A piezoelectric actuator is on the cantilever. A valve vane is bonded to the second end of the cantilever and further overlies a valve cavity laterally adjacent to the actuator cavity. The cantilever curves downward from the first end to the second end, such that the valve vane is inclined and the valve cavity is open. Actuation of the piezoelectric actuator curves the cantilever upward to close the valve cavity.

Abstract: A sensor array includes a semiconductor substrate, a first plurality of FET sensors and a second plurality of FET sensors. Each of the FET sensors includes a channel region between a source and a drain region in the semiconductor substrate and underlying a gate structure disposed on a first side of the channel region, and a dielectric layer disposed on a second side of the channel region opposite from the first side of the channel region. A first plurality of capture reagents is coupled to the dielectric layer over the channel region of the first plurality of FET sensors, and a second plurality of capture reagents is coupled to the dielectric layer over the channel region of the second plurality of FET sensors. The second plurality of capture reagents is different from the first plurality of capture reagents.

Abstract: A device includes a fin on a substrate; a first transistor, including: a drain region and a first source region in the fin; and a first gate structure on the fin between the first source region and the drain region; a second transistor, including: the drain region and a second source region in the fin; and a second gate structure on the fin between the second source region and the drain region; a first resistor, including: the first source region and a first resistor region in the fin; and a third gate structure on the fin between the first source region and the first resistor region; and a second resistor, including: the second source region and a second resistor region in the fin; and a fourth gate structure on the fin between the second source region and the second resistor region.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.

Abstract: The present invention provides a rear-door heat dissipation system with a horizontally arranged and series-connected design comprising a heat dissipation cabinet, at least one condenser unit, and a heat dissipation device. The heat dissipation cabinet is provided therein with an active heat source device and a cabinet back door on one side of the heat dissipation cabinet, wherein the cabinet back door is provided with an air circulation unit. The condenser unit is provided on the cabinet back door, comprising a plurality of condensers. Wherein the circulation tube system of each of the condensers comprises a first and second main-channel aluminum tube, and aluminum flat tubes. Each aluminum flat tube has two ends respectively connecting to the first and second main-channel aluminum tube. An airflow channel is formed between each two adjacent aluminum flat tubes to enable air circulation, and each airflow channel is provided with an aluminum fin.

Abstract: Provided is a back cover. The back cover includes a body, a movable member, and a first to-be-sensed member. The body includes a notch. The movable member is movably disposed on the body. The first to-be-sensed member is disposed on the movable member. When the movable member is located in a first position relative to the body, a projection of the movable member onto the body is located outside the notch. When the movable member moves to a second position relative to the body, the movable member covers at least part of the notch. Further provided is an electronic assembly having the foregoing back cover. The movable member of the back cover is movable relative to the body, to be located outside the notch or cover at least part of the notch. When the back cover is applied on the electronic device, the movable member is configured to stop an image acquisition assembly of the electronic device to prevent the image acquisition assembly from being accidentally thrown out.

Abstract: The present invention provides an immersion heat exchange system comprising cooling equipment and heat exchange equipment connected to the cooling equipment. The cooling equipment comprises a primary container and at least one cooling tank provided in the primary container. The cooling tank holds a cooling liquid for an active heat source device to be immersed in the cooling liquid. The heat exchange equipment comprises a secondary container and at least one heat exchange tank provided in the secondary container. The heat exchange tank provided therein with at least one condenser. The condenser divides the heat exchange tank into an input portion and an output portion. There is at least one circulation device corresponding to and working with the input portion and/or the output portion of the heat exchange tank to make the cooling liquid exchanged and circulated between the cooling tank and the heat exchange tank.

Abstract: A heat exchanger module for immersion cooling system includes cooling equipment and heat exchange equipment connected to the cooling equipment. The cooling equipment includes a primary container and at least one cooling tank provided in the primary container. The cooling tank holds a cooling liquid for an active heat source device to be immersed in the cooling liquid. The heat exchange equipment includes a secondary container and at least one heat exchange tank provided in the secondary container. The heat exchange tank is provided therein with at least one condenser. The condenser divides the heat exchange tank into an input portion and an output portion. There is at least one circulation device corresponding to and working with the input portion and/or the output portion of the heat exchange tank to make the cooling liquid exchanged and circulated between the cooling tank and the heat exchange tank.

Abstract: A heat dissipation device for a multipoint heat source includes an evaporator unit and a condenser unit. The evaporator unit includes a multi-channel duct. At least one narrow side of the multi-channel duct has a communication opening in communication with the bottom side of at least one tube of the condenser unit, and a wide side of the multi-channel duct is attached to the multipoint heat source so that a heat conduction medium can be circulated through the evaporator unit and the condenser unit while alternating between a liquid phase and a gaseous phase.

Abstract: A device includes a fin on a substrate; a first transistor, including: a drain region and a first source region in the fin; and a first gate structure on the fin between the first source region and the drain region; a second transistor, including: the drain region and a second source region in the fin; and a second gate structure on the fin between the second source region and the drain region; a first resistor, including: the first source region and a first resistor region in the fin; and a third gate structure on the fin between the first source region and the first resistor region; and a second resistor, including: the second source region and a second resistor region in the fin; and a fourth gate structure on the fin between the second source region and the second resistor region.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a substrate comprising first opposing sidewalls defining a first trench and second opposing sidewalls defining a second trench laterally offset from the first trench. A stack of layers comprises a plurality of conductive layers and a plurality of dielectric layers alternatingly stacked with the conductive layers. The stack of layers comprises a first segment in the first trench and a second segment in the second trench. A first lateral distance between the first segment and the second segment aligned with a first surface of the substrate is greater than a second lateral distance between the first segment and the second segment below the first surface of the substrate.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.

Abstract: In some embodiments, the present disclosure relates to a method in which a first set of one or more voltage pulses is applied to a piezoelectric device over a first time period. During the first time period, the method determines whether a performance parameter of the piezoelectric device has a first value that deviates from a reference value by more than a predetermined value. Based on whether the first value deviates from the reference value by more than the predetermined value, the method selectively applies a second set of one or more voltage pulses to the piezoelectric device over a second time period. The second time period is after the first time period and the second set of one or more voltage pulses differs in magnitude and/or polarity from the first set of one or more voltage pulses.

Abstract: In some embodiments, the present disclosure relates to an integrated chip structure that includes a metal-insulator-metal (MIM) device disposed over a substrate. The MIM device includes a first electrode and a second electrode stacked over the substrate. A dielectric layer is arranged between the first electrode and the second electrode. A getter layer is disposed over the substrate and is separated from the dielectric layer by the first electrode. The MIM device includes a middle portion having a first non-zero concentration of hydrogen and a peripheral portion having both a second non-zero concentration of hydrogen that is greater than the first non-zero concentration and a third non-zero concentration of hydrogen that is less than the first non-zero concentration. The middle portion includes the dielectric layer and the peripheral portion includes the getter layer.

Abstract: A modulator heater structure may include a plurality of regions having different thicknesses. For example, a heater ring of the modulator heater structure may have a first thickness. A heater pad of the modulator heater structure, that is configured to provide an electrical current to the heater ring, may have a second thickness that is greater than the first thickness. The lesser thickness of the heater ring of the modulator heater structure provides high electrical resistance in the heater ring, which enables the heater ring to quickly and efficiently generate heat. The greater thickness of the heater pad provides low electrical resistance in the second region, which enables the electrical current to be efficiently provided through the heater pad to the heater ring with reduced heat dissipation in the hear pad due to the lower electrical current dissipation in the heater pad.