Patents by Inventor Fen Huang

Fen Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11107899
    Abstract: A semiconductor device and method for forming the semiconductor device are provided. In some embodiments, a semiconductor substrate comprises a device region. An isolation structure extends laterally in a closed path to demarcate the device region. A first source/drain region and a second source/drain region are in the device region and laterally spaced. A sidewall of the first source/drain region directly contacts the isolation structure at a first isolation structure sidewall, and remaining sidewalls of the first source/drain region are spaced from the isolation structure. A selectively-conductive channel is in the device region, and extends laterally from the first source/drain region to the second source/drain region. A plate comprises a central portion and a first peripheral portion. The central portion overlies the selectively-conductive channel, and the first peripheral portion protrudes from the central portion towards the first isolation structure sidewall.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: August 31, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chang Cheng, Fu-Yu Chu, Ming-Ta Lei, Ruey-Hsin Liu, Shih-Fen Huang
  • Publication number: 20210231603
    Abstract: A sensor array includes a semiconductor substrate, a first plurality of FET sensors and a second plurality of FET sensors. Each of the FET sensors includes a channel region between a source and a drain region in the semiconductor substrate and underlying a gate structure disposed on a first side of the channel region, and a dielectric layer disposed on a second side of the channel region opposite from the first side of the channel region. A first plurality of capture reagents is coupled to the dielectric layer over the channel region of the first plurality of FET sensors, and a second plurality of capture reagents is coupled to the dielectric layer over the channel region of the second plurality of FET sensors. The second plurality of capture reagents is different from the first plurality of capture reagents.
    Type: Application
    Filed: March 22, 2021
    Publication date: July 29, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ching-Hui LIN, Chun-Ren CHENG, Shih-Fen HUANG, Fu-Chun HUANG
  • Patent number: 11063157
    Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a pillar structure abutting a trench capacitor. A substrate has sidewalls that define a trench. The trench extends into a front-side surface of the substrate. The trench capacitor includes a plurality of capacitor electrode layers and a plurality of capacitor dielectric layers that respectively line the trench and define a cavity within the substrate. The pillar structure is disposed within the substrate. The pillar structure has a first width and a second width less than the first width. The first width is aligned with the front-side surface of the substrate and the second width is aligned with a first point disposed beneath the front-side surface.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: July 13, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsin-Li Cheng, Jyun-Ying Lin, Alexander Kalnitsky, Shih-Fen Huang, Shu-Hui Su, Ting-Chen Hsu, Tuo-Hsin Chien, Felix Ying-Kit Tsui, Shi-Min Wu, Yu-Chi Chang
  • Publication number: 20210202761
    Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a pillar structure abutting a trench capacitor. A substrate has sidewalls that define a trench. The trench extends into a front-side surface of the substrate. The trench capacitor includes a plurality of capacitor electrode layers and a plurality of capacitor dielectric layers that respectively line the trench and define a cavity within the substrate. The pillar structure is disposed within the substrate. The pillar structure has a first width and a second width less than the first width. The first width is aligned with the front-side surface of the substrate and the second width is aligned with a first point disposed beneath the front-side surface.
    Type: Application
    Filed: December 27, 2019
    Publication date: July 1, 2021
    Inventors: Hsin-Li Cheng, Jyun-Ying Lin, Alexander Kalnitsky, Shih-Fen Huang, Shu-Hui Su, Ting-Chen Hsu, Tuo-Hsin Chien, Felix Ying-Kit Tsui, Shi-Min Wu, Yu-Chi Chang
  • Publication number: 20210167205
    Abstract: A high-voltage device includes a substrate, at least a first isolation in the substrate, a first well region, a frame-like gate structure over the first well region and covering a portion of the first isolation, a drain region in the first well region and separated from the frame-like gate structure by the first isolation, and a source region separated from the drain region by the first isolation and the frame-like gate structure. The first well region, the drain region and the source region include a first conductivity type, and the substrate includes a second conductivity type. The first conductivity type and the second conductivity type are complementary to each other.
    Type: Application
    Filed: June 19, 2020
    Publication date: June 3, 2021
    Inventors: HUNG-SEN WANG, YUN-TA TSAI, RUEY-HSIN LIU, SHIH-FEN HUANG, HO-CHUN LIOU
  • Patent number: 11011610
    Abstract: A semiconductor device and method for forming the semiconductor device are provided. In some embodiments, a semiconductor substrate comprises a device region. An isolation structure extends laterally in a closed path to demarcate the device region. A first source/drain region and a second source/drain region are in the device region and laterally spaced. A sidewall of the first source/drain region directly contacts the isolation structure at a first isolation structure sidewall, and remaining sidewalls of the first source/drain region are spaced from the isolation structure. A selectively-conductive channel is in the device region, and extends laterally from the first source/drain region to the second source/drain region. A plate comprises a central portion and a first peripheral portion. The central portion overlies the selectively-conductive channel, and the first peripheral portion protrudes from the central portion towards the first isolation structure sidewall.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: May 18, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Chang Cheng, Fu-Yu Chu, Ming-Ta Lei, Ruey-Hsin Liu, Shih-Fen Huang
  • Publication number: 20210121508
    Abstract: A vaginitis pathogen-inhibiting composition comprises a fermentate of lactic acid bacteria, which is generated by jointly fermenting a lactic acid bacteria strain and Streptococcus thermophilus in a medium containing at least one of milk, powdered milk, and casein. The lactic acid bacteria strain includes an AP-32 strain of Lactobacillus salivarius subsp. Salicinius; an F-1 strain of Lactobacillus rhamnosus; a GL-165 strain of Lactobacillus rhamnosus; a CP-9 strain of Bifidobacterium animalis subsp. lactis; a Bf-688 strain of Bifidobacterium bifidum; a Bv-889 strain of Bifidobacterium breve; or combinations thereof. The above-mentioned fermentate of the lactic acid bacteria strain can inhibit growth of vaginitis pathogens and may be in form of a food composition, a pharmaceutical composition, or a vagina-cleaning composition.
    Type: Application
    Filed: July 27, 2020
    Publication date: April 29, 2021
    Inventors: PEI-SHAN HSIEH, CHUNG-WEI KUO, YI-CHUN TSAI, HSIEH-HSUN HO, YI WEI KUO, YU FEN HUANG
  • Patent number: 10991455
    Abstract: An augmented reality with real-time interactive analysis method and a system thereof are provided. The method includes: starting an application from a portable electronic device by a user; reading a checklist by the application; identifying basic data fields and biochemical fields of the checklist; recording the basic data fields and the data in the biochemical fields and converting them into digital data; determining whether the data of the biochemical fields meets a preset standard value; according to whether the results conform to the preset standard value, the application produces correspondingly a first signal or a second signal; the application generating an augmented reality checklist image and adding a signal field to each biochemical field; and displaying the first signal or the second signal corresponding to the biochemical fields in the signal field; wherein each preset standard value is pre-stored in the application.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: April 27, 2021
    Assignee: DR. ADVICE CORPORATION LIMITED
    Inventors: Chien-Fen Huang, Jia-Cing Lin
  • Publication number: 20210116413
    Abstract: A bioFET device includes a semiconductor substrate having a first surface and an opposite, parallel second surface and a plurality of bioFET sensors on the semiconductor substrate. Each of the bioFET sensors includes a gate formed on the first surface of the semiconductor substrate and a channel region formed within the semiconductor substrate beneath the gate and between source/drain (S/D) regions in the semiconductor substrate. The channel region includes a portion of the second surface of the semiconductor substrate. An isolation layer is disposed on the second surface of the semiconductor substrate. The isolation layer has an opening positioned over the channel region of more than one bioFET sensor of the plurality of bioFET sensors. An interface layer is disposed on the channel region of the more than one bioFET sensor in the opening.
    Type: Application
    Filed: December 28, 2020
    Publication date: April 22, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jui-Cheng HUANG, Yi-Hsien CHANG, Chin-Hua WEN, Chun-Ren CHENG, Shih-Fen HUANG, Tung-Tsun CHEN, Yu-Jie HUANG, Ching-Hui LIN, Sean CHENG, Hector CHANG
  • Publication number: 20210117636
    Abstract: The structure of a semiconductor device with an array of bioFET sensors, a biometric fingerprint sensor, and a temperature sensor and a method of fabricating the semiconductor device are disclosed. A method for fabricating the semiconductor device includes forming a gate electrode on a first side of a semiconductor substrate, forming a channel region between source and drain regions within the semiconductor substrate, and forming a piezoelectric sensor region on a second side of the semiconductor substrate. The second side is substantially parallel and opposite to the first side. The method further includes forming a temperature sensing electrode on the second side during the forming of the piezoelectric sensor region, forming a sensing well on the channel region, and binding capture reagents on the sensing well.
    Type: Application
    Filed: October 18, 2019
    Publication date: April 22, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ching-Hui LIN, Chun-Ren CHENG, Shih-Fen HUANG, Fu-Chun HUANG
  • Publication number: 20210113938
    Abstract: The present invention provides a heat exchange device featuring gas-liquid separation, comprising an evaporator unit and a condenser unit. The condenser unit comprises a central main guide tube, a plurality of condensation tubes connected to the two lateral sides of the central main guide tube, and a heat dissipation fin assembly provided on a periphery of each condensation tube. The central main guide tube comprises a gaseous-phase confluence chamber and a liquid-phase confluence chamber. The gaseous-phase confluence chamber is provided in an upper portion of the central main guide tube and communicates with the gas outlet through a gaseous-phase connection tube, and the liquid-phase confluence chamber is provided in a lower portion of the central main guide tube and communicates with the evaporation chamber through a liquid-phase connection tube.
    Type: Application
    Filed: December 5, 2019
    Publication date: April 22, 2021
    Inventors: Cheng-Chien Wan, Cheng-Jui Wan, Chun-Hsien Su, Hui-Fen Huang
  • Patent number: 10984211
    Abstract: The structure of a semiconductor device with an array of bioFET sensors, a biometric fingerprint sensor, and a temperature sensor and a method of fabricating the semiconductor device are disclosed. A method for fabricating the semiconductor device includes forming a gate electrode on a first side of a semiconductor substrate, forming a channel region between source and drain regions within the semiconductor substrate, and forming a piezoelectric sensor region on a second side of the semiconductor substrate. The second side is substantially parallel and opposite to the first side. The method further includes forming a temperature sensing electrode on the second side during the forming of the piezoelectric sensor region, forming a sensing well on the channel region, and binding capture reagents on the sensing well.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: April 20, 2021
    Inventors: Ching-Hui Lin, Chun-Ren Cheng, Shih-Fen Huang, Fu-Chun Huang
  • Patent number: 10955379
    Abstract: A sensor array includes a semiconductor substrate, a first plurality of FET sensors and a second plurality of FET sensors. Each of the FET sensors includes a channel region between a source and a drain region in the semiconductor substrate and underlying a gate structure disposed on a first side of the channel region, and a dielectric layer disposed on a second side of the channel region opposite from the first side of the channel region. A first plurality of capture reagents is coupled to the dielectric layer over the channel region of the first plurality of FET sensors, and a second plurality of capture reagents is coupled to the dielectric layer over the channel region of the second plurality of FET sensors. The second plurality of capture reagents is different from the first plurality of capture reagents.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: March 23, 2021
    Inventors: Ching-Hui Lin, Chun-Ren Cheng, Shih-Fen Huang, Fu-Chun Huang
  • Publication number: 20210043721
    Abstract: In some embodiments, the present disclosure relates to a metal-insulator-metal (MIM) device. The MIM device includes a substrate, and a first and second electrode stacked over the substrate. A dielectric layer is arranged between the first and second electrodes. Further, the MIM device includes a titanium getter layer that is disposed over the substrate and separated from the dielectric layer by the first electrode. The titanium getter layer has a higher getter capacity for hydrogen than the dielectric layer.
    Type: Application
    Filed: August 5, 2019
    Publication date: February 11, 2021
    Inventors: Chi-Yuan Shih, Kai-Fung Chang, Shih-Fen Huang, Yan-Jie Liao
  • Publication number: 20210043680
    Abstract: In some embodiments, the present disclosure relates to a method for recovering degraded device performance of a piezoelectric device. The method includes operating the piezoelectric device in a performance mode by applying one or more voltage pulses to the piezoelectric device, and determining that a performance parameter of the piezoelectric device has a first value that has deviated from a reference value by more than a predetermined threshold value during a first time period. During a second time period, the method further includes applying a bipolar loop to the piezoelectric device, comprising positive and negative voltage biases. During a third time period, the method further includes operating the piezoelectric device in the performance mode, wherein the performance parameter has a second value. An absolute difference between the second value and the reference value is less than an absolute difference between the first value and the reference value.
    Type: Application
    Filed: August 7, 2019
    Publication date: February 11, 2021
    Inventors: Chi-Yuan Shih, Shih-Fen Huang, You-Ru Lin, Yan-Jie Liao
  • Patent number: 10889849
    Abstract: The present invention provides an assay for detection of oxidized glutathione (GSSG).
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: January 12, 2021
    Assignee: PROMEGA CORPORATION
    Inventors: Fen Huang, Dieter Klaubert, John Shultz, Wenhui Zhou
  • Patent number: 10876997
    Abstract: A bioFET device includes a semiconductor substrate having a first surface and an opposite, parallel second surface and a plurality of bioFET sensors on the semiconductor substrate. Each of the bioFET sensors includes a gate formed on the first surface of the semiconductor substrate and a channel region formed within the semiconductor substrate beneath the gate and between source/drain (S/D) regions in the semiconductor substrate. The channel region includes a portion of the second surface of the semiconductor substrate. An isolation layer is disposed on the second surface of the semiconductor substrate. The isolation layer has an opening positioned over the channel region of more than one bioFET sensor of the plurality of bioFET sensors. An interface layer is disposed on the channel region of the more than one bioFET sensor in the opening.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: December 29, 2020
    Inventors: Jui-Cheng Huang, Yi-Hsien Chang, Chin-Hua Wen, Chun-Ren Cheng, Shih-Fen Huang, Tung-Tsun Chen, Yu-Jie Huang, Ching-Hui Lin, Sean Cheng, Hector Chang
  • Publication number: 20200350311
    Abstract: A method for manufacturing a semiconductor structure is provided, wherein the method includes the following operations. A substrate having a transistor is received, wherein the transistor includes a channel region and a gate on a first side of the channel region. A second side of the channel region of the transistor is exposed, wherein the second side is opposite to the first side. A metal oxide is formed on the second side of the channel region of the transistor, wherein the metal oxide contacts the channel region and is exposed to the environment. A semiconductor structure and an operation of a semiconductor structure thereof are also provided.
    Type: Application
    Filed: July 8, 2020
    Publication date: November 5, 2020
    Inventors: Fu-Chun Huang, Ching-Hui Lin, Chun-Ren Cheng, Shih-Fen Huang, Alexander Kalnitsky
  • Publication number: 20200317602
    Abstract: The present invention discloses a novel 3-aryl-2-propen-1-one series derivative and the synthesis processes thereof. Besides, the present invention also discloses the series derivative as a pharmaceutical composition and their use for promoting myocardial regeneration.
    Type: Application
    Filed: April 8, 2019
    Publication date: October 8, 2020
    Applicant: GENHEALTH PHARMA CO., LTD.
    Inventors: Lain-Tze LEE, Hui-Ping TSAI, Shu-Fen HUANG, Yi-Wen LIN, Pi-Tsan HUANG, Ying-Ying WU, Mei-Hui CHEN, Li-Jie HSU
  • Publication number: 20200284523
    Abstract: The present invention provides a gravity-driven gas-liquid circulation device, comprising a condensation unit and an evaporation unit. The condensation unit has an end connected to a gaseous phase input tube and another end connected to a liquid phase output tube.
    Type: Application
    Filed: May 9, 2019
    Publication date: September 10, 2020
    Inventors: Cheng-Chien WAN, Cheng-Jui WAN, Chun-Hsien SU, Hui-Fen HUANG