Abstract: A MEMS phase shifter, including: a substrate; a coplanar waveguide signal structure on the substrate; two coplanar waveguide ground wires respectively at two sides of the coplanar waveguide signal structure; insulating isolation layers respectively on the two coplanar waveguide ground wires; and a metal film bridge across and over the coplanar waveguide signal structure and forming a gap with the coplanar waveguide signal structure, both ends of the metal film bridge respectively attached to the insulating isolation layers on the two coplanar waveguide ground wires, wherein an insulating dielectric layer is provided on the coplanar waveguide signal structure, and the insulating dielectric layer comprises at least one concave part, which is concave in the direction towards the substrate, on the surface facing the metal film bridge.

Abstract: An antenna unit, a manufacturing method thereof, a display device, and an electronic apparatus. The antenna unit includes a radiation main body, at least one feed line, and a plurality of grounding portions. The at least one feed line and the radiation main body are electrically connected, the radiation main body, the at least one feed line, and the plurality of grounding portions are provided in a same layer.

Abstract: The present disclosure provides an antenna and a communication device, the antenna includes a dielectric substrate, a first radiating element, a second radiating element and a switching element, the second radiating element surrounds the first radiating element, the second radiating element is of an open-loop structure, at least one first groove is provided in the first radiating element, each switching element corresponds to one first groove, the switching element includes a membrane bridge and a signal electrode, the signal electrode is arranged on the dielectric substrate, coupled to the second radiating element, and insulated from the first radiating element, the membrane bridge is arranged on a side of the first radiating element away from the dielectric substrate, each membrane bridge crosses over one first groove, and at least part of the signal electrode is located in a space defined by the membrane bridge and the first groove.

Abstract: An optical display system, a control method, and a display device, relates to the field of display technology. The optical display system comprises a display screen a first light splitting unit disposed at a display side of the display screen; a first imaging unit comprising a light splitting film disposed at a light-incident surface of the first imaging unit; a second light splitting unit disposed at a light emission side of the first imaging unit; a phase modulation unit disposed at least in a light path from the first imaging unit to the second light splitting unit; wherein, the first-type polarized light transmitted from the first light splitting unit is transmitted from a light emission side of the second light splitting unit, after being turned back multiple times between the first imaging unit and the second light splitting unit.

Abstract: A method for heat-treating a silicon single crystal wafer to control a BMD density thereof to achieve a predetermined BMD density by performing an RTA heat treatment on a silicon single crystal wafer composed of an Nv region in a nitriding atmosphere, and then performing a second heat treatment, the method including: formulating a relational equation for a relation between BMD density and RTA temperature in advance; and determining an RTA temperature for achieving the predetermined BMD density according to the relational equation. Consequently, a method for heat-treating a silicon single crystal wafer for manufacturing an annealed wafer or an epitaxial wafer each having defect-free surface and a predetermined BMD density in a bulk portion thereof.

Abstract: A phase shifter includes a substrate, a transmission line on the substrate and extending in a first direction, and first and second reference electrodes respectively on both sides of an extension direction of the transmission line. The transmission line includes signal line segments, any adjacent two of which have a gap therebetween to define a connection region. The phase shifter further includes at least one phase shifting unit each including: a film bridge extending in the first direction, a connection electrode extending in a second direction, and an interlayer insulating layer on a side of the connection electrode distal to the substrate. Both ends of the connection electrode are respectively connected with the first and second reference electrodes, and an orthogonal projection of the connection electrode on the substrate is in the connection region. Both ends of the film bridge are respectively connected with adjacent two signal line segments.

Abstract: A phase shifter includes: a first substrate; a signal electrode and a reference electrode on at least one side of an extension direction of the signal electrode; a first insulating layer covering the reference and signal electrodes; and at least one phase controlling unit above the first insulating layer. Each phase controlling unit includes a main body portion and at least one connection portion. Orthogonal projections of the main body portion and the signal electrode on the first substrate at least partially overlap each other. The main body portion and the first insulating layer have a gap therebetween, and the connection portion is connected between the main body portion and a portion of the first insulating layer covering the reference electrode. The main body portion includes first sub-electrodes short-circuited with each other, and at least some of the first sub-electrodes are connected to a same connection portion.

Abstract: A method for manufacturing a silicon single crystal wafer for a multilayer structure device including: using a silicon single crystal wafer with oxygen concentration of 12 ppma (JEITA) or higher and composing an Nv region; and performing an RTA treatment in a nitrogen-containing atmosphere and a temperature of 1225° C. or higher, a mirror-polish processing treatment, and a BMD-forming heat treatment manufacturing a silicon single crystal wafer having at least a DZ layer with a thickness of 5 to 12.5 ?m and a BMD layer positioned immediately below the DZ layer and a BMD density of 1×1011/cm3 or higher from the silicon single crystal wafer surface. During device formation, the silicon wafer surface stress is absorbed immediately below a surface layer, distortion defects are absorbed by the BMD layer, device formation region strength is enhanced, and surface layer dislocation occurrence and extension is suppressed.

Abstract: The present disclosure provides a phase shifter and a manufacturing method thereof, and an antenna. The phase shifter includes a first substrate and a second substrate, and a medium layer arranged between them. The first substrate includes a reference electrode arranged on a side of a first base substrate close to the medium layer, and the second substrate includes a delay line arranged on a side of a second base substrate close to the medium layer. An orthographic projection on the first substrate of the delay line at least partially overlaps with that of the reference electrode. A line spacing and/or a line width of the delay line is enable to make a cell thickness between the first substrate and the second substrate be 20 ?m-75 ?m.

Abstract: There is provided a phase shifter including a substrate, a signal line on the substrate, ground lines disposed in pairs on the substrate, and at least one film bridge. Two ground lines of the ground lines are on two sides of the signal line and are respectively spaced apart from the signal line. Each film bridge includes a plurality of connection walls and a bridge floor structure that is opposite to the substrate. The connection walls are respectively on the two ground lines. The bridge floor structure includes a phase shifting electrode and at least one pair of adsorption electrodes respectively connected to two sides of the phase shifting electrode. The phase shifting electrode is opposite to the signal line. Two adsorption electrodes in each pair are respectively opposite to the two ground lines, and are respectively connected to the connection walls on the two ground lines.

Abstract: A phase shifter and an antenna device are provided. The phase shifter includes a substrate, a signal line on the substrate, ground lines in pairs on the substrate, and a capacitance adjusting component. Two ground lines in a same pair of ground lines are on both sides of the signal line and spaced apart from the signal line, respectively. The capacitance adjusting component includes a film bridge, and both ends of the film bridge are on the two ground lines, respectively. The signal line is in a space enclosed by the film bridge and the substrate. The capacitance adjusting component is configured to adjust a capacitance between the film bridge and the signal line to a target capacitance when the capacitance adjusting component receives a bias voltage, and the target capacitance has a linear correlation with a magnitude of the bias voltage.

Abstract: A reconfigurable antenna and a method for manufacturing the same are provided. The reconfigurable antenna includes: a first substrate and a second substrate opposite to each other, a liquid crystal layer between the first substrate and the second substrate, a first metal layer between the first substrate and the liquid crystal layer, and a second metal layer between the second substrate and the liquid crystal layer. The first metal layer serves as a radiation patch layer of the reconfigurable antenna. The second metal layer serves as a ground layer of the reconfigurable antenna. The first metal layer and the second metal layer are configured to provide an electric field to the liquid crystal layer, so as to rotate orientation vectors of liquid crystal molecules of the liquid crystal layer.

Abstract: A driving backplane, a display panel and a display apparatus are provided. The driving backplane includes: a base substrate, and a plurality of connection electrode groups and a plurality of correction structures disposed on the base substrate, each of the connection electrode groups includes: a first connection electrode and a second connection electrode the first connection electrode and the second connection electrode are arranged on a same layer; a first gap is formed between the first connection electrode and the second connection electrode, and a first group of opposite edges includes: an edge, close to the first gap, of the first connection electrode; and an edge, close to the first gap, of the second connection electrode; a second group of opposite edges includes: an edge, far away from the first gap, of the first connection electrode; and an edge, far away from the first gap, of the second connection electrode.

Abstract: A light emitting substrate, a wiring substrate and a display device are provided. The light emitting substrate includes light emitting units and a first electrode wire. The first electrode wire includes a first wire and a second wire. The light emitting units include first light emitting units and second light emitting units, a position of each first light emitting unit is a first light emitting unit region, a position of each second light emitting unit is is a second light emitting unit region, the first wire is connected with the first light emitting unit, passes through the first light emitting unit region and is located at an outer side of the second light emitting unit region, the second wire is connected with the second light emitting unit, passes through the second light emitting unit region and is located at an outer side of the first light emitting unit region.

Abstract: The present disclosure discloses a driving method and apparatus of a display panel. When the display panel is driven to display a (2k?1)th image, only display data, corresponding to pixels of one row group, in image data of a kth display frame of a plurality of display frames are transmitted to a driver chip in the display panel, and a data size transmitted may be reduced. When the display panel is driven to display a (2k)th image, display data, corresponding to pixels of another row group, in the image data of the kth display frame are transmitted to the driver chip in the display panel, and the data size transmitted may also be reduced.

Abstract: The present disclosure discloses a driving method and apparatus of a display panel. When each of a plurality of obtained display frames is transmitted, only display data, corresponding to each pixel in one row group, in the display frame of image data is transmitted to a driving chip in the display panel, so that the driving chip in the display panel drives the display panel to display an image according to the received display data. Therefore, when a system on chip transmits each of the plurality of obtained display frames, only the display data, corresponding to each pixel in one row group, in the display frame of image data is transmitted to the driving chip in the display panel.

Abstract: A gate driving circuit, a method for driving the gate driving circuit, and a display panel. The gate driving circuit includes N-stages of cascaded shift registers divided into at least one group of K-stages in which a clock signal terminal of a k-th stage of shift register is connected to receive a k-th clock signal, where N, k and K are positive integers, and 1?k?K?N; and an input signal terminal of a n-th stage of shift register is connected to an output signal terminal of a (n?i)-th stage of shift register, and reset signal terminals of the n-th and (n+1)-th stages of shift registers are connected to an output signal terminal of a (n+j)-th stage of shift register, wherein the n is one of an odd number and an even number, where i and j are positive integers, 1<n<N, (K?2)/2?i?K/2, and K/2<j?K?2.

Abstract: According to the embodiments of the present disclosure, there is provided gate driving circuit comprising 2N stages of shift registers, the 2N stages of shift registers comprising N first shift registers arranged alternately with N second shift registers, wherein the N first shift registers are cascaded-coupled as N stages of first shift registers, and are configured to generate N first output signals under control of K first clock signals; and wherein the N second shift registers are cascaded-coupled as N stages of second shift registers, and are configured to generate N second output signals under a control of K second clock signals, wherein K and N are both integers greater than 1, and K?N.

Abstract: A display device is provided. The display device includes a display module and an antenna module. The antenna module includes at least one antenna body for receiving a wireless signal; a signal transmission line coupled to the at least one antenna body; an antenna carrier plate having a working region and a bending region, the antenna carrier plate in the bending region is bent from a display surface to a non-display surface, so that the signal transmission line extends from the display surface to the non-display surface; an adapter circuit board on the non-display surface; and an adapter coupling the signal transmission line to the adapter circuit board to enable the adapter circuit board to be signal coupled to the at least one antenna body.

Abstract: The present disclosure discloses a display apparatus and a manufacturing method of an array substrate comprised therein. The display apparatus includes: a backlight module, a display module located on a light-emitting side of the backlight module, and a shell accommodating the backlight module and the display module. The display module includes: an array substrate and a color film substrate which are opposite to each other, and a first polarizer located on one side, facing away from the color film substrate, of the array substrate. The shell includes: a back part arranged on one side, facing away from the color film substrate, of the backlight module; and a plurality of side parts which are in touch with the back part and perpendicular to the back part.