Abstract: Provided are an array substrate and a manufacturing method thereof, and a display device. The array substrate comprises a plurality of data lines and sub-pixels. At least one sub-pixel comprises: a first insulating layer; a gate; an active layer located on one side of the first insulating layer away from the gate; a pixel electrode; a first electrode located connected to the active layer and in contact with the pixel electrode; a second electrode connected to the active layer and a data line; a second insulating layer having a first opening, wherein the orthographic projection of the first opening partially overlaps with the orthographic projections of the pixel electrode and the first electrode; a connection electrode in contact with the pixel electrode and the first electrode through the first opening; and a common electrode located on one side of the second insulating layer away from the pixel electrode.

Abstract: The present disclosure relates to a protection circuit for a display device, a display device thereof, and a method for protecting a display device using a protection circuit. The display device includes a gate driving circuit, a level shift circuit, and a power management circuit. The level shift circuit is configured to provide an input signal to a signal input terminal of the gate driving circuit. The power management circuit is configured to provide power to the gate driving circuit. The protection circuit is configured to provide a power control signal to the power management circuit based on a current at the signal input terminal of the gate driving circuit, so that the power management circuit stops providing the power to the gate driving circuit.

Abstract: According to the embodiments of the present disclosure, there is provided gate driving circuit comprising 2N stages of shift registers, the 2N stages of shift registers comprising N first shift registers arranged alternately with N second shift registers, wherein the N first shift registers are cascaded-coupled as N stages of first shift registers, and are configured to generate N first output signals under control of K first clock signals; and wherein the N second shift registers are cascaded-coupled as N stages of second shift registers, and are configured to generate N second output signals under a control of K second clock signals, wherein K and N are both integers greater than 1, and K?N.

Abstract: A thin film transistor, a manufacturing method thereof, an array substrate and an electronic device arc provided. The thin film transistor includes an active layer including multiple oxide layers which includes a channel layer, a transition layer and a first barrier layer, the channel layer is an layer with a highest carrier mobility, the channel layer is a crystalline or amorphous oxide layer, the transition layer is in direct contact with the channel layer, the first barrier layer is an outermost oxide layer, the first barrier layer and the transition layer are both crystalline oxide layers; a crystallization degree of the first barrier layer and a crystallization degree of the transition layer are greater than a crystallization degree of the channel layer, and a band gap of the first barrier layer and a band gap of the transition layer are larger than a band gap of the channel layer.

Abstract: A semiconductor substrate manufacturing method and a semiconductor substrate. The manufacturing method includes: forming a first semiconductor layer on the base substrate at a first temperature with a first oxide semiconductor material; forming the second semiconductor layer directly on the first semiconductor layer with a second oxide semiconductor material; and performing a patterning process such that the first semiconductor layer and the second semiconductor layer are respectively patterned into a seed layer and a first channel layer. Both the first oxide semiconductor material and the second oxide semiconductor material are capable of forming crystalline phases at a second temperature, the second temperature is less than or equal to 40° C., and the first temperature is greater than or equal to 100° C.

Abstract: The present disclosure provides a phase shifting device, a driving method thereof, and an antenna. The phase shifting device of the present disclosure includes: data lines, scan lines and phase shifting units. Each phase shifting unit includes: a switch sub-circuit and a phase shifter. Control terminals of the switch sub-circuits in a same row are coupled to a same scan line, first terminals of the switch sub-circuits in a same column are coupled to a same data line, and a second terminal of each switch sub-circuit is coupled to a phase shifter included in the phase shifting unit to which the switch sub-circuit belongs. Each switch sub-circuit is configured to transmit, in response to a switch control signal provided by the scan line, a data voltage signal provided by the data line to the phase shifter to drive the phase shifter.

Abstract: Device and method controlling for an antenna, an antenna system and a computing control device are provided. The antenna includes multiple antenna array elements and multiple phase shifters for calibrating phases of the multiple antenna array elements. The device includes a temperature sensor, a positioning unit and a computing control unit, the temperature sensor is configured to obtain temperature information of the antenna and output it to the computing control unit; the positioning unit is configured to obtain position information of the antenna and output it to the computing control unit; the computing control unit is configured to receive the position information and temperature information of the antenna, determine position information of a satellite, and control the phase shifters to adjust phases of the multiple antenna array elements according to the position information the temperature information of the antenna, the position information of the satellite and pre-stored calibration data.

Abstract: An array substrate, a display panel, and an electronic device are provided. The array substrate includes: a base substrate; a first electrode arranged on the base substrate; a gate line arranged on the base substrate, wherein the gate line is electrically insulated from the first electrode; a second electrode arranged on a side of the gate line away from the base substrate, wherein at least one first sub-pixel unit provided on the base substrate includes: a first connection portion arranged in a same layer as the second electrode and a second connection portion arranged in a same layer as the gate line, wherein the second connection portion is electrically connected to the first electrode, and an orthographic projection of the second connection portion on the base substrate at least partially overlaps an orthographic projection of the first connection portion on the base substrate.

Abstract: An optical displaying system, a controlling method thereof, and a displaying device, which relates to the technical field of displaying.

Abstract: The disclosure provides a display panel and a display apparatus, and belongs to the field of display technology. The display panel includes a display backplane and an antenna structure; the display panel further includes a frequency selective surface on a side of the antenna structure close to a light exit surface of the display panel; the frequency selective surface is configured to transmit an electromagnetic wave with a specific frequency, so as to enhance a radiation gain of the antenna structure.

Abstract: The present disclosure relates to an electrode structure and a display panel. The electrode structure includes: first and second electrode portion and a conductive connection portion. The first electrode portion includes a first connection bar and first electrode bars. The first connection bar has a first side and a second side. The first electrode bars are located on the first side and connected to the first connection bar, and ends of adjacent first electrode bars away from the first connection bar are in an open shape. The second electrode portion includes a second connection bar and a second electrode bars. The second connection bar has a third side and a fourth side. The second electrode bars are located on the third side and connected to the second connection bar, and ends of adjacent second electrode bars away from the second connection bar are in an open shape.

Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes: a gate driving circuitry arranged at a peripheral region of the display substrate; n clock signal leads coupled to the gate driving circuitry, each clock signal lead extending in a first direction; and n clock signal lines arranged sequentially in the first direction, each clock signal line extending in a second direction intersecting the first direction, where n is a positive integer greater than 1. The clock signal leads have a same length in the first direction, each clock signal lead extends from a first clock signal line to an nth clock signal line, and each clock signal lead is coupled to a corresponding clock signal line at a position where the clock signal lead intersects the clock signal line.

Abstract: The present disclosure provides an antenna and a manufacturing method thereof, and belongs to the field of communication technology. The antenna provided by an embodiment of the present disclosure includes: a first substrate and a second substrate opposite to each other, a dielectric layer provided therebetween, and a feed unit on a side of the second substrate away from the first substrate. The first substrate includes: a first base substrate; and a radiation unit on a side of the first base substrate close to the second substrate. The second substrate includes: a second base substrate; and a reference electrode layer on a side of the second base substrate away from the feed unit, the reference electrode layer has an opening, an orthographic projection of the opening on the second base substrate is at least partially overlapped with an orthographic projection of the radiation unit on the second base substrate.

Abstract: A light-emitting diode substrate, a manufacturing method thereof, and a display device are disclosed. The manufacturing method of the light-emitting diode substrate includes: forming an epitaxial layer group of M light-emitting diode chips on a substrate; transferring N epitaxial layer groups on N substrates onto a transition carrier substrate, the N epitaxial layer groups on the N substrates being densely arranged on the transition carrier substrate; and transferring at least part of N*M light-emitting diode chips corresponding to the N epitaxial layer groups on the transition carrier substrate onto a driving substrate, an area of the transition carrier substrate is greater than or equal to a sum of areas of the N substrates, M is a positive integer greater than or equal to 2, and N is a positive integer greater than or equal to 2.

Abstract: A gate driving circuit and a display panel are provided. The gate driving circuit includes M shift registers and N clock signal lines; every N adjacent shift registers among the M shift registers are respectively connected to the N clock signal lines, where N is an even number greater than or equal to 4, and M is an integer greater than or equal to N; a signal output terminal (OUTPUT) of an ith shift register is connected to a signal input terminal (INPUT) of a (i+p)th shift register, where (N?4)/2?p?N/2, and i is taken from 1 to (M?p); and a pull-up reset signal terminal of a jth shift register is connected to a signal output terminal (OUTPUT) of a (j+q)th shift register, where 1<q?p<N/2, and j is taken from 1 to (M?q).

Abstract: The embodiment of the present disclosure provides a driving backplate including a base substrate, and an insulation layer and a plurality of conductive structures on the base substrate. The insulation layer insulates the plurality of conductive structures from each other. The plurality of conductive structures includes a first conductive layer and a second conductive layer sequentially stacked along a direction away from the base substrate. At least one portion of a region in which the first conductive layer is in contact with the second conductive layer includes a flat contact region. An opening is formed at a position in the insulation layer corresponding to the conductive structure. An edge of the opening in the insulation layer is between the first conductive layer and the second conductive layer and is correspondingly in edge regions of the first conductive layer and the second conductive layer.

Abstract: A phased array antenna system is provided, including a feed structure and at least one phased array antenna element, wherein the at least one phased array antenna element includes a first impedance transformation unit, an MEMS phase-shifting multi-unit and an antenna. The first impedance transformation unit is connected to a feed structure, and the MEMS phase-shifting multi-unit is connected between the first impedance transformation unit and the antenna.

Abstract: Disclosed is a display panel including: first spacer on the array substrate, an orthographic projection of the first spacer on the array substrate being a first pattern extending along a first direction; a second spacer on the counter substrate, an orthographic projection of the second spacer on the array substrate being a second pattern extending along a second direction; at least two third spacers, orthographic projections of which on the array substrate being respectively on two sides of the first pattern along the first direction; at least two fourth spacers, orthographic projections of which on the array substrate being respectively on two sides of the second pattern along the second direction; one of the third spacer and the fourth spacer is on the array substrate, and the other is on the counter substrate.

Abstract: The present disclosure provides a phase shifter, a method for fabricating the same, and an antenna. The phase shifter includes a substrate, first and second transmission lines spaced apart from each other on the substrate, and at least one phase control element on the substrate. Each phase control element includes a membrane bridge and a transmission line extension which is on the substrate, between the first and second transmission lines, and electrically coupled to the first transmission line; the membrane bridge is on a side of the transmission line extension distal to the substrate, opposite to and spaced apart from the transmission line extension, and electrically coupled to the second transmission line. The membrane bridge is configured to move a portion of the membrane bridge in response to the first and second transmission lines being applied with different voltages, to change a distance from the transmission line extension.

Abstract: A calibration system and a calibration method for a phased-array antenna are provided. The calibration system includes a receiving probe, a parameter tester, an upper computer and a beam controller. The receiving probe may acquire a beam signal, which is radiated by a to-be-tested phased-array antenna according to a provided microwave signal, at a preset position. The parameter tester may generate a test parameter according to the microwave signal and the beam signal. The upper computer may determine whether the to-be-tested phased-array antenna meets a preset index according to the test parameter, and in a case where the to-be-tested phased-array antenna does not meet the preset index, calculate the test parameter according to a genetic algorithm to generate optimized beam control data. The beam controller may generate a control voltage according to the optimized beam control data, and transmit the control voltage to the to-be-tested phased-array antenna.