Abstract: In a method for forming FinFETs, a photo resist is formed to cover a first semiconductor fin in a wafer, wherein a second semiconductor fin adjacent to the first semiconductor fin is not covered by the photo resist. An edge of the photo resist between and parallel to the first and the second semiconductor fins is closer to the first semiconductor fin than to the second semiconductor fin. A tilt implantation is performed to form a lightly-doped source/drain region in the second semiconductor fin, wherein the first tilt implantation is tilted from the second semiconductor fin toward the first semiconductor fin.

Abstract: A broadcasting system with auto programming and viewer number feedback is provided, which includes a data gathering device, a viewer number calculating device and a program auto-scheduling device. The data gathering device is used to gather a program list and a local viewer number data. The viewer number calculating device is used to calculate a local viewer number. The program auto-scheduling device is used to automatically determine whether to adjust a program schedule of the program list according to a comparison result between the local viewer number and a determined viewer number. Therefore, the broadcasting system of the invention can detect viewer and definitely calculate viewing efficiency within a predetermined status, and can precisely quantify the viewing efficiency using the caught data. Additionally, the broadcasting system of the invention can automatically evaluate whether to reschedule of a program according to the data feedback to conform the predetermined viewer status.

Abstract: A display apparatus is provided. The display apparatus includes a first receiver, a display unit, a controller and a processor. The first receiver receives a network packet stream. The controller selectively sends one of a video signal generated by processing the network packet stream and an external video signal to the display unit for displaying the received video signal, according to a control signal. The processor determines whether the network packet stream comprises a display command. The processor sends the control signal to the controller for receiving and sending the video signal of the network packet stream to the display unit, when the network packet stream includes the display command.

Abstract: A dual-gate transistor includes a first gate formed on a substrate, a first dielectric layer covering the first gate and the substrate, a semiconductor layer formed on the first dielectric layer, first and second electrodes formed on the semiconductor layer and spaced with an interval in order to separate each other, a second dielectric layer covering the first and second electrodes, and a second gate formed on the second dielectric layer, in which at least one of the first and second gates is non-overlapped with the second electrode.

Abstract: An integrated circuit device is disclosed. An exemplary integrated circuit device includes: a semiconductor substrate; a fin structure disposed over the semiconductor substrate; and a gate structure disposed over the base portion of the fin structure. The collector portion is a first doped region including a first type dopant, and is coupled with a first terminal for electrically biasing the collector portion. The emitter portion is a second doped region including the first type dopant, and is coupled with a second terminal for electrically biasing the emitter portion. The base portion is a third doped region including a second type dopant opposite the first type, and is coupled with a third terminal for electrically biasing the base portion. The gate structure is coupled with a fourth terminal for electrically biasing the gate structure, such that the gate structure controls a path of current through the base portion.

Abstract: An integrated circuit structure includes a semiconductor substrate, and a FinFET over the semiconductor substrate. The FinFET includes a semiconductor fin; a gate dielectric on a top surface and sidewalls of the semiconductor fin; a gate electrode on the gate dielectric; and a source/drain region at an end of the semiconductor fin. A first pair of shallow trench isolation (STI) regions includes portions directly underlying portions of the source/drain regions, wherein the first pair of STI regions is separated by, and adjoining a semiconductor strip. The first pair of STI regions further has first top surfaces. A second pair of STI regions comprises portions directly underlying the gate electrode, wherein the second pair of STI regions is separated from each other by, and adjoining, the semiconductor strip. The second pair of STI regions has second top surfaces higher than the first top surfaces.

Abstract: A method and a system for controlling a multimedia monitor are provided. The multimedia monitor has a central processing unit (CPU) and communicates with a computer system through a communication interface. The multimedia monitor displays images from the computer system when the multimedia monitor is in an external signal mode, and displays images generated by the CPU when the multimedia monitor is in a multimedia application mode. In the method, an input event is received by the computer system and an input command corresponding to the input event is transmitted to the multimedia monitor through the communication interface. After that, whether the input command belongs to a multimedia command set is determined by the multimedia monitor. If the input command belongs to the multimedia command set, an action corresponding to the input command under the multimedia application mode is executed by the multimedia monitor.

Abstract: The present disclosure provides a method includes forming a multi-fin device. The method includes forming a patterned mask layer on a semiconductor substrate. The patterned mask layer includes a first opening having a first width W1 and a second opening having a second width W2 less than the first width. The patterned mask layer defines a multi-fin device region and an inter-device region, wherein the inter-device region is aligned with the first opening; and the multi-fin device region includes at least one intra-device region being aligned with the second opening.

Abstract: The present disclosure provides a semiconductor device with a strained SiGe channel and a method for fabricating such a device. In an embodiment, a semiconductor device includes a substrate including at least two isolation features, a fin substrate disposed between and above the at least two isolation features, and an epitaxial layer disposed over exposed portions of the fin substrate. According to one aspect, the epitaxial layer may be disposed over a top surface and sidewalls of the fin substrate. According to another aspect, the fin substrate may be disposed substantially completely above the at least two isolation features.

Abstract: Idle processor cores can be used to compile methods that are likely to be executed by a program based on profile data that is captured during one or more previous executions. Methods that are determined by the profile data to be likely to be used can be compiled eagerly on one or more background threads. Transparency can be achieved by ensuring that module load order is not altered because of the background threads by recording the state of loaded modules after each profiled compilation, persisting that data, and waiting to eagerly compile a method until the method to be compiled and all its dependencies has been loaded by the executing program.

Abstract: A thin film transistor (TFT) structure is provided. The TFT comprises a gate, a first electrode, a second electrode, a dielectric layer, and a channel layer. By overlapping the area between the first electrode and the gate, the TFT structure acquires a parasitic capacitor that is unaffected by manufacture deviations. Therefore, the TFT needs no compensation capacitor, thereby, increasing the aperture ratio of the TFT.

Abstract: An optical reflective touch panel and pixels and a system thereof are provided. Each pixel of the optical reflective touch panel includes a display circuit and a sensing circuit. The display circuit controls the display of the pixel. The sensing circuit is coupled to the display circuit for sensing a sensitization state of the pixel during a turned-on period and a turned-off period of a backlight module and outputting a digital signal to notify an optical reflective touch panel system that whether the pixel is touched or not.

Abstract: A broadcasting system with auto programming and viewer number feedback is provided, which includes a data gathering device, a viewer number calculating device and a program auto-scheduling device. The data gathering device is used to gather a program list and a local viewer number data. The viewer number calculating device is used to calculate a local viewer number. The program auto-scheduling device is used to automatically determine whether to adjust a program schedule of the program list according to a comparison result between the local viewer number and a determined viewer number. Therefore, the broadcasting system of the invention can detect viewer and definitely calculate viewing efficiency within a predetermined status, and can precisely quantify the viewing efficiency using the caught data. Additionally, the broadcasting system of the invention can automatically evaluate whether to reschedule of a program according to the data feedback to conform the predetermined viewer status.

Abstract: In one aspect of the invention, the method of forming a TFT array panel includes forming a patterned first conductive layer on a substrate, forming a gate insulating layer on the patterned first conductive layer and the substrate, forming a patterned semiconductor layer on the gate insulating layer, forming a patterned second conductive layer, forming a patterned passivation layer on the patterned second conductive layer and the substrate, and forming a patterned transparent conductive layer on the patterned passivation layer.

Abstract: A thin film transistor (TFT) structure is provided. The TFT comprises a gate, a first electrode, a second electrode, a dielectric layer, and a channel layer. By overlapping the area between the first electrode and the gate, the TFT structure acquires a parasitic capacitor that is unaffected by manufacture deviations. Therefore, the TFT needs no compensation capacitor, thereby, increasing the aperture ratio of the TFT.

Abstract: A copper conducting wire structure is for use in the thin-film-transistor liquid crystal display (LCD) device. The copper conducting wire structure includes at least a buffer layer and a copper layer. A fabricating method of the copper conducting wire structure includes the following steps. At first, a glass substrate is provided. Next, the buffer layer is formed on the glass substrate. The buffer layer is comprised of a copper nitride. At last, the copper layer is formed on the buffer layer.

Abstract: The present disclosure provides a method includes forming a multi-fin device. The method includes forming a patterned mask layer on a semiconductor substrate. The patterned mask layer includes a first opening having a first width W1 and a second opening having a second width W2 less than the first width. The patterned mask layer defines a multi-fin device region and an inter-device region, wherein the inter-device region is aligned with the first opening; and the multi-fin device region includes at least one intra-device region being aligned with the second opening.

Abstract: A debugger enhancement provides a debug-task-provider interface whose implementation includes routines designed to support debugging of programs that contain tasks written for a specific programming model. Task creation hierarchies, individual task properties, resource dependencies, synchronization dependencies, and other information can be made accessible during debugging, through a model-independent interface. In a multithreaded environment, a mapping between tasks and threads is also available.

Abstract: A battery system includes batteries; a voltage detector linking batteries and detecting batteries' voltage; an equalizer linking batteries and fine-tuning their charging/discharging efficiency; a battery protection board on which there is a MCU used to receive signals from the voltage detector for characteristic differences between batteries balanced by the equalizer and batteries with similar charging and discharging efficiency; a digital interface connected between the MCU and an upper-level control system as one interface of signal transmission.

Abstract: In one aspect of the invention, the method of forming a TFT array panel includes forming a patterned first conductive layer on a substrate, forming a gate insulating layer on the patterned first conductive layer and the substrate, forming a patterned semiconductor layer on the gate insulating layer, forming a patterned second conductive layer, forming a patterned passivation layer on the patterned second conductive layer and the substrate, and forming a patterned transparent conductive layer on the patterned passivation layer.