Patents by Inventor Feng Yuan

Feng Yuan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11626328
    Abstract: An integrated circuit device includes a substrate having a first portion in a first device region and a second portion in a second device region. A first semiconductor strip is in the first device region. A dielectric liner has an edge contacting a sidewall of the first semiconductor strip, wherein the dielectric liner is configured to apply a compressive stress or a tensile stress to the first semiconductor strip. A Shallow Trench Isolation (STI) region is over the dielectric liner, wherein a sidewall and a bottom surface of the STI region is in contact with a sidewall and a top surface of the dielectric liner.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: April 11, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsung-Lin Lee, Chih Chieh Yeh, Feng Yuan, Hung-Li Chiang, Wei-Jen Lai
  • Publication number: 20230071651
    Abstract: An uplink transmission method includes receiving a first message that is used to configure a first uplink resource. The method also includes performing uplink transmission on the first uplink resource. The first uplink resource includes at least a first part and a second part in a first time period, a phase deviation of uplink transmission between the first part and the second part falls within a first threshold range, or a power deviation of uplink transmission between the first part and the second part falls within a second threshold range. The first time period is a duration between a start time and an end time of the first uplink resource in a first time length, or a duration between a start time and an end time of the first uplink resource in a first transmit opportunity.
    Type: Application
    Filed: November 14, 2022
    Publication date: March 9, 2023
    Inventors: Meng HUA, Zhiheng GUO, Feng YUAN
  • Publication number: 20230047374
    Abstract: The presently disclosed subject matter relates to devices, systems, and methods of producing an improved fluid flow assembly and liquid/gas diffusion layer in solid polymer electrolyte electrochemical cells. In one aspect, a fluid flow assembly for a polymer electrolyte water electrolyzer includes a flow field having an inlet, an outlet, and a plurality of discrete lands arranged within the flow field. A liquid/gas diffusion layer is positioned in communication with the flow field between the inlet and the outlet, the liquid/gas diffusion layer having a solid substrate through which a plurality of pores is formed. The disclosed bipolar plate flow field and liquid/gas diffusion layer could work together or separately with other types of porous transport layers or bipolar plates to enhance the water/gas transport. In these configurations, the lands can be arranged and configured such that the plurality of pores are substantially unobstructed by the lands.
    Type: Application
    Filed: April 11, 2022
    Publication date: February 16, 2023
    Inventors: Feng Yuan Zhang, Lei Ding, Kui Li, Weitian Wang, Shule Yu, Douglas Scott Aaron, Matthew M. Mench, Frida Helena Roenning, Anirban Roy
  • Publication number: 20230047140
    Abstract: The presently disclosed subject matter relates to devices, systems, and methods for fabricating a solid polymer electrolyte electrode assembly are provided. One or more electrode for a solid polymer electrolyte electrode assembly includes a porous substrate configured as a liquid/gas diffusion layer and an ionomer-free catalyst coated on the substrate.
    Type: Application
    Filed: April 11, 2022
    Publication date: February 16, 2023
    Inventors: Feng Yuan Zhang, Lei Ding, Kui Li, Zhiqiang Xie, Weitian Wang, Shule Yu
  • Publication number: 20230008957
    Abstract: A photolithography exposure of a photoresist coating on a semiconductor wafer uses an optical projection system to form a latent image. The photolithography exposure further uses a mask with a set of multiple pattern focus (MPF) marks. Each MPF mark of includes features having different critical dimension (CD) sizes. The latent image is developed to form a developed photoresist pattern. Dimension sizes are measured of features of the developed photoresist pattern corresponding to the features of the MPF marks having different CD sizes. A spatial focus map of the photolithography exposure is constructed based on the measured dimension sizes. To determine the focal distance at an MPF mark, ratios or differences may be determined between the measured dimension sizes corresponding to the features of the MPF marks having different CD sizes, and the focal distance at the location of the MFP mark constructed based on the determined ratios or differences.
    Type: Application
    Filed: February 8, 2022
    Publication date: January 12, 2023
    Inventors: I-Hsiung Huang, Yung-Cheng Chen, Tzung-Hua Lin, Feng-Yuan Chang
  • Patent number: 11508658
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a semiconductor substrate having a first surface and a first optical coupler disposed on the first surface of the semiconductor substrate. The first optical coupler includes a first surface facing away from the first surface of the semiconductor substrate and a first lateral surface connected to the first surface of the first optical coupler. The first surface of the first optical coupler and the first lateral surface of the optical coupler define an angle greater than 90 degrees. A method of manufacturing a semiconductor device package is also disclosed.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: November 22, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Hau-Yan Lu, Felix Ying-Kit Tsui, Jing-Hwang Yang, Feng Yuan
  • Patent number: 11501738
    Abstract: A brightness adjustment method for a display system is disclosed. The display system includes a high dynamic range (HDR) display device, wherein the HDR display device is utilized for displaying an image. The brightness adjustment method includes detecting a distance between the HDR display device and a user, updating a brightness of the image according to the distance, calculating metadata corresponding to the image according to the brightness of the image and determining the image displayed on the HDR display device according to the calculated metadata corresponding to the image.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: November 15, 2022
    Assignee: Wistron Corporation
    Inventor: Feng-Yuan Chen
  • Patent number: 11494678
    Abstract: An inference method, an inference device, and a display are provided. The method includes: receiving an input signal through a first inference device or a second inference device; performing a first inference operation according to the input signal through the first inference device to obtain first inference information; performing a second inference operation according to the input signal through the second inference device to obtain second inference information; and providing an output signal according to the input signal, the first inference information and the second inference information through the second inference device.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: November 8, 2022
    Assignee: Wistron Corporation
    Inventor: Feng-Yuan Chen
  • Patent number: 11495191
    Abstract: A display device, an electronic system and a control method are disclosed. The display device includes a memory device. The memory device includes a memory array, an input/output logic circuit and a control logic circuit. The memory array includes a plurality of sub-arrays and each sub-array stores extended display identification data. The input/output logic circuit is configured to receive an identification data request from a host device and determine whether to perform an identification data access process according to the identification data request The control logic circuit is configured to read extended display identification data stored in a target sub-array of the plurality of sub-arrays of the memory array according to memory address information in response to determining to perform the identification data access process.
    Type: Grant
    Filed: December 8, 2019
    Date of Patent: November 8, 2022
    Assignee: Wistron Corporation
    Inventors: Feng-Yuan Chen, Chou-Chieh Chang
  • Publication number: 20220352320
    Abstract: Various strained channel transistors are disclosed herein. An exemplary semiconductor device includes a substrate and a fin structure disposed over the substrate. The fin structure includes a first epitaxial layer disposed on the substrate, a second epitaxial layer disposed on the first epitaxial layer, and a third epitaxial layer disposed on the second epitaxial layer. The second epitaxial layer includes a relaxed transversal stress component and a longitudinal compressive stress component, and the third epitaxial layer has uni-axial strain. A gate structure is disposed on a channel region of the fin structure, such that the gate structure interposes a source region and a drain region of the fin structure.
    Type: Application
    Filed: July 7, 2022
    Publication date: November 3, 2022
    Inventors: MARK VAN DAL, GERBEN DOORNBOS, GEORGIOS VELLIANITIS, TSUNG-LIN LEE, FENG YUAN
  • Publication number: 20220350863
    Abstract: Systems, apparatuses and methods may provide for technology that determines a ratio of floating point instructions to memory read instructions and controls a dimension size of a matrix kernel based at least in part on the ratio. In one example, the matrix kernel conducts an operation between a first matrix and a second matrix and the technology reuses elements of the first matrix for multiple vector lines of the second matrix.
    Type: Application
    Filed: December 16, 2019
    Publication date: November 3, 2022
    Inventors: Yong Wu, Xiaodong LIN, Zhong CAO, Feng YUAN, Hongzhen LIU
  • Publication number: 20220302315
    Abstract: The various described embodiments provide a transistor with a negative capacitance, and a method of creating the same. The transistor includes a gate structure having a ferroelectric layer. The ferroelectric layer is formed by forming a thick ferroelectric film, annealing the ferroelectric film to have a desired phase, and thinning the ferroelectric film to a desired thickness of the ferroelectric layer. This process ensures that the ferroelectric layer will have ferroelectric properties regardless of its thickness.
    Type: Application
    Filed: June 9, 2022
    Publication date: September 22, 2022
    Inventors: Feng Yuan, Ming-Shiang Lin, Chia-Cheng Ho, Jin Cai, Tzu-Chung Wang, Tung Ying Lee
  • Publication number: 20220236637
    Abstract: A photomask and a method of manufacturing a photomask are provided. According to an embodiment, a method includes: providing a substrate; depositing a reflective layer over the substrate; depositing a capping layer over the reflective layer; depositing an absorption layer over the capping layer; and treating the reflective layer by a laser beam to form a border region. The borderer region has a reflectivity less than about 0.1%.
    Type: Application
    Filed: April 15, 2022
    Publication date: July 28, 2022
    Inventors: FENG YUAN HSU, TRAN-HUI SHEN, CHING-HSIANG HSU
  • Patent number: 11387360
    Abstract: The various described embodiments provide a transistor with a negative capacitance, and a method of creating the same. The transistor includes a gate structure having a ferroelectric layer. The ferroelectric layer is formed by forming a thick ferroelectric film, annealing the ferroelectric film to have a desired phase, and thinning the ferroelectric film to a desired thickness of the ferroelectric layer. This process ensures that the ferroelectric layer will have ferroelectric properties regardless of its thickness.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: July 12, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Feng Yuan, Ming-Shiang Lin, Chia-Cheng Ho, Jin Cai, Tzu-Chung Wang, Tung Ying Lee
  • Publication number: 20220214620
    Abstract: A reticle-masking structure is provided. The reticle-masking structure includes a magnetic substrate and a paramagnetic part disposed on the magnetic substrate. The paramagnetic part includes a plurality of fractions disposed on a plurality of protrusion structures. In some embodiments, the fractions are irregularly arranged. A method for forming a reticle-masking structure and an extreme ultraviolet apparatus are also provided.
    Type: Application
    Filed: March 25, 2022
    Publication date: July 7, 2022
    Inventors: CHING-HSIANG HSU, JAMES JENG-JYI HWANG, FENG YUAN HSU
  • Publication number: 20220197593
    Abstract: In response to a user interacting with a tangible peripheral assistant control device (e.g., depressing a button of the device), causing an automated assistant to perform one or more actions. The action(s) performed can be based on input previously provided by the user in configuring the peripheral assistant control device. The action(s) performed in response to interaction with the peripheral assistant control device can vary based on one or more conditions, such as which user is currently active, where the peripheral assistant control device is currently located (which can optionally be inferred based on which of multiple assistant computing devices the button is paired with), and/or the current state of one or more smart devices and/or other devices (e.g., as determined based on a device topology). A utility of the peripheral assistant control device can be automatically extended beyond what was specifically requested by a user during configuration.
    Type: Application
    Filed: March 10, 2022
    Publication date: June 23, 2022
    Inventors: Tomer Amarilio, Yuzhao Ni, Bryan Allen, Norbert Tydingco, Will Donnelly, Feng Yuan, Nathaniel Nesiba, Anurag Jain, Jacky Cheung, Ronghui Zhu, Chunya Hua, Gregory Kielian
  • Publication number: 20220178501
    Abstract: A safety vacuum supply gas cylinder includes a cylinder body, a pipeline structure, first and second check valves (respectively having first and second check valve opening pressures Pc1, Pc2, wherein Pc1 is greater than an atmospheric pressure P0). The cylinder body has an opening and an internal space configured to store a gas, wherein the gas forms an internal pressure P2 smaller than P0. The pipeline structure, communicated with the opening, has first and second pipelines where the first and second check valves are respectively arranged. An external filling gas enters the cylinder body when a pressure of the external filling gas is greater than Pc1 and P2. The gas flows out when P2 is greater than Pc2 and an external environmental pressure.
    Type: Application
    Filed: October 28, 2021
    Publication date: June 9, 2022
    Inventors: FENG YUAN KU, MIN-KUANG CHANG
  • Publication number: 20220173245
    Abstract: A field effect transistor includes a substrate comprising a fin structure. The field effect transistor further includes an isolation structure in the substrate. The field effect transistor further includes a source/drain (S/D) recess cavity below a top surface of the substrate. The S/D recess cavity is between the fin structure and the isolation structure. The field effect transistor further includes a strained structure in the S/D recess cavity. The strain structure includes a lower portion. The lower portion includes a first strained layer, wherein the first strained layer is in direct contact with the isolation structure, and a dielectric layer, wherein the dielectric layer is in direct contact with the substrate, and the first strained layer is in direct contact with the dielectric layer. The strained structure further includes an upper portion comprising a second strained layer overlying the first strained layer.
    Type: Application
    Filed: February 14, 2022
    Publication date: June 2, 2022
    Inventors: Tsung-Lin Lee, Chih-Hao Chang, Chih-Hsin Ko, Feng Yuan, Jeff J. Xu
  • Publication number: 20220128188
    Abstract: A display cabinet includes: a case with an opening at a side thereof, a transparent display screen disposed at the opening, and a drive device connected with the transparent display screen. The drive device is configured to drive the transparent display screen to be movable between a position covering the opening and a position exposing the opening.
    Type: Application
    Filed: October 14, 2021
    Publication date: April 28, 2022
    Inventors: Hepeng BAI, Chunshui ZHOU, Feng YUAN, Hao LIU, Lanxin HU, Shihao SHI
  • Patent number: 11307489
    Abstract: A photomask and a method of manufacturing a photomask are provided. According to an embodiment, a method includes: providing a substrate; depositing a reflective layer over the substrate; depositing a capping layer over the reflective layer; depositing an absorption layer over the capping layer; and treating the reflective layer by a laser beam to form a border region. The laser beam includes a pulse duration of less than about ten picoseconds.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: April 19, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Feng Yuan Hsu, Tran-Hui Shen, Ching-Hsiang Hsu