Abstract: A transistor includes a substrate having an upper surface, a fin structure protruding from the upper surface of the substrate, a first isolation structure over the upper surface of the substrate, and a second isolation structure. The fin structure extends along a first direction and comprising a lower portion and an upper portion. The first isolation structure surrounds the lower portion of the fin structure. The second isolation structure is at least partially embedded in the upper portion of the fin structure.

Abstract: An electrode structure of a transistor, and a pixel structure and a display apparatus comprising the electrode structure of the transistor are disclosed. The electrode structure of the transistor comprises a first electrode and a second electrode. The first electrode has at least two first portions and at least one second portion. The first portions are substantially parallel with each other and each has a first width. The second portion has a second width, and connects the substantially parallel first portions to define a space with an opening. The first width is substantially greater than the second width.

Abstract: A data transfer device of a display equipment and a data transfer method are provided. The data transfer device of the display equipment includes a display panel, a first transfer connector, a second transfer connector, a configuration switch and a control unit. The first and the second transfer connector are in line with a universal serial bus (USB) protocol including a plurality of data paths. When a first electronic device is connected to the first transfer connector, the control unit separates the data paths of the first transfer connector into at least one video data path and at least one data-transferring data path dynamically. A video signal of the first electronic device is transferred to the display panel through the video data path, and the first electronic device and the second electronic device transfer data to each other through the data-transferring data path.

Abstract: An embodiment is an integrated circuit structure including two insulation regions over a substrate with one of the two insulation regions including a void, at least a bottom surface of the void being defined by the one of the two insulation regions. The integrated circuit structure further includes a first semiconductor strip between and adjoining the two insulation regions, where the first semiconductor strip includes a top portion forming a fin over top surfaces of the two insulation regions, a gate dielectric over a top surface and sidewalls of the fin, and a gate electrode over the gate dielectric.

Abstract: An exemplary method of forming a fin field effect transistor that includes first and second etching processes to form a fin structure. The fin structure includes an upper portion and a lower portion separated at a transition. The upper portion has sidewalls that are substantially perpendicular to the major surface of the substrate. The lower portion has tapered sidewalls on opposite sides of the upper portion and a base having a second width larger than the first width.

Abstract: Computer implemented techniques for performing transliteration of input text in a first character set to a second character set are disclosed. The techniques include receiving input text and determining a set of possible transliterations of the input text based on a plurality of mapping standards. Each mapping standard defines a mapping of characters in the first character set to characters in the second character set. The techniques further include determining a set of candidate words in the target language based on the possible transliterations and a text corpus. The techniques also include determining a likelihood score for each one of the candidate words based on a language model in the target language previously received words. The techniques also include providing one or more candidate words based on the likelihood scores and receiving a user selection indicating one of the candidate words.

Abstract: Provided is a lithium ion battery including a battery can, a battery core received in the battery can, electrolyte filled in the battery can, and a battery cover assembled to the battery can. The battery can or the battery cover is provided with a pressure relief valve, and the pressure relief valve is coupled with a mesh cover defining a number of through holes therein. According to the present invention, when thermal runaway occurs to the lithium ion battery, the pressure relief valve breaks timely. Only gases and electrolyte vapor can pass through the mesh cover. Solid particles cannot pass through the mesh cover. Therefore, ignition of the flammable gases, the electrolyte vapor and the high temperature solid particles in the surrounding air afar from the pressure relief valve is avoided and the safety performance of the lithium ion battery can be improved remarkably.

Abstract: A photomask and method for fabricating an integrated circuit is provided. The photomask includes a plurality of main features, enclosed in at least one first region and at least one second region, wherein the first region comprises single the main feature and the second region comprises multiple the main features; and a plurality of assistant features disposed between the first region and the second region, or between the second regions. The photomask enhances the accuracy of the critical dimension and facilitate fabricating an integrated circuit.

Abstract: A filter capable of adjusting frequency and bandwidth for dynamically setting at least one of the filter center frequency and bandwidth includes a first movable member, a second movable member, an upper casing, a lower casing, multiple conductive clamping members, a cavity and a driving module. The first and second movable members have multiple first and second lugs formed on the first and second boards respectively. The upper and lower casings have multiple upper and lower openings corresponsive to the first lugs and the second lugs respectively. The conductive clamping members are corresponsive to the upper openings and the lower openings. The cavity has multiple chambers and multiple connecting portions. The driving module changes the position of the first movable member to determine the filter center frequency and the position of the second movable member to determine the bandwidth.

Abstract: A method of fabricating a field effect transistor (FET) includes forming a channel portion over a first surface of a substrate, wherein the channel portion comprises germanium and defines a second surface above the first surface. The method further includes forming cavities that extend through the channel portion and into the substrate. The method further includes epitaxially-growing a strained material in the cavities, wherein the strained material comprises SiGe, Ge, Si, SiC, GeSn, SiGeSn, SiSn or a III-V material.

Abstract: A field effect transistor includes a substrate comprising a fin structure. The field effect transistor further includes an isolation structure in the substrate. The field effect transistor further includes a source/drain (S/D) recess cavity below a top surface of the substrate. The S/D recess cavity is between the fin structure and the isolation structure. The field effect transistor further includes a strained structure in the S/D recess cavity. The strain structure includes a lower portion. The lower portion includes a first strained layer, wherein the first strained layer is in direct contact with the isolation structure, and a dielectric layer, wherein the dielectric layer is in direct contact with the substrate, and the first strained layer is in direct contact with the dielectric layer. The strained structure further includes an upper portion comprising a second strained layer overlying the first strained layer.

Abstract: An electrode structure of a transistor, and a pixel structure and a display apparatus comprising the electrode structure of the transistor are disclosed. The electrode structure of the transistor comprises a first electrode and a second electrode. The first electrode has at least two first portions and at least one second portion. The first portions are substantially parallel with each other and each has a first width. The second portion has a second width, and connects the substantially parallel first portions to define a space with an opening. The first width is substantially greater than the second width.

Abstract: A virtual teller machine system, includes an operating room (103) with a display (101) and a console (102) built therein. In the system, a display screen (1011) is alternately attached with a first polarizing film (1011a) having a first polarization direction and a second polarizing film (1011b) having a second polarization direction, a console (102) is provided with a visual device (1021) attached with the first polarizing film (1011a), and in combination with dual-channel video playing control units (1012, 1013, 1014 and 1015), only a user in the operating room (103) can see an operation interface through the visual device (1021), and a user outside the operating room (103) can see other image of a non-operation interface through transparent glass (1031), so as to improve security of user operation and user experience.

Abstract: A method of switching button functions is disclosed. The method is used for switching the functions of buttons used to operate a display when the portable device is connected to the display. The method includes the following steps of: detecting whether the portable device is connected to the display; if yes, determining whether the functions of the buttons can be switched according to whether a button information is received; if yes, pairing each of the buttons with functions provided by the portable device; and storing a pairing information of each of the buttons and the functions provided by the portable device.

Abstract: An integrated circuit structure includes a semiconductor substrate including a first portion in a first device region, and a second portion in a second device region. A first semiconductor fin is over the semiconductor substrate and has a first fin height. A second semiconductor fin is over the semiconductor substrate and has a second fin height. The first fin height is greater than the second fin height.

Abstract: A display and a method for displaying video frames thereof are provided. In the method, a connection state between a first port, a second port and a source device is detected. When only one port is connected to the source device, an original resolution data is provided to the source device through the port and a video streaming transmitted from the source device is received. The video streaming is divided and respectively outputted to the display by a first display controller and a second display controller. When the first port and the second port are both connected to the source device, two adjusted resolution data are provided to the source device through the first port and the second port respectively, and two video streamings transmitted from the source device are received and outputted to the display by the first display controller and the second display controller respectively.

Abstract: An electric pump has a pump body, a pump magnet received in the pump body, an impeller received in the pump body and fixed to the pump magnet, and a disc type electric motor. The electric motor includes a stator, disc type coils fixed to a surface of the stator, a rotor rotatably positioned above the coils, and a circuit board electrically connected to the coils. The rotor has a rotor magnet positioned beneath the pump body and magnetically coupled to the pump magnet. When the coils are energized, an axial magnetic field is generated to drive the rotor and, through the magnetic coupling between the rotor magnet and the pump magnet, rotate the impeller.

Abstract: An integrated circuit device includes a substrate having a first portion in a first device region and a second portion in a second device region. A first semiconductor strip is in the first device region. A dielectric liner has an edge contacting a sidewall of the first semiconductor strip, wherein the dielectric liner is configured to apply a compressive stress or a tensile stress to the first semiconductor strip. A Shallow Trench Isolation (STI) region is over the dielectric liner, wherein a sidewall and a bottom surface of the STI region is in contact with a sidewall and a top surface of the dielectric liner.

Abstract: An exemplary structure for the fin field effect transistor comprises a substrate comprising a major surface; a plurality of fin structures protruding from the major surface of the substrate, wherein each fin structure comprises an upper portion and a lower portion separated at a transition location at where the sidewall of the fin structure is at an angle of 85 degrees to the major surface of the substrate, wherein the upper portion has sidewalls that are substantially perpendicular to the major surface of the substrate and a top surface having a first width, wherein the lower portion has tapered sidewalls on opposite sides of the upper portion and a base having a second width larger than the first width; and a plurality of isolation structures between the fin structures, wherein each isolation structure extends from the major surface of the substrate to a point above the transition location.

Abstract: An embodiment is an integrated circuit structure including two insulation regions over a substrate with one of the two insulation regions including a void, at least a bottom surface of the void being defined by the one of the two insulation regions. The integrated circuit structure further includes a first semiconductor strip between and adjoining the two insulation regions, where the first semiconductor strip includes a top portion forming a fin over top surfaces of the two insulation regions, a gate dielectric over a top surface and sidewalls of the fin, and a gate electrode over the gate dielectric.