Patents by Inventor Flynn Carson
Flynn Carson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7247519Abstract: A semiconductor multi-package module has stacked lower and upper packages, each of which includes a die attached to a substrate, in which the second package is inverted, in which the upper and lower substrates are interconnected by wire bonding, and in which the inverted second package comprises a bump chip carrier package. Also, a method for making a semiconductor multi-package module, by providing a lower molded package including a lower substrate and a die, affixing an upper bump chip carrier package including an upper substrate in inverted orientation onto the upper surface of the lower package, and forming z-interconnects between the upper and lower substrates.Type: GrantFiled: January 23, 2006Date of Patent: July 24, 2007Assignee: ChipPAC, Inc.Inventors: Marcos Karnezos, Flynn Carson
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Publication number: 20070109750Abstract: An integrated circuit package system is provided forming a substrate having an integrated circuit die attached thereon, attaching a heat slug on the substrate, the heat slug having a planar top surface and an opening in the planar top surface, and molding the heat slug and the substrate through the opening.Type: ApplicationFiled: April 27, 2006Publication date: May 17, 2007Applicant: STATS ChipPAC Ltd.Inventors: Myung Kil Lee, Flynn Carson
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Patent number: 7217598Abstract: A plastic ball grid array semiconductor package employs a metal heat spreader having supporting arms embedded in the molding cap, in which the embedded supporting arms are not directly affixed to the substrate or in which any supporting arm that is affixed to the substrate is affixed using a resilient material such as an elastomeric adhesive. Also, a process for forming the package includes steps of placing the heat spreader in a mold cavity, placing the substrate over the mold cavity such that the die support surface of the substrate contacts the supporting arms of the heat spreader, and injecting the molding material into the cavity to form the molding cap. The substrate is positioned in register over the mold cavity such that as the molding material hardens to form the mold cap the embedded heat spreader becomes fixed in the appropriate position in relation to the substrate.Type: GrantFiled: August 26, 2005Date of Patent: May 15, 2007Assignee: ChipPAC, Inc.Inventors: Taekeun Lee, Flynn Carson, Marcos Karnezos
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Publication number: 20060244157Abstract: An integrated circuit package system including providing a base substrate, attaching a base integrated circuit on the base substrate, attaching a core substrate over the base integrated circuit, attaching a substrate electrical connector between the core substrate and the base substrate, and applying an encapsulant having the core substrate partially exposed over the base integrated circuit.Type: ApplicationFiled: April 27, 2006Publication date: November 2, 2006Inventor: Flynn Carson
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Publication number: 20060244117Abstract: Semiconductor package assemblies include a package subassembly, having at least one die affixed to, and electrically interconnected with, a die attach side of a first package substrate, and a second substrate having a first side and a second (“land”) side, mounted over the first package with the first side of the second substrate facing the die attach side of the first package substrate, and supported by a spacer or a spacer assembly. Accordingly, the die attach sides of the first substrate and the first side of the second substrate face one another, and the “land” sides of the substrates face away from one another. Z-interconnection of the package and the substrate is by wire bonds connecting the first and second substrates.Type: ApplicationFiled: March 31, 2006Publication date: November 2, 2006Applicant: STATS ChipPAC, Ltd.Inventors: Marcos Karnezos, Flynn Carson
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Publication number: 20060158295Abstract: A semiconductor multi-package module has stacked lower and upper packages, each of which includes a die attached to a substrate, in which the second package is inverted, in which the upper and lower substrates are interconnected by wire bonding, and in which the inverted second package comprises a bump chip carrier package. Also, a method for making a semiconductor multi-package module, by providing a lower molded package including a lower substrate and a die, affixing an upper bump chip carrier package including an upper substrate in inverted orientation onto the upper surface of the lower package, and forming z-interconnects between the upper and lower substrates.Type: ApplicationFiled: January 23, 2006Publication date: July 20, 2006Applicant: ChipPAC, Inc.Inventors: Marcos Karnezos, Flynn Carson
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Patent number: 7053477Abstract: A semiconductor multi-package module has stacked lower and upper packages, each of which includes a die attached to a substrate, in which the second package is inverted, in which the upper and lower substrates are interconnected by wire bonding, and in which the inverted second package comprises a bump chip carrier package. Also, a method for making a semiconductor multi-package module, by providing a lower molded package including a lower substrate and a die, affixing an upper bump chip carrier package including an upper substrate in inverted orientation onto the upper surface of the lower package, and forming z-interconnects between the upper and lower substrates.Type: GrantFiled: October 8, 2003Date of Patent: May 30, 2006Assignee: ChipPAC, Inc.Inventors: Marcos Karnezos, Flynn Carson
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Publication number: 20060019429Abstract: A plastic ball grid array semiconductor package employs a metal heat spreader having supporting arms embedded in the molding cap, in which the embedded supporting arms are not directly affixed to the substrate or in which any supporting arm that is affixed to the substrate is affixed using a resilient material such as an elastomeric adhesive. Also, a process for forming the package includes steps of placing the heat spreader in a mold cavity, placing the substrate over the mold cavity such that the die support surface of the substrate contacts the supporting arms of the heat spreader, and injecting the molding material into the cavity to form the molding cap. The substrate is positioned in register over the mold cavity such that as the molding material hardens to form the mold cap the embedded heat spreader becomes fixed in the appropriate position in relation to the substrate.Type: ApplicationFiled: August 26, 2005Publication date: January 26, 2006Applicant: ChipPAC, IncInventors: Taekeun Lee, Flynn Carson, Marcos Karnezos
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Publication number: 20060012018Abstract: A multipackage module has multiple die of various types and having various functions and, in some embodiments, the module includes a digital processor, an analog device, and memory. A first die, having a comparatively large footprint, is mounted onto first die attach region on a surface of a first package substrate. A second die, having a significantly smaller footprint, is mounted upon the surface of the first die, on a second die attach region toward one edge of the first die. The first die is electrically connected by wire bonds to conductive traces in the die-attach side of the substrate. The second die is electrically connected by wire bonds to the first package substrate, and may additionally be electrically connected by wire bonds to the first die. In some embodiments a spacer is mounted upon the first die, on a spacer attach region of the surface of the first die that is not within the die attach region, and which may be generally near a margin of the first die.Type: ApplicationFiled: December 23, 2004Publication date: January 19, 2006Applicant: ChipPAC, Inc.Inventors: Marcos Karnezos, Flynn Carson, Youngcheol Kim
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Patent number: 6967126Abstract: A plastic ball grid array semiconductor package employs a metal heat spreader having supporting arms embedded in the molding cap, in which the embedded supporting arms are not directly affixed to the substrate or in which any supporting arm that is affixed to the substrate is affixed using a resilient material such as an elastomeric adhesive. Also, a process for forming the package includes steps of placing the heat spreader in a mold cavity, placing the substrate over the mold cavity such that the die support surface of the substrate contacts the supporting arms of the heat spreader, and injecting the molding material into the cavity to form the molding cap. The substrate is positioned in register over the mold cavity such that as the molding material hardens to form the mold cap the embedded heat spreader becomes fixed in the appropriate position in relation to the substrate.Type: GrantFiled: June 27, 2003Date of Patent: November 22, 2005Assignee: ChipPAC, Inc.Inventors: Taekeun Lee, Flynn Carson, Marcos Karnezos
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Publication number: 20050062149Abstract: A plastic ball grid array semiconductor package, employs a large heat spreader, externally attached to the upper surface of the mold cap, to provide improved thermal performance in a thin package format. The plastic ball grid array structure in the package can be constructed substantially as a standard PBGA, although in some embodiments the PBGA has a thinner molding than usual for a standard PBGA, or the wire bonding has a lower loop profile than usual, or the semiconductor device is thinner than usual. The invention can be particularly useful in applications where greater power dissipation is required, or where thin form factors and small footprints are desired.Type: ApplicationFiled: October 13, 2004Publication date: March 24, 2005Applicant: ChipPAC, IncInventors: Marcos Karnezos, Bret Zahn, Flynn Carson
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Patent number: 6791169Abstract: A microelectronic package includes first and second microelectronic elements in spaced-apart relationship which are electrically interconnected by a plurality of flexible leads and a layer of anisotropic conductive material. The flexible leads having one end attached to terminals on one of the microelectronic elements extends away therefrom having its opposite tip end electrically interconnected to contacts on the other microelectronic element by virtue of an interposed layer of the anisotropic conductive material.Type: GrantFiled: July 25, 2002Date of Patent: September 14, 2004Assignee: Tessera, Inc.Inventor: Flynn Carson
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Publication number: 20040119152Abstract: A semiconductor multi-package module has stacked lower and upper packages, each of which includes a die attached to a substrate, in which the second package is inverted, in which the upper and lower substrates are interconnected by wire bonding, and in which the inverted second package comprises a bump chip carrier package. Also, a method for making a semiconductor multi-package module, by providing a lower molded package including a lower substrate and a die, affixing an upper bump chip carrier package including an upper substrate in inverted orientation onto the upper surface of the lower package, and forming z-interconnects between the upper and lower substrates.Type: ApplicationFiled: October 8, 2003Publication date: June 24, 2004Applicant: ChipPAC, Inc.Inventors: Marcos Karnezos, Flynn Carson
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Publication number: 20040043539Abstract: A plastic ball grid array semiconductor package employs a metal heat spreader having supporting arms embedded in the molding cap, in which the embedded supporting arms are not directly affixed to the substrate or in which any supporting arm that is affixed to the substrate is affixed using a resilient material such as an elastomeric adhesive. Also, a process for forming the package includes steps of placing the heat spreader in a mold cavity, placing the substrate over the mold cavity such that the die support surface of the substrate contacts the supporting arms of the heat spreader, and injecting the molding material into the cavity to form the molding cap. The substrate is positioned in register over the mold cavity such that as the molding material hardens to form the mold cap the embedded heat spreader becomes fixed in the appropriate position in relation to the substrate.Type: ApplicationFiled: June 27, 2003Publication date: March 4, 2004Applicant: ChipPAC, Inc.Inventors: Taekeun Lee, Flynn Carson, Marcus Karnezos
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Patent number: 6661083Abstract: A lead frame for a surface mount semiconductor chip package includes a die attach paddle and leads, the die attach paddle having down bond attachment sites on an upper surface of the paddle near a peripheral margin of the paddle, and having a central die attach region on an upper surface of the paddle, wherein a portion of the upper surface of the paddle is recessed. In some embodiments the recessed portion of the upper surface of the paddle includes the die attach region, and in other embodiments the recessed portion of the upper surface of the paddle includes a groove. Also, a lead frame surface mount chip package including such a lead frame.Type: GrantFiled: February 22, 2002Date of Patent: December 9, 2003Assignee: ChipPAC, IncInventors: Sang D. Lee, Flynn Carson, Ki T. Ryu, Koo H. Lee
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Patent number: 6614123Abstract: A plastic ball grid array semiconductor package employs a metal heat spreader having supporting arms embedded in the molding cap, in which the embedded supporting arms are not directly affixed to the substrate or in which any supporting arm that is affixed to the substrate is affixed using a resilient material such as an elastomeric adhesive. Also, a process for forming the package includes steps of placing the heat spreader in a mold cavity, placing the substrate over the mold cavity such that the die support surface of the substrate contacts the supporting arms of the heat spreader, and injecting the molding material into the cavity to form the molding cap. The substrate is positioned in register over the mold cavity such that as the molding material hardens to form the mold cap the embedded heat spreader becomes fixed in the appropriate position in relation to the substrate.Type: GrantFiled: July 31, 2001Date of Patent: September 2, 2003Assignee: ChipPAC, Inc.Inventors: Taekeun Lee, Flynn Carson, Marcos Karnezos
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Publication number: 20030030139Abstract: A plastic ball grid array semiconductor package, employs a large heat spreader, externally attached to the upper surface of the mold cap, to provide improved thermal performance in a thin package format. The plastic ball grid array structure in the package can be constructed substantially as a standard PBGA, although in some embodiments the PBGA has a thinner molding than usual for a standard PBGA, or the wire bonding has a lower loop profile than usual, or the semiconductor device is thinner than usual. The invention can be particularly useful in applications where greater power dissipation is required, or where thin form factors and small footprints are desired.Type: ApplicationFiled: June 26, 2001Publication date: February 13, 2003Inventors: Marcos Karnezos, Bret Zahn, Flynn Carson
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Publication number: 20030025215Abstract: A plastic ball grid array semiconductor package employs a metal heat spreader having supporting arms embedded in the molding cap, in which the embedded supporting arms are not directly affixed to the substrate or in which any supporting arm that is affixed to the substrate is affixed using a resilient material such as an elastomeric adhesive. Also, a process for forming the package includes steps of placing the heat spreader in a mold cavity, placing the substrate over the mold cavity such that the die support surface of the substrate contacts the supporting arms of the heat spreader, and injecting the molding material into the cavity to form the molding cap. The substrate is positioned in register over the mold cavity such that as the molding material hardens to form the mold cap the embedded heat spreader becomes fixed in the appropriate position in relation to the substrate.Type: ApplicationFiled: July 31, 2001Publication date: February 6, 2003Applicant: ChipPAC, Inc.Inventors: Taekeun Lee, Flynn Carson, Marcos Karnezos
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Publication number: 20020179330Abstract: A microelectronic package includes first and second microelectronic elements in spaced-apart relationship which are electrically interconnected by a plurality of flexible leads and a layer of anisotropic conductive material. The flexible leads having one end attached to terminals on one of the microelectronic elements extends away therefrom having its opposite tip end electrically interconnected to contacts on the other microelectronic element by virtue of an interposed layer of the anisotropic conductive material.Type: ApplicationFiled: July 25, 2002Publication date: December 5, 2002Applicant: Tessera, Inc.Inventor: Flynn Carson
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Publication number: 20020163015Abstract: A lead frame for a surface mount semiconductor chip package includes a die attach paddle and leads, the die attach paddle having down bond attachment sites on an upper surface of the paddle near a peripheral margin of the paddle, and having a central die attach region on an upper surface of the paddle, wherein a portion of the upper surface of the paddle is recessed. In some embodiments the recessed portion of the upper surface of the paddle includes the die attach region, and in other embodiments the recessed portion of the upper surface of the paddle includes a groove. Also, a lead frame surface mount chip package including such a lead frame.Type: ApplicationFiled: February 22, 2002Publication date: November 7, 2002Applicant: ChipPAC, Inc.Inventors: Sang D. Lee, Flynn Carson, Ki T. Ryu, Koo H. Lee