Abstract: A photonic integrated circuit (PIC) chip comprising an array of modulated sources, each providing a modulated signal output at a channel wavelength different from the channel wavelength of other modulated sources and a wavelength selective combiner having an input optically coupled to received all the signal outputs from the modulated sources and provide a combined output signal on an output waveguide from the chip. The modulated sources, combiner and output waveguide are all integrated on the same chip.

Abstract: An optical transport network comprises a monolithic transmitter photonic integrated circuit (TxPIC) InP-based chip and a monolithic receiver photonic integrated circuit (RxPIC) InP-based chip.

Abstract: A method is disclosed for optimizing optical channel signal demultiplexing in a monolithic receiver photonic integrated circuit (RxPIC) chip by providing an integrated channel signal demultiplexing with multiple waveguide input verniers provided to an WDM signal demultiplexer. The RxPIC chip may optionally include an integrated amplifier in at least some of the waveguide input verniers. The RxPIC chip may be comprised of, in monolithic form, a plurality of optional semiconductor optical amplifiers (SOAs) at the input of the chip to receive a WDM signal from an optical link which is provided along a plurality of waveguide input verniers to an integrated optical demultiplexer, such as, but not limited to, an arrayed waveguide grating (AWG), as a WDM signal demultiplexer. Thus, optical outputs from the respective semiconductor laser amplifiers are provided as vernier inputs to the optical demultiplexer forming a plurality of input verniers at the input to the optical demultiplexer.

Abstract: Disclosed is a method of in-wafer testing of integrated optical components and in-wafer chips with photonic integrated circuits (PICs).

Abstract: Disclosed is a method of in-wafer testing of integrated optical components and in-wafer chips with photonic integrated circuits (PICs).

Abstract: An optical-to-electrical-to-optical converter comprises a monolithic receiver photonic integrated circuit (RxPIC) InP-based chip comprising an optical waveguide formed in the chip from a chip input to receive a first multiplexed channel signal from an optical link and provide them to an arrayed waveguide grating (AWG) which demultiplexes the multiplexed channel signals and provides a plurality of electrical channel signals to an electronic regenerator. The regenerator regenerates the electrical channel signals to an original signal waveform and provides the reformed electrical signals to a monolithic transmitter photonic integrated circuit (TxPIC) InP-based chip having an array of modulated sources formed in the chip that are coupled as inputs to an arrayed waveguide grating (AWG). The TxPIC modulates the reformed electrical signals to form a plurality of optical channel sign which are combined to form a second first multiplexed channel signal for transmission on an optical link.

Abstract: A transmitter array that has at least one pixel element. Each pixel element includes at least a primary semiconductor laser and a secondary semiconductor laser. In this manner, when the primary semiconductor laser is inoperative, the secondary semiconductor laser is utilized for transmission.

Abstract: Photonic integrated circuits (PICs), also referred to as opto-electronic integrated circuits (OEICs), and more particularly to a PIC in the form of an optical receiver PIC or RxPIC chip and an optical transmitter PIC (TxPIC) are employed in an optical transport network. Integrated on the RxPIC chip, starting at the input end which is coupled to receive multiplexed optical data signals from an optical transport network is an optical amplifier, an optical demultiplexer, and a plurality of on-chip photodiodes (PDs) each to receive a demultiplexed data signal from the AWG DEMUX for optical-to-electrical signal conversion. The optical input amplifier may be an on-chip gain clamped semiconductor optical amplifier (GC-SOA) or an off-chip fiber amplifier. The optical input amplifier may be optional if the channel signal demultiplexer provides for minimal insertion loss which is optimum with a properly designed arrayed waveguide grating (AWG) demultiplexer.

Abstract: Using lateral physical modulation, the optical properties of VCSELs can be stabilized and controlled by spatially varying the characteristics of the device material. This results in stabilization of the linewidth, the numerical aperture, the near and far field, as a function of bias and temperature. A VCSEL includes a substrate, an active region sandwiched between an upper and lower distributed Bragg reflector (DBRs), and electrical contacts. A light emission property e.g. the index of refraction, may be varied by patterning or texturing the surface of the substrate prior to growth of the epitaxial DBR layers or at least one layer of either the upper or lower DBRs, or by inserting a non-planar layer.

Abstract: An optical probe and a method for testing an optical chip or device, such as an photonic integrated circuit (PIC), to provide for testing of such devices or circuits while they are still in their in-wafer form and is accomplished by using a an optical probe for interrogation of the circuit where an access is provided in the wafer to one or more of such in-wafer devices or circuits. As one example, the interrogation may be an interrogation beam provided at the access input to the in-wafer device or circuit. As another example, the interrogation may be an optical pickup from the access input to the in-wafer device or circuit.

Abstract: A monolithic photonic integrated circuit (PIC) chip comprises an array of modulated sources providing a plurality of channel signals of different wavelengths and an optical combiner coupled to receive the channel signals and produce a combined output of the channel signals. The arrays of modulated sources are formed as ridge waveguides to enhance the output power from the respective modulated sources so that the average output power from the sources is approximately 2 to 4 times higher than in the case of comparable arrays of modulated sources formed as buried waveguides.

Abstract: An optical transport network comprises a monolithic transmitter photonic integrated circuit (TxPIC) InP-based chip and a monolithic receiver photonic integrated circuit (RxPIC) InP-based chip.

Abstract: An optical communication system including an integrated circuit chip, an electro-optical chip operatively integrated on the integrated circuit chip, an adjustable optical chip which includes at least one optical element disposed between the electro-optical chip and one of a source or recipient of at least one optical signal, at least one micromachine operatively coupled to the at least one optical element to selectively manipulate the at least one optical element; an optical signal sensor disposed relative to the at least one optical signal to sense an optical signal condition data, and to transmit said optical signal condition data to the integrated circuit chip, a feedback circuit between the integrated circuit chip and the at least one micromachine, the integrated circuit chip configured to receive the optical signal condition data, convert it to a corresponding feedback signal, and to transmit the feedback signal through the feedback circuit to the micromachine, thereby causing the micromachine to selecti

Abstract: The WDM receiver includes a wavelength demultiplexer, a detector array and a signal extractor. The wavelength demultiplexer receives an n-channel optical input signal and transmits the n-channel optical input signal to m optical outputs. Each of the optical outputs receives a wavelength band centered at a different wavelength. The wavelength bands have a center-to-center wavelength spacing of ???. The detector array is composed of m detector elements coupled to the wavelength demultiplexer. Each of the detector elements generates a detection signal in response to light received from one of the optical outputs of the wavelength demultiplexer. The signal extractor receives the detection signals from the detector array and converts the detection signals to an n-channel receiver output signal, each channel of which corresponds to a different one of the n channels of the optical input signal.

Abstract: A method of in-wafer testing is provided for a monolithic photonic integrated circuit (PIC) formed in a semiconductor wafer where each such in-wafer circuit comprises two or more integrated electro-optic components, one of each in tandem forming a signal channel in the circuit. The method includes the provision of a first integrated photodetector at a rear end of each signal channel and a second integrated photodetector at forward end of each signal channel. Then, the testing is accomplished, first, by sequentially operating a first of a selected channel electro-optic component in a selected circuit to monitor light output from a channel via its first corresponding channel photodetector and adjusting its operating characteristics by detecting that channel electro-optic component output via its second corresponding channel photodetector to provide first calibration data.

Abstract: A method for forming and apparatus comprising a free space coupler region having a plurality of optical waveguides coupled to the space coupler region at an interface region, the waveguides converging with one another to the interface region, and a trench formed between adjacent waveguides, the depth of the trench or trenches extending from an outer point to the interface region and monotonically decreasing in depth from the outer point to the interface region.

Abstract: Disclosed are apparatus and methods of reducing insertion loss, passivation, planarization and in-wafer testing of integrated optical components and in-wafer chips in photonic integrated circuits (PICs).

Abstract: A method of electrically isolating and operating electro-optical components integrated in a monolithic semiconductor photonic chip, such as an EML or PIC chip. A bias, VC, is applied to the isolation region so that any parasitical current path developed between adjacent active or passive optical components, now separated by an isolation region, is established through the electrical isolation region and clamped to the bias, VC. The applied bias, VC, may be a positive bias, a negative bias, or a zero or a ground bias. The electrical isolation regions are formed by spatial current blocking regions formed at adjacent sides of the electrical isolations region transverse to a direction of light propagation through the optical components, or between the electrical isolation regions and adjacent optical components. The spatial current blocking regions may be comprised of a pair of spatially disposed trenches or ion implanted regions or high resistance implanted regions.

Abstract: A method of in-wafer testing is provided for a monolithic photonic integrated circuit (PIC) formed in a semiconductor wafer where each such in-wafer circuit comprises two or more integrated electro-optic components, one of each in tandem forming a signal channel in the circuit. The method includes the provision of a first integrated photodetector at a rear end of each signal channel and a second integrated photodetector at forward end of each signal channel. Then, the testing is accomplished, first, by sequentially operating a first of a selected channel electro-optic component in a selected circuit to monitor light output from a channel via its first corresponding channel photodetector and adjusting its operating characteristics by detecting that channel electro-optic component output via its second corresponding channel photodetector to provide first calibration data.

Abstract: Photonic integrated circuits (PIC) semiconductor chips are provided with thermal isolation and/or heat dissipation structures between integrated optical components in the PIC chip, particularly integrated active optical components. These structures may also serve as a ground path for electrical circuitry on the PIC chip. An important function is the enhanced thermal isolation from, or dissipation of heat from, between adjacent or neighboring optical components in the PIC so that required spacing between adjacent optical components can be made even less than the thickness of the substrate thereby realizing a more compact optical component array on the monolithic PIC chips.