Patents by Inventor Fu-An Yu

Fu-An Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200334350
    Abstract: Provided is an electronic device, including a housing, a fixing hole, a platform and a sensor. The fixing hole is located at the housing and configured to detachably fix an identification element. The platform extends outward from the lower edge of the fixing hole. The sensor is disposed on the platform and configured to communicate with the identification element.
    Type: Application
    Filed: April 13, 2020
    Publication date: October 22, 2020
    Inventors: Chia-Hao HUNG, Ming-Chih HUANG, Tong-Shen HSIUNG, Meng-Chu HUANG, Fu-Yu CAI, Chieh MII, Ya-Yun HUANG, Minseong KIM, Shang-Chih LIANG
  • Publication number: 20200333850
    Abstract: An electronic device including a luminous strip is provided, including a housing, a first light guiding strip, a second light guiding strip, a light-transmissive structure, a first light-emitting element, a second light-emitting element and a third light-emitting element. The housing includes a first side wall and a second side wall, where a corner area exists between the first side wall and the second side wall. The first light guiding strip is disposed on the first side wall. The second light guiding strip is disposed on the second side wall. The light-transmissive structure is disposed in the corner area, and connected to the first light guiding strip and the second light guiding strip. The first light-emitting element is disposed at a first end of the first light guiding strip. The second light-emitting element is disposed at a second end of the second light guiding strip.
    Type: Application
    Filed: April 15, 2020
    Publication date: October 22, 2020
    Inventors: Chieh MII, Ming-Chih HUANG, Tong-Shen HSIUNG, Meng-Chu HUANG, Fu-Yu CAI, Shang-Chih LIANG, Chia-Hao HUNG, Li-Wei YU, Chi Cheng LIAO, Hsin-I LU, Cheng-Yu LIN
  • Patent number: 10725962
    Abstract: An electronic system and a control method thereof are provided. The electronic system includes a first device, a second device and a control device. The first device includes a first processor and a first control module, and the first control module is electrically connected to the first processor. The second device is detachably disposed on the first device. The second device includes a second processor and a second control module, and the second control module is electrically connected to the second processor. The control device is detachably connected to the second device, and the first device, the second device and the control device are coupled to each other.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: July 28, 2020
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Tzu-Jen Mao, Kuan-Pei Lee, Fu-Yu Cai, Chieh Mii, Ya-Yun Huang, Ming-Chih Huang, Tong-Shen Hsiung, Shang-Chih Liang
  • Publication number: 20200227528
    Abstract: A semiconductor device and method for forming the semiconductor device are provided. In some embodiments, a semiconductor substrate comprises a device region. An isolation structure extends laterally in a closed path to demarcate the device region. A first source/drain region and a second source/drain region are in the device region and laterally spaced. A sidewall of the first source/drain region directly contacts the isolation structure at a first isolation structure sidewall, and remaining sidewalls of the first source/drain region are spaced from the isolation structure. A selectively-conductive channel is in the device region, and extends laterally from the first source/drain region to the second source/drain region. A plate comprises a central portion and a first peripheral portion. The central portion overlies the selectively-conductive channel, and the first peripheral portion protrudes from the central portion towards the first isolation structure sidewall.
    Type: Application
    Filed: April 1, 2020
    Publication date: July 16, 2020
    Inventors: Chih-Chang Cheng, Fu-Yu Chu, Ming-Ta Lei, Ruey-Hsin Liu, Shih-Fen Huang
  • Publication number: 20200227529
    Abstract: A semiconductor device and method for forming the semiconductor device are provided. In some embodiments, a semiconductor substrate comprises a device region. An isolation structure extends laterally in a closed path to demarcate the device region. A first source/drain region and a second source/drain region are in the device region and laterally spaced. A sidewall of the first source/drain region directly contacts the isolation structure at a first isolation structure sidewall, and remaining sidewalls of the first source/drain region are spaced from the isolation structure. A selectively-conductive channel is in the device region, and extends laterally from the first source/drain region to the second source/drain region. A plate comprises a central portion and a first peripheral portion. The central portion overlies the selectively-conductive channel, and the first peripheral portion protrudes from the central portion towards the first isolation structure sidewall.
    Type: Application
    Filed: April 1, 2020
    Publication date: July 16, 2020
    Inventors: Chih-Chang Cheng, Fu-Yu Chu, Ming-Ta Lei, Ruey-Hsin Liu, Shih-Fen Huang
  • Patent number: 10714432
    Abstract: In some embodiments, a semiconductor device is provided. The semiconductor device includes an isolation structure disposed in a semiconductor substrate, where an inner perimeter of the isolation structure demarcates a device region of the semiconductor substrate. A gate is disposed over the device region, where an outer perimeter of the gate is disposed within the inner perimeter of the isolation structure. A first source/drain region is disposed in the device region and on a first side of the gate. A second source/drain region is disposed in the device region and on a second side of the gate opposite the first side. A silicide blocking structure partially covers the gate, partially covers the first source/drain region, and partially covers the isolation structure, where a first sidewall of the silicide blocking structure is disposed between first opposite sidewalls of the gate.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: July 14, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Chang Cheng, Fu-Yu Chu, Ruey-Hsin Liu
  • Publication number: 20200220674
    Abstract: A wireless device performs spatial reuse in a wireless local area network. When receiving a packet, the wireless device measures a received signal quality from a first portion of the packet, and determines a required signal quality for correctly decoding a payload of the packet based on information in a packet header. The wireless device compares the received signal quality with the required signal quality. If the received signal quality is lower than the required signal quality, the wireless device transmits a signal that overlaps in time and in frequency with a second portion of the packet. Alternatively, a wireless device may identify a Basic Service Set Identification (BSSID) of a received packet. If the BSSID indicates that the packet is an inter-BSS packet, the wireless device transmits a signal overlapping in time and in frequency with the packet before reception of a frame check sequence (FCS) in the packet.
    Type: Application
    Filed: December 26, 2019
    Publication date: July 9, 2020
    Inventors: Ray-Kuo Lin, Tsungjung Lee, Fu-Yu Tsai, Wei-Chen Wang
  • Publication number: 20200212290
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first ultra low-k (ULK) dielectric layer on the first MTJ; performing a first etching process to remove part of the first ULK dielectric layer and forming a damaged layer on the first ULK dielectric layer; and forming a second ULK dielectric layer on the damaged layer.
    Type: Application
    Filed: January 23, 2019
    Publication date: July 2, 2020
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Patent number: 10681336
    Abstract: Aspects of the disclosure relate generally to generating depth data from a video. As an example, one or more computing devices may receive an initialization request for a still image capture mode. After receiving the request to initialize the still image capture mode, the one or more computing devices may automatically begin to capture a video including a plurality of image frames. The one or more computing devices track features between a first image frame of the video and each of the other image frames of the video. Points corresponding to the tracked features may be generated by the one or more computing devices using a set of assumptions. The assumptions may include a first assumption that there is no rotation and a second assumption that there is no translation. The one or more computing devices then generate a depth map based at least in part on the points.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: June 9, 2020
    Assignee: Google LLC
    Inventors: David Gallup, Fu Yu, Steven Maxwell Seitz
  • Patent number: 10663831
    Abstract: A method of making a curved electrochromic film includes: disposing a UV curable adhesive layer between a first electrochromic member and a second electrochromic member to form an electrochromic film semi-product in flat form; arching the electrochromic film semi-product between the first and second bending members of a forming apparatus and by moving the first and second bending members toward each other; and curing the UV curable adhesive layer using a UV light source while the electrochromic film semi-product is arched. Forming apparatuses for forming a flat electrochromic film semi-product into a curved electrochromic film are also disclosed.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: May 26, 2020
    Assignee: TINTABLE KIBING CO., LTD.
    Inventors: Fu-Yu Tsai, Keng-Ming Hu, Jui-Wen Tsai, Yau-Ren Yang, Yi-Wen Chung
  • Publication number: 20200155715
    Abstract: Provided is a radioactive microsphere including glass having a structure represented by a formula Ca3Si2O7 and yttrium oxide contained in the glass. The radioactive microsphere has sphericity of from 0.71 to 1, and is radioactive after being activated by neutron irradiation. A method for preparing a radioactive microsphere and a radioactive filler composition is further provided. The present disclosure can be used to treat tumor by delivering radioactive microspheres to the target tissue, and then radioactive microspheres are activated by neutrons to generate radiation. The radioactivity of microspheres disappears over time, and the microspheres were dissolved and absorbed by the bone tissue in the end.
    Type: Application
    Filed: November 18, 2019
    Publication date: May 21, 2020
    Inventors: Yu-Yu Tsai, Fu-Yu Chang, Chien-Liang Liu
  • Patent number: 10658482
    Abstract: A semiconductor device and method for forming the semiconductor device are provided. In some embodiments, a semiconductor substrate comprises a device region. An isolation structure extends laterally in a closed path to demarcate the device region. A first source/drain region and a second source/drain region are in the device region and laterally spaced. A sidewall of the first source/drain region directly contacts the isolation structure at a first isolation structure sidewall, and remaining sidewalls of the first source/drain region are spaced from the isolation structure. A selectively-conductive channel is in the device region, and extends laterally from the first source/drain region to the second source/drain region. A plate comprises a central portion and a first peripheral portion. The central portion overlies the selectively-conductive channel, and the first peripheral portion protrudes from the central portion towards the first isolation structure sidewall.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: May 19, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Chang Cheng, Fu-Yu Chu, Ming-Ta Lei, Ruey-Hsin Liu, Shih-Fen Huang
  • Publication number: 20200105901
    Abstract: A method of making a triple well isolated diode includes forming a buried layer in a substrate. The method further includes forming an epi-layer over the substrate and the buried layer. The method further includes forming a first well in the epi-layer, wherein the first well forms an interface with the buried layer. The method further includes forming a second well in the epi-layer surrounding the first well. The method further includes forming a third well in the epi-layer surrounding the second well. The method further includes forming a deep well in the epi-layer beneath the first well to electrically connect to the second well. The method further includes forming a first plurality of isolation features between the first well and the second well. The method further includes forming a second plurality of isolation features between the third well and the epi-layer.
    Type: Application
    Filed: December 2, 2019
    Publication date: April 2, 2020
    Inventors: Chih-Chang CHENG, Fu-Yu CHU, Ruey-Hsin LIU
  • Publication number: 20200081863
    Abstract: An electronic device and a usage method thereof are provided. The electronic device includes a first device, a second device and a control device. The first device includes a first processor and a first control module, and the first control module is electrically connected to the first processor. The second device is detachably disposed on the first device. The second device includes a second processor and a second control module, and the second control module is electrically connected to the second processor. The control device is detachably connected to the second device, and the first device, the second device and the control device are coupled to each other.
    Type: Application
    Filed: July 29, 2019
    Publication date: March 12, 2020
    Inventors: Tzu-Jen Mao, Kuan-Pei Lee, Fu-Yu Cai, Chieh Mii, Ya-Yun Huang, Ming-Chih Huang, Tong-Shen Hsiung, Shang-Chih Liang
  • Patent number: 10558779
    Abstract: A method of redistribution layer routing for 2.5D integrated circuit packages is proposed, which is executed by a computer, the method comprising using the computer to perform the following: performing a MMSIM (modulus-based matrix splitting iteration method) based routing to assign pre-assignment nets to tracks such that total vertical distance from each bump pair to the assigned track is minimized; and performing a MWMCBM (minimum weighted maximum cardinality bipartite matching) based routing for bumps connected to the assigned tracks according to matching result to complete redistribution layer routing for integrated circuit packages.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: February 11, 2020
    Assignee: AnaGlobe Technology, Inc.
    Inventors: Chun-Han Chiang, Fu-Yu Chuang, Yao-Wen Chang, Chih-Che Lin, Chun-Yi Yang
  • Publication number: 20200037401
    Abstract: A planar heating structure is disclosed. The planar heating structure includes a glass substrate layer, a nanometallic transparent conductive layer, and a first passivation layer. The nanometallic transparent conductive layer is disposed on the glass substrate layer and receives a voltage to generate heat energy. The first passivation layer is disposed on the nanometallic transparent conductive layer and completely covers the nanometallic transparent conductive layer.
    Type: Application
    Filed: September 24, 2019
    Publication date: January 30, 2020
    Inventors: Ho-Hsun Chi, Ying-Che Chen, Yu Zhang, Hebo Yang, Fu-Yu Su, Chao Gao, Shu-Guang Zhu, Chun-Ya Tang, Wen-Da Chen
  • Publication number: 20200029362
    Abstract: An asymmetric handshaking design between an access point (AP) and a station (STA) is introduced. An access point is controlled to transmit packets in a first packet format. In response to packets transmitted from the access point in the first packet format, a station is switched to use a second packet format to transmit packets to form asymmetric handshaking with the access point when the station fails to use the first packet format to answer the access point.
    Type: Application
    Filed: July 19, 2019
    Publication date: January 23, 2020
    Inventors: Tsung-Hsuan WU, Chao-Chun WANG, Yongho SEOK, Fu-Yu TSAI
  • Publication number: 20200023088
    Abstract: Provided is a radioactive microsphere including a glass sphere core. The glass sphere core includes a first seed, a second seed and a diffusion region extending inwardly from an outer surface of the glass sphere core, with the second seed distributed in the diffusion region. The first seed and the second seed become radioactive after being activated by neutrons to produce radiations including ?-rays or ?-rays, or simultaneously ?-rays and ?-rays. A preparation method of a radioactive microsphere is also provided.
    Type: Application
    Filed: February 20, 2019
    Publication date: January 23, 2020
    Inventors: Yu-Yu Tsai, Fu-Yu Chang, Chien-Liang Liu
  • Patent number: 10511831
    Abstract: The disclosure provides a 3D image display device. The 3D image display device includes a display module having multiple sub-pixels, a driving module, and an optical module disposed opposite to the display module. The driving module is electrically connected to the sub-pixels. The optical module provides a normal view zone and a reverse view zone. A plurality of view images are arranged in the normal view zone and the reverse view zone. The view images in the normal view zone are arranged in a forward order, the view images in the reverse view zone are arranged in a reverse order, and the width of the normal view zone is greater than the width of the reverse view zone.
    Type: Grant
    Filed: January 4, 2017
    Date of Patent: December 17, 2019
    Assignee: INNOLUX CORPORATION
    Inventors: Naoki Sumi, Pei-Hsuan Chiang, Chiao-Fu Yu, Wai-Lon Chan
  • Patent number: D871392
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: December 31, 2019
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Zuo-Wen Wang, Tong-Shen Hsiung, Ming-Chih Huang, Meng-Chu Huang, Sin-Fei Lai, Fu-Yu Tsai, Szu-Tang Chiu, Chih-Kuang Lin, Chen-Chun Shiang, Wai Tong Chan