Patents by Inventor Fu-An Yu

Fu-An Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • User device, base device and system utilizing audio signal to transmit data, and method thereof
    Patent number: 10212567
    Abstract: A method of utilizing an audio signal to transmit data for conducting electronic transactions includes in a user device, converting user identification data into a first audio signal and transmitting the first audio signal to a base device; in the base device, converting the first audio signal into the user identification data; in the base device, transmitting the user identification data and transaction content to a server device; and in the server device, obtaining authorization of a validation entity by utilizing the user identification data and the transaction content, for obtaining a transaction number and transmitting the transaction number to the base device.
    Type: Grant
    Filed: October 30, 2012
    Date of Patent: February 19, 2019
    Assignee: Eason Tech. Co., Ltd.
    Inventors: Fu-Yu Huang, Min-Chun Lin, Feng-Hui Kuan
  • Semiconductor structure having field plate and associated fabricating method
    Patent number: 10205024
    Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a substrate; a gate structure formed over the substrate; a source region and a drain region formed in the substrate on either side of the gate structure, the source region and the drain region both having a first type of conductivity; and a field plate formed over the substrate between the gate structure and the drain region; wherein the field plate is coupled to the source region or a bulk electrode of the substrate. An associated method for fabricating the semiconductor structure is also disclosed.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: February 12, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chih-Chang Cheng, Fu-Yu Chu, Ruey-Hsin Liu, Kuang-Hsin Chen, Chih-Hsin Ko, Shih-Fen Huang
  • Touch control device
    Patent number: 10198131
    Abstract: A touch control device includes a cover lens, a groove, a fingerprint, and a touch sensing structure. The cover lens has a first surface and a second surface opposite to the first surface, in which the first surface is a touch surface. The groove is disposed on the second surface and has a top surface and a side surface adjacent to the top surface, in which an angle between the top surface and the side surface is greater than 90°. The fingerprint recognition structure is at least partially disposed on the top surface of the groove. The touch sensing structure is disposed on the second surface.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: February 5, 2019
    Assignee: TPK Touch Solutions (Xiamen) Inc.
    Inventors: Hebo Yang, Yuh-Wen Lee, Yu Zhang, Fu-Yu Su, Liangzhen Xu
  • Power MOSFETs and methods for forming the same
    Patent number: 10038090
    Abstract: Power Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) and methods of forming the same are provided. A power MOSFET may comprise a first drift region formed at a side of a gate electrode, and a second drift region beneath the gate electrode, adjacent to the first drift region, with a depth less than a depth of the first drift region so that the first drift region and the second drift region together form a stepwise shape. A sum of a depth of the second drift region, a depth of the gate dielectric, and a depth of the gate electrode may be of substantially a same value as a depth of the first drift region. The first drift region and the second drift region may be formed at the same time, using the gate electrode as a part of the implanting mask.
    Type: Grant
    Filed: March 14, 2017
    Date of Patent: July 31, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Fu-Yu Chu, Chih-Chang Cheng, Tung-Yang Lin, Ruey-Hsin Liu
  • SEMICONDUCTOR DEVICE HAVING MULTIPLE WELLS
    Publication number: 20180204924
    Abstract: A semiconductor device includes a substrate and a gate structure over a top surface of the substrate. The semiconductor device further includes a source in the substrate on a first side of the gate structure. The semiconductor device further includes a drain in the substrate on a second side of the gate structure. The semiconductor device further includes a first well having a first dopant type, wherein the first well surrounds the source. The semiconductor device further includes a second well having a second dopant type opposite the first dopant type, wherein the second well surrounds the drain, an entirety of an upper most surface of the second well between the drain and the first well is coplanar with the top surface of the substrate, and the second well is spaced from the first well.
    Type: Application
    Filed: March 12, 2018
    Publication date: July 19, 2018
    Inventors: Chih-Chang CHENG, Fu-Yu CHU, Ruey-Hsin LIU
  • DISPLAY DEVICE AND METHOD FOR DISPLAYING
    Publication number: 20180192037
    Abstract: The disclosure provides a 3D image display device. The 3D image display device includes a display module having multiple sub-pixels, a driving module, and an optical module disposed opposite to the display module. The driving module is electrically connected to the sub-pixels. The optical module provides a normal view zone and a reverse view zone. A plurality of view images are arranged in the normal view zone and the reverse view zone. The view images in the normal view zone are arranged in a forward order, the view images in the reverse view zone are arranged in a reverse order, and the width of the normal view zone is greater than the width of the reverse view zone.
    Type: Application
    Filed: January 4, 2017
    Publication date: July 5, 2018
    Inventors: Naoki Sumi, Pei-Hsuan Chiang, Chiao-Fu Yu, Wai-Lon Chan
  • Container
    Publication number: 20180079546
    Abstract: A container has a body, two handles, a handle combination structure, and two lids. The body has a body space formed in the body. The handles are connected with the body, and each handle has two connecting portions and two bent grooves. The connecting portions are formed between the handle and the body and are bendable. The bent grooves are defined in the handle and are adjacent respectively to the connecting portions of the handle. The handle combination structure is formed on the handles to selectively combine the two handles with each other. The lids are connected with the body and are respectively located in spaces which are respectively formed between the body and the handles. Each lid has a connecting portion formed between the body and the lid and being bendable.
    Type: Application
    Filed: June 7, 2017
    Publication date: March 22, 2018
    Inventor: Fu-Yu Hsieh
  • Metal oxide semiconductor field effect transistor having variable thickness gate dielectric
    Patent number: 9917168
    Abstract: A metal-oxide-semiconductor field effect transistor (MOSFET) includes a substrate and a gate structure over a top surface of the substrate. The MOSFET further includes a source in the substrate on a first side of the gate structure and a drain in the substrate on a second side of the gate structure opposite the first side. The gate structure includes a variable thickness gate dielectric layer. The variable thickness gate dielectric layer includes a first portion closest to the drain, the first portion having a first thickness. The variable thickness gate dielectric layer further includes a second portion distal from the drain, the second portion having a second thickness less than the first thickness.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: March 13, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Chang Cheng, Fu-Yu Chu, Ruey-Hsin Liu
  • JFET structure and manufacturing method of the same
    Patent number: 9917212
    Abstract: The present disclosure provides a transistor structure, including a self-aligned source-drain structure surrounded by an insulating structure and a gate of a second conductive type separated from the source and the drain by the insulating structure. The self-aligned source-drain structure includes a source and a drain of a first conductive type, a channel between the source and the drain, and a polysilicon contact over and aligned with the channel. A method for manufacturing the transistor structure is also provided in the present disclosure.
    Type: Grant
    Filed: September 6, 2016
    Date of Patent: March 13, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Fu-Yu Chu, Chih-Chang Cheng, Ruey-Hsin Liu
  • JFET STRUCTURE AND MANUFACTURING METHOD OF THE SAME
    Publication number: 20180069134
    Abstract: The present disclosure provides a transistor structure, including a self-aligned source-drain structure surrounded by an insulating structure and a gate of a second conductive type separated from the source and the drain by the insulating structure. The self-aligned source-drain structure includes a source and a drain of a first conductive type, a channel between the source and the drain, and a polysilicon contact over and aligned with the channel. A method for manufacturing the transistor structure is also provided in the present disclosure.
    Type: Application
    Filed: September 6, 2016
    Publication date: March 8, 2018
    Inventors: FU-YU CHU, CHIH-CHANG CHENG, RUEY-HSIN LIU
  • Method for manufacturing transistor with SiCN/SiOCN multilayer spacer
    Patent number: 9882022
    Abstract: A semiconductor device and a method for manufacturing the same are provided in the present invention. The semiconductor device includes a substrate, a gate structure on the substrate and two spacers on both sidewalls of the gate structure. Each spacer comprises an inner first spacer portion made of SiCN and an outer second spacer portion made of SiOCN.
    Type: Grant
    Filed: May 10, 2017
    Date of Patent: January 30, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Ming Kuo, Po-Jen Chuang, Fu-Jung Chuang, Tsai-Yu Wen, Tsuo-Wen Lu, Yu-Ren Wang, Fu-Yu Tsai
  • Touch display device
    Patent number: 9857895
    Abstract: A touch display device includes a transparent substrate, a first ink layer, a shading layer, and a decorative layer. The transparent substrate has a visible region and an non-visible region. The non-visible region is located at the peripheral of the visible region. The first ink layer is disposed on the non-visible region of the transparent substrate. The shading layer is disposed on the first ink layer. The decorative layer is disposed on a portion of the first ink layer and located between the first ink layer and the shading layer. The optical density of the first ink layer is between 0.3 and 0.67.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: January 2, 2018
    Inventors: Fu-Yu Su, I-Chung Hsu, Liqiang Huang
  • Tire pressure monitoring device and carrier module thereof
    Patent number: 9827814
    Abstract: A carrier module of a tire pressure monitoring device includes a plastic carrier and a metallic tube. The plastic carrier has a trough and a tube extended from a bottom portion of the trough. The trough has an airflow channel penetratingly formed on the bottom portion thereof, and the trough is in air communication with the tube by the airflow channel The metallic tube is seamlessly formed on an inner surface of the tube of the plastic carrier. The metallic tube has an inner screw thread formed on an inner surface thereof for detachably screwing to a nozzle of a tire. Thus, by seamlessly forming the metallic tube on the inner surface of the tube of the plastic carrier, the tire pressure monitoring device of the instant disclosure has a better airproof effect and a longer service life.
    Type: Grant
    Filed: April 18, 2016
    Date of Patent: November 28, 2017
    Assignee: ICHIA TECHNOLOGIES, INC.
    Inventors: Chih-Hao Hsu, Chung-Hsin Yang, Chih-Pin Lin, Shih-Fu Yu, Wei-Tsen Yen
  • SEATPOST WITH CONNECTING MOUNT AND CONNECTING MOUNT FOR THE SAME
    Publication number: 20170334498
    Abstract: A seatpost has a post body, an adjusting mount, a connecting unit, and a connecting bracket. The post body has a supporting base disposed at an upper end of the post body. The supporting base has a bore formed through a rear end of the supporting base. The adjusting mount is connected to the supporting base and has a passing hole disposed at a rear end of the adjusting mount. The connecting unit is connected to the adjusting mount and has a connecting portion having a threaded hole. A bolt passes through the bore, the passing hole, and is screwed with the threaded hole. The connecting bracket has a front end connected to the connecting portion, a rear end opposite the front end, and an assembling board disposed at the rear end of the connecting bracket for assembling a taillight or a bicycle license plate.
    Type: Application
    Filed: April 26, 2017
    Publication date: November 23, 2017
    Inventors: An-Fu YU, Yu-Tzu CHANG
  • TIRE PRESSURE MONITORING DEVICE AND CARRIER MODULE THEREOF
    Publication number: 20170297386
    Abstract: A carrier module of a tire pressure monitoring device includes a plastic carrier and a metallic tube. The plastic carrier has a trough and a tube extended from a bottom portion of the trough. The trough has an airflow channel penetratingly formed on the bottom portion thereof, and the trough is in air communication with the tube by the airflow channel The metallic tube is seamlessly formed on an inner surface of the tube of the plastic carrier. The metallic tube has an inner screw thread formed on an inner surface thereof for detachably screwing to a nozzle of a tire. Thus, by seamlessly forming the metallic tube on the inner surface of the tube of the plastic carrier, the tire pressure monitoring device of the instant disclosure has a better airproof effect and a longer service life.
    Type: Application
    Filed: April 18, 2016
    Publication date: October 19, 2017
    Inventors: CHIH-HAO HSU, CHUNG-HSIN YANG, CHIH-PIN LIN, SHIH-FU YU, WEI-TSEN YEN
  • Electrical Components Having Metal Traces With Protected Sidewalls
    Publication number: 20170294499
    Abstract: A component such as a display may have a substrate and thin-film circuitry on the substrate. The thin-film circuitry may be used to form an array of pixels for a display or other circuit structures. Metal traces may be formed among dielectric layers in the thin-film circuitry. Metal traces may be provided with insulating protective sidewall structures. The protective sidewall structures may be formed by treating exposed edge surfaces of the metal traces. A metal trace may have multiple layers such as a core metal layer sandwiched between barrier metal layers. The core metal layer may be formed from a metal that is subject to corrosion. The protective sidewall structures may help prevent corrosion in the core metal layer. Surface treatments such as oxidation, nitridation, and other processes may be used in forming the protective sidewall structures.
    Type: Application
    Filed: September 16, 2016
    Publication date: October 12, 2017
    Inventors: Chang Ming Lu, Chia-Yu Chen, Chih Pang Chang, Ching-Sang Chuang, Hung-Che Ting, Jung Yen Huang, Sheng Hui Shen, Shih Chang Chang, Tsung-Hsiang Shih, Yu-Wen Liu, Yu Hung Chen, Kai-Chieh Wu, Lun Tsai, Takahide Ishii, Chung-Wang Lee, Hsing-Chuan Wang, Chin Wei Hsu, Fu-Yu Teng
  • Wafer cleaning
    Patent number: 9781994
    Abstract: One or more techniques or systems for cleaning wafers during semiconductor fabrication or an associated brush are provided herein. In some embodiments, the brush includes a brush body and one or more inner hole supports within the brush body. For example, a first inner hole support and a second inner hole support define a first inner hole associated with a first size. For another example, a third inner hole support and a fourth inner hole support define a second inner hole associated with a second size different than the first size. In some embodiments, a cleaning solution is applied to a wafer based on a first flow rate at a first brush position and based on a second flow rate at a second brush position. In this manner, a flow field associated with wafer cleaning is provided, thus enhancing cleaning efficiency, for example.
    Type: Grant
    Filed: December 7, 2012
    Date of Patent: October 10, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shang-Yuan Yu, Ming-Te Chen, Chi-Fu Yu, Shao-Yen Ku, Tzu-Yang Chung, Hsiao Chien-Wen, Shan-Ching Lin
  • METHOD FOR MANUFACTURING TRANSISTOR WITH SICN/SIOCN MULTILAYER SPACER
    Publication number: 20170243952
    Abstract: A semiconductor device and a method for manufacturing the same are provided in the present invention. The semiconductor device includes a substrate, agate structure on the substrate and two spacers on both sidewalls of the gate structure. Each spacer comprises an inner first spacer portion made of SiCN and an outer second spacer portion made of SiOCN.
    Type: Application
    Filed: May 10, 2017
    Publication date: August 24, 2017
    Inventors: Chia-Ming Kuo, Po-Jen Chuang, Fu-Jung Chuang, Tsai-Yu Wen, Tsuo-Wen Lu, Yu-Ren Wang, Fu-Yu Tsai
  • SEMICONDUCTOR STRUCTURE AND ASSOCIATED FABRICATING METHOD
    Publication number: 20170229570
    Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a substrate; a gate structure formed over the substrate; a source region and a drain region formed in the substrate on either side of the gate structure, the source region and the drain region both having a first type of conductivity; and a field plate formed over the substrate between the gate structure and the drain region; wherein the field plate is coupled to the source region or a bulk electrode of the substrate. An associated method for fabricating the semiconductor structure is also disclosed.
    Type: Application
    Filed: February 5, 2016
    Publication date: August 10, 2017
    Inventors: CHIH-CHANG CHENG, FU-YU CHU, RUEY-HSIN LIU, KUANG-HSIN CHEN, CHIH-HSIN KO, SHIH-FEN HUANG
  • Notebook computer
    Patent number: D832834
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: November 6, 2018
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Zuo-Wen Wang, Tong-Shen Hsiung, Ming-Chih Huang, Meng-Chu Huang, Sin-Fei Lai, Fu-Yu Tsai, Szu-Tang Chiu, Chih-Kuang Lin, Chen-Chun Shiang, Wai Tong Chan