Abstract: A method of forming a high electron mobility transistor (HEMT) includes forming a second III-V compound layer on a first III-V compound layer, forming a source feature and a drain feature on the second III-v compound layer, depositing a p-type layer on a portion of the second III-V compound layer between the source feature and the drain feature, and forming a gate electrode on the p-type layer. A carrier channel is located between the first III-V compound layer and the second III-V compound layer.

Abstract: Some embodiments of the present disclosure relate to a high electron mobility transistor (HEMT) which includes a heterojunction structure arranged over a semiconductor substrate. The heterojunction structure includes a binary III/V semiconductor layer made of a first III-nitride material to act as a channel region of the e-HEMT, and a ternary III/V semiconductor layer arranged over the binary III/V semiconductor layer and made of a second III-nitride material to act as a barrier layer. Source and drain regions are arranged over the ternary III/V semiconductor layer and are spaced apart laterally from one another. A gate structure is arranged over the heterojunction structure and is arranged between the source and drain regions. The gate structure is made of a third III-nitride material. A first passivation layer is disposed about sidewalls of the gate structure and is made of a fourth III-nitride material.

Abstract: An integrated circuit device includes a first III-V compound layer, a second III-V compound layer over the first III-V compound layer, a gate dielectric over the second III-V compound layer, and a gate electrode over the gate dielectric. An anode electrode and a cathode electrode are formed on opposite sides of the gate electrode. The anode electrode is electrically connected to the gate electrode. The anode electrode, the cathode electrode, and the gate electrode form portions of a rectifier.

Abstract: A method of forming a semiconductor structure includes growing a second III-V compound layer over a first III-V compound layer, wherein the second III-V compound layer has a different band gap from the first III-V compound layer. The method further includes forming a source feature and a drain feature over the second III-V compound layer. The method further includes forming a gate dielectric layer over the second III-V compound layer, the source feature and the drain feature. The method further includes implanting at least one fluorine-containing compound into a portion of the gate dielectric layer. The method further includes forming a gate electrode over the portion of the gate dielectric layer.

Abstract: A transistor includes a first layer over a substrate. The transistor also includes a second layer over the first layer. The transistor further includes a carrier channel layer at an interface of the first layer and the second layer. The transistor additionally includes a gate structure, a drain, and a source over the second layer. The transistor also includes a passivation material in the second layer between an edge of the gate structure and an edge of the drain in a top-side view. The carrier channel layer has a smaller surface area than the first layer between the edge of the gate structure and the edge of the drain in the top-side view.

Abstract: A method of forming a high electron mobility transistor (HEMT) that includes epitaxially growing a second III-V compound layer on a first III-V compound layer. A carrier channel is located between the first III-V compound layer and the second III-V compound layer. A source feature and a drain feature are formed on the second III-V compound layer. A p-type layer is deposited on a portion of the second III-V compound layer between the source feature and the drain feature. A gate electrode is formed on a portion of the p-type layer.

Abstract: In some embodiments, a semiconductor structure includes a first device and a second device. The first device has a first surface. The first device includes a first active region defined by a first material system. The second device has a second surface. The second surface is coplanar with the first surface. The second device includes a second active region defined by a second material system. The second material system is different from the first material system.

Abstract: A semiconductor device includes a first transistor and a clamping circuit. The first transistor is arranged to generate an output signal according to a control signal. The clamping circuit is arranged to generate the control signal according to an input signal, and to clamp the control signal to a predetermined signal level when the input signal exceeds the predetermined signal level.

Abstract: Some embodiments of the present disclosure relate to a high electron mobility transistor (HEMT) which includes a heterojunction structure arranged over a semiconductor substrate. The heterojunction structure includes a binary III/V semiconductor layer made of a first III-nitride material to act as a channel region of the e-HEMT, and a ternary III/V semiconductor layer arranged over the binary III/V semiconductor layer and made of a second III-nitride material to act as a barrier layer. Source and drain regions are arranged over the ternary III/V semiconductor layer and are spaced apart laterally from one another. A gate structure is arranged over the heterojunction structure and is arranged between the source and drain regions. The gate structure is made of a third III-nitride material. A first passivation layer is disposed about sidewalls of the gate structure and is made of a fourth III-nitride material.

Abstract: A high electron mobility transistor (HEMT) includes a silicon substrate, an unintentionally doped gallium nitride (UID GaN) layer over the silicon substrate. The HEMT further includes a donor-supply layer over the UID GaN layer, a gate structure, a drain, and a source over the donor-supply layer. The HEMT further includes a dielectric layer having one or more dielectric plug portions in the donor-supply layer and top portions between the gate structure and the drain over the donor-supply layer. A method for making the HEMT is also provided.

Abstract: A circuit structure includes a substrate, a III-V semiconductor compound over the substrate, a AlxGa(1-x)N (AlGaN) layer over the III-V semiconductor compound, a gate over the AlGaN layer, a passivation film over the gate and over a portion of the AlGaN layer, a source structure, and a drain structure on an opposite side of the gate from the source structure, wherein X ranges from 0.1 to 1. The source structure has a source contact portion and an overhead portion. The overhead portion is over at least a portion of the passivation film between the source contact portion and the gate. A distance between the source contact portion and the gate is less than a distance between the gate and the drain structure.

Abstract: A semiconductor structure includes a first device and a second device. The first device has a first surface. The first device includes a first active region defined by a first material system. The second device has a second surface. The second surface is coplanar with the first surface. The second device includes a second active region defined by a second material system. The second material system is different from the first material system.

Abstract: A semiconductor structure includes a first device and a second device. The first device has a first surface. The first device includes a first active region defined by a first material system. The second device has a second surface. The second surface is coplanar with the first surface. The second device includes a second active region defined by a second material system. The second material system is different from the first material system.

Abstract: A high electron mobility transistor (HEMT) includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A salicide source feature and a salicide drain feature are in contact with the first III-V compound layer through the second III-V compound layer. A gate electrode is disposed over a portion of the second III-V compound layer between the salicide source feature and the salicide drain feature.

Abstract: A silicon substrate having a III-V compound layer disposed thereon is provided. A diode is formed in the silicon substrate through an ion implantation process. The diode is formed proximate to an interface between the silicon substrate and the III-V compound layer. An opening is etched through the III-V compound layer to expose the diode. The opening is filled with a conductive material. Thereby, a via is formed that is coupled to the diode. A High Electron Mobility Transistor (HEMT) device is formed at least partially in the III-V compound layer.

Abstract: A method includes epitaxially growing a gallium nitride (GaN) layer over a silicon substrate. The method further includes epitaxially growing a donor-supply layer over the GaN layer. The method further includes forming a source and a drain on the donor-supply layer. The method further includes forming a gate structure between the source and the drain on the donor-supply layer. The method further includes plasma etching a portion of a drift region of the donor-supply layer to a depth of less than 60% of a donor-supply layer thickness. The method further includes depositing a dielectric layer over the donor-supply layer.

Abstract: A semiconductor structure comprises a first layer. The first layer comprises a first III-V semiconductor material. The semiconductor structure also comprises a second layer over the first layer. The second layer comprises a second III-V semiconductor material different from the first III-V semiconductor material. The semiconductor structure further comprises an insulating layer over the second layer. The insulating layer is patterned to expose a portion of the first layer. The exposed portion of the first layer comprises electrons of the second layer. The semiconductor structure additionally comprises an intermetallic compound over the exposed portion of the first layer.

Abstract: A circuit structure includes a substrate, a III-V semiconductor compound over the substrate, a AlxGa(1?X)N (AlGaN) layer over the III-V semiconductor compound, a gate over the AlGaN layer, a passivation film over the gate and over a portion of the AlGaN layer, a source structure, and a drain structure on an opposite side of the gate from the source structure, wherein X ranges from 0.1 to 1. The source structure has a source contact portion and an overhead portion. The overhead portion is over at least a portion of the passivation film between the source contact portion and the gate. A distance between the source contact portion and the gate is less than a distance between the gate and the drain structure.

Abstract: A method of forming a high electron mobility transistor (HEMT) includes forming a second III-V compound layer on a first III-V compound layer, forming a source feature and a drain feature on the second III-v compound layer, depositing a p-type layer on a portion of the second III-V compound layer between the source feature and the drain feature, and forming a gate electrode on the p-type layer. A carrier channel is located between the first III-V compound layer and the second III-V compound layer.

Abstract: A semiconductor structure includes a first III-V compound layer. A second III-V compound layer is over the first III-V compound layer and is different from the first III-V compound layer in composition. A carrier channel is located at an interface of the first III-V compound layer and the second III-V compound layer. Slanted field plates are in an opening in a dielectric layer over the second III-V compound layer; the gate electrode is disposed in the opening.