Patents by Inventor Fu Wu

Fu Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8173622
    Abstract: Antimicrobial compounds, such as silanol or alcohol, include a protecting or leaving group that can protect the compound from degradation during the process of preparing a medical device containing the compound or reduce the volatility of the compound relative to its counterpart without the leaving group. Nearly any hydrolysable leaving group may be employed. The leaving group may be an agent that may serve a therapeutic function in addition to protecting or retaining the antimicrobial agents.
    Type: Grant
    Filed: August 15, 2008
    Date of Patent: May 8, 2012
    Assignee: Medtronic, Inc.
    Inventors: Paul Hsien-Fu Wu, Catherine E. Taylor, Linnus Cheruiyot, Jianwei Li, Terese A. Bartlett, Matt Bergan
  • Publication number: 20120074837
    Abstract: An optical lens having a fluorescent layer is provided. The optical lens is adapted for being employed in an LED packaging structure. The optical lens includes a substrate, at least one lens body, a lens shade, and a packaging member. The substrate is positioned at a bottommost side of the packaging structure, and the lens shade is positioned at a topmost side of the packaging structure. The lens body is positioned over the substrate and beneath the lens shade. A plurality of light emitting units are disposed on the substrate. The packaging member is adapted for packaging the substrate and the lens shade. The lens body is secured by the packing member so as to be positioned over the light emitting units. The lens body includes a fluorescent layer buried inside the lens body, and the lens body is positioned apart from the light emitting units for a certain distance.
    Type: Application
    Filed: September 28, 2010
    Publication date: March 29, 2012
    Inventors: Jon-Fwu Hwu, Yung-Fu Wu, Kui-Chiang Liu
  • Publication number: 20120057343
    Abstract: An illuminating apparatus having a heat dissipation base and a multilayer array-type LED module is provided. The multilayer array-type LED module serves as a light source, and a heat dissipation element is provided. The multilayer array-type LED module is featured with a high luminescent efficiency and consumes less power, and the heat dissipation element is adapted for dissipating the heat generated by the multilayer array-type LED module by natural air convection. The combination of the multilayer array-type LED module and the heat dissipation element achieves a better performance of the illuminating apparatus, and can be conveniently further combined with other lamps, or even customized for satisfying different requirements and demands.
    Type: Application
    Filed: September 7, 2010
    Publication date: March 8, 2012
    Applicant: GEM WELTRONICS TWN CORPORATION
    Inventors: Jon-Fwu Hwu, Yung-Fu Wu, Kui-Chiang Liu
  • Publication number: 20120039729
    Abstract: A motor includes a base, a stator, a rotor, a circuit board and a heat-conducting insulator. The base includes a cooling plate. The stator is coupled to the base. The rotor is rotatably coupled to the base and aligned with the stator. The circuit board is received in the base and electrically connected to the stator. The heat-conducting insulator is disposed between the cooling plate and the circuit board, and abuts with the cooling plate and one face of the circuit board.
    Type: Application
    Filed: August 16, 2010
    Publication date: February 16, 2012
    Inventors: Alex Horng, Ming-Fu Wu, Ming-Sheng Wang, Kun-Li Hsieh, Cheng-Te Liu
  • Patent number: 8025377
    Abstract: An ink cartridge is provided with a body, a channel module attached to the body, a plurality of first engaging parts, and a plurality of second engaging parts. The first engaging parts are arranged on one of the body and the channel module, while the second engaging parts corresponding to the first engaging parts are arranged on the other of the body and the channel module. The relative position of the body and the channel module on a two-dimension plane is substantially fixed by the engagement of the first engaging parts and the second engaging parts.
    Type: Grant
    Filed: May 8, 2007
    Date of Patent: September 27, 2011
    Assignee: International United Technology Co., Ltd.
    Inventors: Chia-Fu Wu, Francis Chee-Shuen Lee, Shih-Chieh Yeh
  • Publication number: 20110227105
    Abstract: A multi-layer LED array engine is provided. The multi-layer LED array engine includes a base plate frame, a molded platform, two lead frames, a lighting element, a dome, a protection layer, and a phosphorous layer. The molded platform is disposed on and secured to the base plate frame. The two lead frames are combined with two lead frame grooves of the base plate frame. The lighting element is disposed on a lighting area of the base plate frame. The protection layer is provided on the lighting element, and the phosphorous layer is provided on the protection layer. The dome is secured to the molded platform for covering the molded platform and the lighting element.
    Type: Application
    Filed: March 17, 2010
    Publication date: September 22, 2011
    Inventors: Jon-Fwu Hwu, Yung-Fu Wu
  • Patent number: 7999359
    Abstract: A semiconductor package with an electromagnetic shield is disclosed. The semiconductor package includes two substrates (102, 202; 103, 203) and an electromagnetic shield (101, 201). Each substrate has at least one die (108, 208; 112, 212) provided thereon. The electromagnetic shield is disposed between the two substrates for shielding electromagnetic interference between adjacent dies of the two substrates. One of the two substrates defines a cavity (109, 209) for partially accommodating the electromagnetic shield. Accordingly, the overall vertical height and the volume of the semiconductor package are not increased, and the heat dissipation efficiency of the semiconductor package is enhanced.
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: August 16, 2011
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventor: Chia-fu Wu
  • Patent number: 7978171
    Abstract: A control circuit of a driving circuit for controlling a light emitting diode (LED) light source having a plurality of areas is provided. The control circuit includes the error amplifiers receiving a feed back current signal and a external reference voltage, and generating an error signal; a buffer register receiving a serial digital signal and generating the parallel digital signals; a work register receiving the parallel digital signals and a trigger signal, and outputting the parallel digital signals when the trigger signal is at a relatively high level; and a switch module having the power switches, each of which receives the error signal and the parallel digital signal for generating a driving signal to control a driving current of a specific area of the light source, in order to control the brightness in each area of the LED light source.
    Type: Grant
    Filed: September 6, 2007
    Date of Patent: July 12, 2011
    Assignee: Analog Integrations Corporation
    Inventors: Tsai-Fu Wu, Chang-Yu Wu, Chin-Feng Kang, Che-Yi Su
  • Patent number: 7923271
    Abstract: A method of assembling a multi-layer LED array engine is provided. The method includes the steps of: preparing a base plate frame comprising at least one lighting area, and two lead frame grooves; positioning two lead frames inside accommodating spaces defined in the two lead frame grooves, respectively; executing an injection molding process to form a molded platform on the base plate frame; configuring a thin layer of nickel or chromium; arranging a plurality of LED dice in an array form on an upper surface of the base plate frame; electrically coupling the LED dice to the lead frames by bonded wires; forming a protection layer on the LED dice and the bonded wires; forming a phosphorous layer on the protection layer, wherein the phosphorous layer is formed within a range defined by the phosphorous wall; and forming a dome on the upper surface of the molded platform by executing an injection molding process.
    Type: Grant
    Filed: March 17, 2010
    Date of Patent: April 12, 2011
    Assignee: GEM Weltronics TWN Corporation
    Inventors: Jon-Fwu Hwu, Yung-Fu Wu
  • Patent number: 7855392
    Abstract: An optoelectronic semiconductor component includes a light-emitting chip for emitting light, and a reflective substrate. A plurality of linear indent structures is formed on the reflective substrate. The light-emitting chip is installed on the reflective substrate and located on a side of the plurality of linear indent structures. The plurality of linear indent structures is capable of reflecting the light emitted from the light-emitting chip.
    Type: Grant
    Filed: May 8, 2008
    Date of Patent: December 21, 2010
    Assignee: Lite-On Technology Corp.
    Inventors: Yung-Fu Wu, He-Feng Zhang
  • Publication number: 20100282289
    Abstract: A solar generator capable of power tracking and electric characteristic curve measurement and a method for realizing the same is disclosed. The solar generator of the present invention comprises at least one solar panel receiving solar energy, converting the solar energy into electric energy, and outputting the electric energy; an electric tracking-measuring circuit connected with the solar panel and the external load; and a processor connected with the electric tracking-measuring circuit, controlling the electric tracking-measuring circuit to receive the electric energy and output the electric energy to the external load at the highest power. When the illumination on the solar panel is greater than a preset value, the processor controls the electric tracking-measuring circuit to measure the I-V characteristic curve of the electric energy to determine the operation status of the solar panel.
    Type: Application
    Filed: May 7, 2009
    Publication date: November 11, 2010
    Inventors: Tsai-Fu Wu, Huai-Sheng Tsai, Kung-Yen Lee
  • Patent number: 7830449
    Abstract: A display processor integrated circuit includes a display processor portion and an on-chip programmable logic portion. The programmable logic portion can be configured to implement custom video and/or image enhancement functions. The display processor portion performs block-based motion detection. If no motion is detected for a given block of pixels, then interline gaps in the block are filled using temporal interpolation. If motion is detected, then interline gaps are filled using spatial interpolation. To maintain accuracy without unduly increasing computational complexity, a less complex high angle spatial interpolation method is employed where a low angle tilt condition is not detected. A more computationally intensive low angle spatial interpolation method can therefore be employed in low angle tilt conditions. Integrated circuit cost is reduced by employing pipelining to write parts of segment buffers at the same time that other parts are being read to perform the interpolation process.
    Type: Grant
    Filed: April 3, 2007
    Date of Patent: November 9, 2010
    Inventors: Qinggang Zhou, Clyde H. Nagakura, Sheng-Fu Wu, Andrew K. Chan
  • Patent number: 7828560
    Abstract: A card edge connector (100) includes an insulative housing (1) having a pair of side walls (10) with a central slot (11) formed therebetween, a set of terminals (5) including first terminals (51) and second terminals (52) and a spacer (3). Each side wall has a set of passageways (12). Each first terminal has a first contacting portion (511) protruding into the central slot, a first tail portion (513) mounted on a PCB, and a first connecting portion (512). The first connecting portions and the first tail portions are arranged in two rows. Each second terminal has a second contacting portion (521) protruding into the central slot, a second tail portion (523) mounted on the PCB, and a second connecting portion (522). The second connecting portions and the second tail portions are arranged in another two rows. The spacer (3) has a set of first protrusions (31) and forms a plurality of first grooves (32) located between each two adjacent first protrusions.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: November 9, 2010
    Assignee: Hon Hai Precision Ind. Co., Ltd.
    Inventors: Ren-Fu Wu, Wen-Jun Tang, Zhuang-Xing Li
  • Publication number: 20100279353
    Abstract: A fibrinolytic enzyme isolated from a culture broth of a mushroom has a characteristic of degrading a fibrin and a fibrinogen without activating an activity of a plasminogen. The plasminogen is activated to generate a plasmin to degrade the fibrin and/or fibrinogen, so that the fibrinolytic enzyme be used for the thrombosis-related diseases to degrade the fibrin and fibrinogen of blood clots without activate the plasminogen, so as to avoid a hemorrhage due to the over activation the plasminogen to over generate the plasmin.
    Type: Application
    Filed: April 30, 2009
    Publication date: November 4, 2010
    Inventors: Shiu Nan Chen, Chung Lun Lu, Jung Fu Wu, Sherwin Chen
  • Patent number: 7736483
    Abstract: A method for electroplating low-resistance metal wire for resolving the problem to fabricate the metal wire on large-area substrate through the technology of photolithographing and etching in the prior art. Then the invention improves the RC-delay characteristic of circuit on large-area substrate and reduces the number of masks for processing of a structure of gate overlap lightly-doped drain (source) (GOLDD).
    Type: Grant
    Filed: January 19, 2007
    Date of Patent: June 15, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Chun-Yau Huang, Cheng-Chung Chen, Yong-Fu Wu, Cheng-Hung Tsai, Chwan-Gwo Chyau, Fang-Tsun Chu
  • Publication number: 20100146229
    Abstract: In exemplary embodiments, a skewed interleaving function for iterative code systems is described. The skewed interleaving function provides a skewed row and column memory partition and a layered structure for re-arranging data samples read from, for example, a first channel detector. An iterative decoder, such as an iterative decoder based on a low-density parity-check code (LDPC), might employ an element to de-skew the data from the interleaved memory partition before performing iterative decoding of the data, and then re-skew the information before passing decoded samples to the de-interleaver. The de-interleaver re-arranges the iterative decoded data samples in accordance with an inverse of the interleaver function before passing the decoded data samples to, for example, a second channel detector.
    Type: Application
    Filed: December 4, 2008
    Publication date: June 10, 2010
    Applicant: LSI Corporation
    Inventors: Shaohua Yang, Changyou Xu, Weijun Tan, Ching-Fu Wu, Yuan Xing Lee
  • Patent number: 7719094
    Abstract: A semiconductor package includes a lead frame, at least one chip, and an encapsulation. The lead frame has a plurality of leads, and each of the leads includes at least one first conductive part, at least one second conductive part, and at least one third conductive part. The first conductive part is not electrically connected to the second conductive part, and the second conductive part is electrically connected to the third conductive part. The chip is electrically connected to the first conductive part. The encapsulation encapsulates the chip and at least a portion of the lead frame, and forms a first surface and a second surface opposite to the first surface. The first conductive part and the third conductive part are exposed from the first surface, and the second conductive part is exposed from the second surface.
    Type: Grant
    Filed: September 3, 2008
    Date of Patent: May 18, 2010
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chia-Fu Wu, Cheng-Yin Lee
  • Patent number: 7717721
    Abstract: A card edge connector for connecting a daughter board to a mother board, includes an insulative housing defining a front mating face, a top portion, a bottom portion opposite to the top portion, and a central slot recessed from the mating face between the top portion and the bottom portion to receive the daughter board, a plurality of terminals retained in the insulative housing, and a spacer disposed under the insulative housing. The spacer having a preselected height and a mounting surface toward the mother board. The spacer and the bottom portion of the insulative housing are assembled by snap-fastening.
    Type: Grant
    Filed: May 27, 2009
    Date of Patent: May 18, 2010
    Assignee: Hon Hai Precision Ind. Co., Ltd.
    Inventors: Ren-Fu Wu, Wen-Jun Tang, Xue-Wu Bu
  • Publication number: 20100070837
    Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a variable iteration data processing system is disclosed that includes a first detector, a second detector, a decoder and a unified memory buffer. An input data set is received by the first detector that performs a data detection and provides a first detected data set. The decoder receives a derivative of the first detected data set and performs a decoding operation that yields a decoded data set. In some cases, the derivative of the first detected data set is an interleaved version of the first detected data set. The decoded data set is written to a unified memory buffer. The first decoded data set is retrievable from the unified memory buffer and a derivative thereof is provided to the second detector. In some cases, the derivative of the decoded is a de-interleaved version of the decoded data set.
    Type: Application
    Filed: November 13, 2008
    Publication date: March 18, 2010
    Inventors: Changyou Xu, Shaohua Yang, Hao Zhong, Nils Graef, Ching-Fu Wu
  • Publication number: 20100035473
    Abstract: A card edge connector (100) includes an insulative housing (1) having a pair of side walls (10) with a central slot (11) formed therebetween, a set of terminals (5) including first terminals (51) and second terminals (52) and a spacer (3). Each side wall has a set of passageways (12). Each first terminal has a first contacting portion (511) protruding into the central slot, a first tail portion (513) mounted on a PCB, and a first connecting portion (512). The first connecting portions and the first tail portions are arranged in two rows. Each second terminal has a second contacting portion (521) protruding into the central slot, a second tail portion (523) mounted on the PCB, and a second connecting portion (522). The second connecting portions and the second tail portions are arranged in another two rows. The spacer (3) has a set of first protrusions (31) and forms a plurality of first grooves (32) located between each two adjacent first protrusions.
    Type: Application
    Filed: August 5, 2009
    Publication date: February 11, 2010
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Ren-Fu Wu, Wen-Jun Tang, Zhuang-Xing Li