Patents by Inventor Fu-Yu Tsai

Fu-Yu Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190163026
    Abstract: A method of making a curved electrochromic film includes: disposing a UV curable adhesive layer between a first electrochromic member and a second electrochromic member to form an electrochromic film semi-product in flat form; arching the electrochromic film semi-product between the first and second bending members of a forming apparatus and by moving the first and second bending members toward each other; and curing the UV curable adhesive layer using a UV light source while the electrochromic film semi-product is arched. Forming apparatuses for forming a flat electrochromic film semi-product into a curved electrochromic film are also disclosed.
    Type: Application
    Filed: May 31, 2018
    Publication date: May 30, 2019
    Inventors: Fu-Yu Tsai, Keng-Ming Hu, Jui-Wen Tsai, Yau-Ren Yang, Yi-Wen Chung
  • Publication number: 20190140074
    Abstract: A manufacturing method of a semiconductor device includes the following steps. A first stacked structure and a second stacked structure are formed on a core region and an input/output (I/O) region of a semiconductor substrate respectively. The first stacked structure includes a first patterned oxide layer, a first patterned nitride layer, and a first dummy gate. The second stacked structure includes a second patterned oxide layer, a second patterned nitride layer, and a second dummy gate. The first dummy gate and the second dummy gate are removed for forming a first recess above the core region and a second recess above the I/O region. A first gate structure is formed in the first recess and a second gate structure is formed in the second recess. The first patterned nitride layer is removed before the step of forming the first gate structure in the first recess.
    Type: Application
    Filed: December 11, 2017
    Publication date: May 9, 2019
    Inventors: Hao-Hsuan Chang, Yao-Hsien Chung, Fu-Yu Tsai
  • Patent number: 10283618
    Abstract: A manufacturing method of a semiconductor device includes the following steps. A first stacked structure and a second stacked structure are formed on a core region and an input/output (I/O) region of a semiconductor substrate respectively. The first stacked structure includes a first patterned oxide layer, a first patterned nitride layer, and a first dummy gate. The second stacked structure includes a second patterned oxide layer, a second patterned nitride layer, and a second dummy gate. The first dummy gate and the second dummy gate are removed for forming a first recess above the core region and a second recess above the I/O region. A first gate structure is formed in the first recess and a second gate structure is formed in the second recess. The first patterned nitride layer is removed before the step of forming the first gate structure in the first recess.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: May 7, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hao-Hsuan Chang, Yao-Hsien Chung, Fu-Yu Tsai
  • Patent number: 9882022
    Abstract: A semiconductor device and a method for manufacturing the same are provided in the present invention. The semiconductor device includes a substrate, a gate structure on the substrate and two spacers on both sidewalls of the gate structure. Each spacer comprises an inner first spacer portion made of SiCN and an outer second spacer portion made of SiOCN.
    Type: Grant
    Filed: May 10, 2017
    Date of Patent: January 30, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Ming Kuo, Po-Jen Chuang, Fu-Jung Chuang, Tsai-Yu Wen, Tsuo-Wen Lu, Yu-Ren Wang, Fu-Yu Tsai
  • Publication number: 20170243952
    Abstract: A semiconductor device and a method for manufacturing the same are provided in the present invention. The semiconductor device includes a substrate, agate structure on the substrate and two spacers on both sidewalls of the gate structure. Each spacer comprises an inner first spacer portion made of SiCN and an outer second spacer portion made of SiOCN.
    Type: Application
    Filed: May 10, 2017
    Publication date: August 24, 2017
    Inventors: Chia-Ming Kuo, Po-Jen Chuang, Fu-Jung Chuang, Tsai-Yu Wen, Tsuo-Wen Lu, Yu-Ren Wang, Fu-Yu Tsai
  • Patent number: 9685533
    Abstract: A semiconductor device and a method for manufacturing the same are provided in the present invention. The semiconductor device includes a substrate, agate structure on the substrate and two spacers on both sidewalls of the gate structure. Each spacer comprises an inner first spacer portion made of SiCN and an outer second spacer portion made of SiOCN.
    Type: Grant
    Filed: February 21, 2016
    Date of Patent: June 20, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Ming Kuo, Po-Jen Chuang, Fu-Jung Chuang, Tsai-Yu Wen, Tsuo-Wen Lu, Yu-Ren Wang, Fu-Yu Tsai
  • Patent number: 9589846
    Abstract: A method for forming a semiconductor device is provided. First, a dielectric layer is provided on a substrate, wherein a first recess and a second recess are formed in the dielectric layer. After a mask layer is filled into the first recess and the second recess, the mask layer in the second recess is removed away, thereby forming a patterned mask layer. Subsequently, a nitride treatment is performed to remove unwanted residue of the mask layer in the second recess.
    Type: Grant
    Filed: January 25, 2016
    Date of Patent: March 7, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Fu-Yu Tsai, Wei-Hsin Liu, Han-Sheng Huang
  • Patent number: 9530696
    Abstract: A method of fabricating a semiconductor device is provided. A plurality of sacrificial gates and a plurality of sacrificial gate dielectric layers thereunder are formed on a substrate. An interlayer dielectric layer is filled between the sacrificial gates. A protective layer is formed on the interlayer dielectric layer. The sacrificial gates and the sacrificial gate dielectric layers are removed to form an opening, wherein the interlayer dielectric layer is protected by the protective layer from recessing. A stacked gate structure is formed in the opening, wherein the protective layer is removed.
    Type: Grant
    Filed: October 23, 2015
    Date of Patent: December 27, 2016
    Assignee: United Microelectronics Corp.
    Inventors: Wei-Hsin Liu, Fu-Yu Tsai, Bin-Siang Tsai, Wei-Lun Hsu, Shang-Yi Yang, Pi-Hsuan Lai
  • Publication number: 20160274434
    Abstract: A conductive assembly for changing a color of a lens is revealed herein to comprise first and second conductive devices separately disposed at an upper front and lower rear end faces of an electrochromic lens, and an electrical connection device connected with the first and second conductive devices. The first conductive device has a first indium tin oxide (ITO) conductive part on a surface of the electrochromic lens and a conductive part on the first ITO conductive part for connection to the electrical connection device. The second conductive device has a second indium tin oxide (ITO) conductive part on a surface of the electrochromic lens, an inner conductive part on the second ITO conductive part, an insulating part on the inner conductive part and an outer conductive part on the insulating part for connection to the inner conductive part and the electrical connection device.
    Type: Application
    Filed: March 17, 2015
    Publication date: September 22, 2016
    Inventors: FU-YU TSAI, YI-WEN CHUNG
  • Patent number: 7687594
    Abstract: A random amorphous copolyester is synthesized by using diacid monomers and diol monomers. The random amorphous copolyester has a structure of the formula (I): wherein R1, R2 is an aromatic or aliphatic monomer, A is 0-0.8, B is 0-0.8, C is 0-1, D is 0-1, E is 0-0.8, F is 0-0.8, C+D<0.2 and A+B+E+F<0.8. The diacid monomer comprises TPA and an aromatic or aliphatic diacid monomer, the diol monomer comprises EG, 1,3 and 1,4-CHDM, and an aromatic or aliphatic diol monomer.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: March 30, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Chi-Yuan Hung, Cheng-Hsing Fan, Yuhsin Tsai, Fu-Yu Tsai
  • Publication number: 20090137768
    Abstract: A random amorphous copolyester is provided. The copolyester of the invention is synthesized by using diacid monomers and diol monomers. The random amorphous copolyester has a structure of the formula (I): wherein R1, R2 is an aromatic or aliphatic monomer, and wherein A, B, C, D, E and F are numbers of repeating units, A is 0-0.8, B is 0-0.8, C is 0-1, D is 0-1, E is 0-0.8, F is 0-0.8, C+D>0.2 and A+B+E+F<0.8. The diacid monomer comprises TPA and an aromatic or aliphatic diacid monomer, the diol monomer comprises EG, 1,3 and 1,4-CHDM, and an aromatic or aliphatic diol monomer.
    Type: Application
    Filed: June 24, 2008
    Publication date: May 28, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chi-Yuan Hung, Cheng-Hsing Fan, Yuhsin Tsai, Fu-Yu Tsai
  • Publication number: 20090036563
    Abstract: A shape-memory polymer foam is disclosed, which is formed by kneading a shape-memory copolyester with a polymeric material having a relatively lower crystallinity in a weight ratio of 15:85 to 85:15 and then conducting a foaming process. The shape-memory copolyester is a random copolymer formed from a dicarboxylic acid mixture and a diol in excess through esterfication and polycondensation. The dicarboxylic acid mixture includes 30-99 mol % of an aromatic dicarboxylic acid and 70-1 mol % of a straight aliphatic dicarboxylic acid of C4-C10. The diol includes a straight aliphatic diol of C2-C10.
    Type: Application
    Filed: September 29, 2007
    Publication date: February 5, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chia-Hon Tai, Hong-Fan Lin, Fu-Yu Tsai, Yu-Hsin Tsai
  • Patent number: 7024072
    Abstract: A fiber-optic tunable filter and an intensity modulator respectively includes: a fiber having a polished surface and an evanescent-field; and a photonic crystal having plural cavities and a filler filled therein and attached to the polished surface, wherein the plural cavities and the filler decide a photonic band-gap of the photonic crystal and the photonic band-gap is adjusted to reflect a light with a specific wavelength through the evanescent interaction with the photonic crystal material. Based on the fiber side-polishing technique, all kinds of fiber active and passive devices are able to be manufactured easily, especially for a high speed intensity modulator using an EO (Electro-Optic) polymer as the filler.
    Type: Grant
    Filed: April 16, 2004
    Date of Patent: April 4, 2006
    Assignee: National Chiao Tung University
    Inventors: Nan-Kuang Chen, Sien Chi, Shiao-Min Tseng, Fu-Yu Tsai
  • Publication number: 20040208449
    Abstract: A fiber-optic tunable filter and an intensity modulator respectively includes: a fiber having a polished surface and an evanescent-field; and a photonic crystal having plural cavities and a filler filled therein and attached to the polished surface, wherein the plural cavities and the filler decide a photonic band-gap of the photonic crystal and the photonic band-gap is adjusted to reflect a light with a specific wavelength through the evanescent interaction with the photonic crystal material. Based on the fiber side-polishing technique, all kinds of fiber active and passive devices are able to be manufactured easily, especially for a high speed intensity modulator using an EO (Electro-Optic) polymer as the filler.
    Type: Application
    Filed: April 16, 2004
    Publication date: October 21, 2004
    Applicant: National Chiao Tung University
    Inventors: Nan-Kuang Chen, Sien Chi, Shiao-Min Tseng, Fu-Yu Tsai
  • Patent number: D832834
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: November 6, 2018
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Zuo-Wen Wang, Tong-Shen Hsiung, Ming-Chih Huang, Meng-Chu Huang, Sin-Fei Lai, Fu-Yu Tsai, Szu-Tang Chiu, Chih-Kuang Lin, Chen-Chun Shiang, Wai Tong Chan