Patents by Inventor Fu-Yu Tsai

Fu-Yu Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210225932
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate; forming a first top electrode on the first MTJ and a second top electrode on the second MTJ; forming a first ultra low-k (ULK) dielectric layer on the first MTJ and the second MTJ; forming a passivation layer on the first ULK dielectric layer, wherein a bottom surface of the passivation layer between the first MTJ and the second MTJ is lower than a top surface of the first MTJ; and forming a second ULK dielectric layer on the passivation layer.
    Type: Application
    Filed: April 6, 2021
    Publication date: July 22, 2021
    Inventors: Kun-Ju Li, Tai-Cheng Hou, Hsin-Jung Liu, Fu-Yu Tsai, Bin-Siang Tsai, Chau-Chung Hou, Yu-Lung Shih, Ang Chan, Chih-Yueh Li, Chun-Tsen Lu
  • Publication number: 20210151666
    Abstract: A semiconductor device includes a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, a passivation layer on the first MTJ and the second MTJ, and an ultra low-k (ULK) dielectric layer on the passivation layer. Preferably, a top surface of the passivation layer between the first MTJ and the second MTJ is lower than a top surface of the passivation layer directly on top of the first MTJ.
    Type: Application
    Filed: January 4, 2021
    Publication date: May 20, 2021
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Patent number: 11004897
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate; forming a first top electrode on the first MTJ and a second top electrode on the second MTJ; forming a first ultra low-k (ULK) dielectric layer on the first MTJ and the second MTJ; forming a passivation layer on the first ULK dielectric layer, wherein a bottom surface of the passivation layer between the first MTJ and the second MTJ is lower than a top surface of the first MTJ; and forming a second ULK dielectric layer on the passivation layer.
    Type: Grant
    Filed: August 4, 2019
    Date of Patent: May 11, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kun-Ju Li, Tai-Cheng Hou, Hsin-Jung Liu, Fu-Yu Tsai, Bin-Siang Tsai, Chau-Chung Hou, Yu-Lung Shih, Ang Chan, Chih-Yueh Li, Chun-Tsen Lu
  • Publication number: 20210119115
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first ultra low-k (ULK) dielectric layer on the first MTJ; performing a first etching process to remove part of the first ULK dielectric layer and forming a damaged layer on the first ULK dielectric layer; and forming a second ULK dielectric layer on the damaged layer.
    Type: Application
    Filed: December 27, 2020
    Publication date: April 22, 2021
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Patent number: 10916694
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first ultra low-k (ULK) dielectric layer on the first MTJ; performing a first etching process to remove part of the first ULK dielectric layer and forming a damaged layer on the first ULK dielectric layer; and forming a second ULK dielectric layer on the damaged layer.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: February 9, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Publication number: 20210005662
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate; forming a first top electrode on the first MTJ and a second top electrode on the second MTJ; forming a first ultra low-k (ULK) dielectric layer on the first MTJ and the second MTJ; forming a passivation layer on the first ULK dielectric layer, wherein a bottom surface of the passivation layer between the first MTJ and the second MTJ is lower than a top surface of the first MTJ; and forming a second ULK dielectric layer on the passivation layer.
    Type: Application
    Filed: August 4, 2019
    Publication date: January 7, 2021
    Inventors: Kun-Ju Li, Tai-Cheng Hou, Hsin-Jung Liu, Fu-Yu Tsai, Bin-Siang Tsai, Chau-Chung Hou, Yu-Lung Shih, Ang Chan, Chih-Yueh Li, Chun-Tsen Lu
  • Publication number: 20200220674
    Abstract: A wireless device performs spatial reuse in a wireless local area network. When receiving a packet, the wireless device measures a received signal quality from a first portion of the packet, and determines a required signal quality for correctly decoding a payload of the packet based on information in a packet header. The wireless device compares the received signal quality with the required signal quality. If the received signal quality is lower than the required signal quality, the wireless device transmits a signal that overlaps in time and in frequency with a second portion of the packet. Alternatively, a wireless device may identify a Basic Service Set Identification (BSSID) of a received packet. If the BSSID indicates that the packet is an inter-BSS packet, the wireless device transmits a signal overlapping in time and in frequency with the packet before reception of a frame check sequence (FCS) in the packet.
    Type: Application
    Filed: December 26, 2019
    Publication date: July 9, 2020
    Inventors: Ray-Kuo Lin, Tsungjung Lee, Fu-Yu Tsai, Wei-Chen Wang
  • Publication number: 20200212290
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first ultra low-k (ULK) dielectric layer on the first MTJ; performing a first etching process to remove part of the first ULK dielectric layer and forming a damaged layer on the first ULK dielectric layer; and forming a second ULK dielectric layer on the damaged layer.
    Type: Application
    Filed: January 23, 2019
    Publication date: July 2, 2020
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Patent number: 10663831
    Abstract: A method of making a curved electrochromic film includes: disposing a UV curable adhesive layer between a first electrochromic member and a second electrochromic member to form an electrochromic film semi-product in flat form; arching the electrochromic film semi-product between the first and second bending members of a forming apparatus and by moving the first and second bending members toward each other; and curing the UV curable adhesive layer using a UV light source while the electrochromic film semi-product is arched. Forming apparatuses for forming a flat electrochromic film semi-product into a curved electrochromic film are also disclosed.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: May 26, 2020
    Assignee: TINTABLE KIBING CO., LTD.
    Inventors: Fu-Yu Tsai, Keng-Ming Hu, Jui-Wen Tsai, Yau-Ren Yang, Yi-Wen Chung
  • Publication number: 20200029362
    Abstract: An asymmetric handshaking design between an access point (AP) and a station (STA) is introduced. An access point is controlled to transmit packets in a first packet format. In response to packets transmitted from the access point in the first packet format, a station is switched to use a second packet format to transmit packets to form asymmetric handshaking with the access point when the station fails to use the first packet format to answer the access point.
    Type: Application
    Filed: July 19, 2019
    Publication date: January 23, 2020
    Inventors: Tsung-Hsuan WU, Chao-Chun WANG, Yongho SEOK, Fu-Yu TSAI
  • Publication number: 20190163026
    Abstract: A method of making a curved electrochromic film includes: disposing a UV curable adhesive layer between a first electrochromic member and a second electrochromic member to form an electrochromic film semi-product in flat form; arching the electrochromic film semi-product between the first and second bending members of a forming apparatus and by moving the first and second bending members toward each other; and curing the UV curable adhesive layer using a UV light source while the electrochromic film semi-product is arched. Forming apparatuses for forming a flat electrochromic film semi-product into a curved electrochromic film are also disclosed.
    Type: Application
    Filed: May 31, 2018
    Publication date: May 30, 2019
    Inventors: Fu-Yu Tsai, Keng-Ming Hu, Jui-Wen Tsai, Yau-Ren Yang, Yi-Wen Chung
  • Publication number: 20190140074
    Abstract: A manufacturing method of a semiconductor device includes the following steps. A first stacked structure and a second stacked structure are formed on a core region and an input/output (I/O) region of a semiconductor substrate respectively. The first stacked structure includes a first patterned oxide layer, a first patterned nitride layer, and a first dummy gate. The second stacked structure includes a second patterned oxide layer, a second patterned nitride layer, and a second dummy gate. The first dummy gate and the second dummy gate are removed for forming a first recess above the core region and a second recess above the I/O region. A first gate structure is formed in the first recess and a second gate structure is formed in the second recess. The first patterned nitride layer is removed before the step of forming the first gate structure in the first recess.
    Type: Application
    Filed: December 11, 2017
    Publication date: May 9, 2019
    Inventors: Hao-Hsuan Chang, Yao-Hsien Chung, Fu-Yu Tsai
  • Patent number: 10283618
    Abstract: A manufacturing method of a semiconductor device includes the following steps. A first stacked structure and a second stacked structure are formed on a core region and an input/output (I/O) region of a semiconductor substrate respectively. The first stacked structure includes a first patterned oxide layer, a first patterned nitride layer, and a first dummy gate. The second stacked structure includes a second patterned oxide layer, a second patterned nitride layer, and a second dummy gate. The first dummy gate and the second dummy gate are removed for forming a first recess above the core region and a second recess above the I/O region. A first gate structure is formed in the first recess and a second gate structure is formed in the second recess. The first patterned nitride layer is removed before the step of forming the first gate structure in the first recess.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: May 7, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hao-Hsuan Chang, Yao-Hsien Chung, Fu-Yu Tsai
  • Patent number: 9882022
    Abstract: A semiconductor device and a method for manufacturing the same are provided in the present invention. The semiconductor device includes a substrate, a gate structure on the substrate and two spacers on both sidewalls of the gate structure. Each spacer comprises an inner first spacer portion made of SiCN and an outer second spacer portion made of SiOCN.
    Type: Grant
    Filed: May 10, 2017
    Date of Patent: January 30, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Ming Kuo, Po-Jen Chuang, Fu-Jung Chuang, Tsai-Yu Wen, Tsuo-Wen Lu, Yu-Ren Wang, Fu-Yu Tsai
  • Publication number: 20170243952
    Abstract: A semiconductor device and a method for manufacturing the same are provided in the present invention. The semiconductor device includes a substrate, agate structure on the substrate and two spacers on both sidewalls of the gate structure. Each spacer comprises an inner first spacer portion made of SiCN and an outer second spacer portion made of SiOCN.
    Type: Application
    Filed: May 10, 2017
    Publication date: August 24, 2017
    Inventors: Chia-Ming Kuo, Po-Jen Chuang, Fu-Jung Chuang, Tsai-Yu Wen, Tsuo-Wen Lu, Yu-Ren Wang, Fu-Yu Tsai
  • Patent number: 9685533
    Abstract: A semiconductor device and a method for manufacturing the same are provided in the present invention. The semiconductor device includes a substrate, agate structure on the substrate and two spacers on both sidewalls of the gate structure. Each spacer comprises an inner first spacer portion made of SiCN and an outer second spacer portion made of SiOCN.
    Type: Grant
    Filed: February 21, 2016
    Date of Patent: June 20, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Ming Kuo, Po-Jen Chuang, Fu-Jung Chuang, Tsai-Yu Wen, Tsuo-Wen Lu, Yu-Ren Wang, Fu-Yu Tsai
  • Patent number: 9589846
    Abstract: A method for forming a semiconductor device is provided. First, a dielectric layer is provided on a substrate, wherein a first recess and a second recess are formed in the dielectric layer. After a mask layer is filled into the first recess and the second recess, the mask layer in the second recess is removed away, thereby forming a patterned mask layer. Subsequently, a nitride treatment is performed to remove unwanted residue of the mask layer in the second recess.
    Type: Grant
    Filed: January 25, 2016
    Date of Patent: March 7, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Fu-Yu Tsai, Wei-Hsin Liu, Han-Sheng Huang
  • Patent number: 9530696
    Abstract: A method of fabricating a semiconductor device is provided. A plurality of sacrificial gates and a plurality of sacrificial gate dielectric layers thereunder are formed on a substrate. An interlayer dielectric layer is filled between the sacrificial gates. A protective layer is formed on the interlayer dielectric layer. The sacrificial gates and the sacrificial gate dielectric layers are removed to form an opening, wherein the interlayer dielectric layer is protected by the protective layer from recessing. A stacked gate structure is formed in the opening, wherein the protective layer is removed.
    Type: Grant
    Filed: October 23, 2015
    Date of Patent: December 27, 2016
    Assignee: United Microelectronics Corp.
    Inventors: Wei-Hsin Liu, Fu-Yu Tsai, Bin-Siang Tsai, Wei-Lun Hsu, Shang-Yi Yang, Pi-Hsuan Lai
  • Patent number: D832834
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: November 6, 2018
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Zuo-Wen Wang, Tong-Shen Hsiung, Ming-Chih Huang, Meng-Chu Huang, Sin-Fei Lai, Fu-Yu Tsai, Szu-Tang Chiu, Chih-Kuang Lin, Chen-Chun Shiang, Wai Tong Chan
  • Patent number: D871392
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: December 31, 2019
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Zuo-Wen Wang, Tong-Shen Hsiung, Ming-Chih Huang, Meng-Chu Huang, Sin-Fei Lai, Fu-Yu Tsai, Szu-Tang Chiu, Chih-Kuang Lin, Chen-Chun Shiang, Wai Tong Chan