Patents by Inventor Fu-Yuan Hsieh

Fu-Yuan Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240363698
    Abstract: A SiC shielded gate trench device having a first type gate trench and a second type gate trench is disclosed. The first type gate trench is above the second type gate trench and has a trench width wider than a trench width of the second type gate trench, wherein the first type gate trench is filled with a gate electrode and a shielded gate electrode, and a grounded P-shield region surrounding the second type gate trench is under the shielded gate electrode for gate oxide electric-field reduction. The device further comprises a current spreading region surrounding the gate electrode for on-resistance reduction.
    Type: Application
    Filed: April 25, 2023
    Publication date: October 31, 2024
    Applicant: Nami MOS CO., LTD.
    Inventors: FU-YUAN HSIEH, LIN XU
  • Publication number: 20240347607
    Abstract: A SGT MOSFET and a SGT super barrier rectifier having improved on-resistance and gate charge structures are disclosed in this invention by applying a short channel implant region for formation of a shorter channel length after body implantation and diffusion, and by introducing a super junction region below an oxide charge balance region for breakdown voltage enhancement. The present invention can further achieve a lower specific on-resistance by applying multiple stepped epitaxial layers or multiple stepped oxide structure.
    Type: Application
    Filed: April 17, 2023
    Publication date: October 17, 2024
    Applicant: Nami MOS CO., LTD.
    Inventors: FU-YUAN HSIEH, LIN XU
  • Publication number: 20240186265
    Abstract: A shielded gate trench (SGT) MOSFET structure with a hexagonal deep trench layout and multiple epitaxial layers for wafer warpage and on-resistance reductions is disclosed, wherein a gate electrode surrounds the deep trench in each unit cell as a closed cell. A source-body contact is disposed between the gate electrode and the deep trench. Moreover, the gate electrode is planar, or vertically formed in an upper portion of a gate trench in each unit cell.
    Type: Application
    Filed: December 2, 2022
    Publication date: June 6, 2024
    Applicant: Nami MOS CO., LTD.
    Inventor: FU-YUAN HSIEH
  • Publication number: 20240186385
    Abstract: A shielded gate trench (SGT) MOSFET with a square or rectangular pillar-shape deep trench and multiple epitaxial layers is disclosed, wherein at least one gate electrode surrounds the deep trench in each wait cell. The at least one gate electrode is planar, or vertically formed in an upper portion of a gate trench in each wait cell. Moreover, a body region is absent in an intersection area of two gate trenches adjacent to corners of the deep trench for breakdown voltage enhancement.
    Type: Application
    Filed: February 23, 2023
    Publication date: June 6, 2024
    Applicants: Nami MOS CO., LTD., Shenzhen Puolop Electronics Co., Ltd
    Inventors: FU-YUAN HSIEH, LIN XU
  • Publication number: 20240128369
    Abstract: Shielded gate trench MOSFETs with gate trenches separated from termination trenches are disclosed, wherein a first type body regions are formed in an active area and an first type electric field reducing regions formed adjacent to an intersection regions between a first termination trench and trench ends of gate trenches; The first type electric field reducing regions formed between the first type body regions and the first termination trench wherein the first type body regions are absent to enhance breakdown voltage. At least one second type body region of the second conductivity type with a floating voltage is formed within the first type field reducing regions, and is spaced apart from the first type body regions and the first termination trench for further increasing breakdown voltage.
    Type: Application
    Filed: October 12, 2022
    Publication date: April 18, 2024
    Applicant: Nami MOS CO., LTD.
    Inventor: FU-YUAN HSIEH
  • Publication number: 20240030280
    Abstract: The present invention introduces new shielded gate trench (SGT) superjunction (SJ) MOSFETs having a first type multiple stepped epitaxial (MSE) structure in oxide charge balance (OCB) region and a second type MSE structure in SJ region for improved specific on-resistance Rsp and gate-to-drain charge Qgd. The two-type MSE structures can increase the average doping concentration in drift regions of the SGT SJ MOSFETS, as a result, lower Rsp and higher avalanche capability could be achieved without degrading breakdown voltage.
    Type: Application
    Filed: July 19, 2022
    Publication date: January 25, 2024
    Applicant: Nami MOS CO., LTD.
    Inventor: FU-YUAN HSIEH
  • Publication number: 20230343867
    Abstract: Shielded gate trench MOSFETs with gate trenches separated from termination trenches are disclosed, wherein at least one termination trench surrounds outer periphery of gate trenches and does not surround the gate metal pad area. The shielded gate electrode inside each of the gate trenches is connected to a source metal through at least one shielded gate trench contact which is spaced apart from at least one gate metal runner with a distance larger than 100 um. A breakdown voltage enhancement region and an avalanche capability enhancement region in the device structures are also disclosed.
    Type: Application
    Filed: June 10, 2022
    Publication date: October 26, 2023
    Applicant: NAMI MOS CO., LTD.
    Inventor: FU-YUAN HSIEH
  • Publication number: 20230343866
    Abstract: Shielded gate trench MOSFETs with gate trenches separated from termination trenches are disclosed, wherein the termination trenches surrounds outer periphery of gate trenches and do not surround said gate metal pad area; Inner edges of a first termination trench of the termination trenches adjacent to trench ends of the gate trenches have a plurality of wave shape portions in regions between two adjacent trench ends of the gate trenches while outer edges have a straight shape to reduce drain-source leakage current. Each of gate trenches on which has at least one shielded gate trench contact connected to a shielded gate electrode, and the shielded gate trench contact is spaced apart from any of multiple gate metal runners with a distance larger than 100 um.
    Type: Application
    Filed: April 26, 2022
    Publication date: October 26, 2023
    Applicant: Nami MOS CO., LTD.
    Inventor: FU-YUAN HSIEH
  • Publication number: 20230327013
    Abstract: The present invention introduces a new shielded gate trench MOSFETs with improved specific on-resistance and avalanche capability structures including an active area and an edge termination area, wherein an epitaxial layer having special multiple stepped epitaxial (MSE) layers in an oxide charge balance (OCB) region, and an edge termination having multiple trench field plates, and electric field reducing regions disposed surrounding bottom of gate trenches with a doping concentration lower than said bottom epitaxial layer of the MSE layers. Moreover, in some preferred embodiment, a multiple stepped oxide structure in the OCB region, and an epitaxial layer in a buffer region below the OCB region with a doping concentration lower than the MSE layers is introduced to further reduce the specific on-resistance and enhance device ruggedness.
    Type: Application
    Filed: April 7, 2022
    Publication date: October 12, 2023
    Applicant: Nami MOS CO., LTD.
    Inventor: FU-YUAN HSIEH
  • Patent number: 11777000
    Abstract: An improved SiC trench MOSFET having first and second type gate trenches for formation of a gate electrode, and a grounded P-shield region under the gate electrode for gate oxide electric-field reduction is disclosed. The gate electrodes are disposed into the first type gate trench having a thick oxide layer on trench bottom. The grounded P-shield region surrounding the second type gate trench filled up with the thick oxide layer is connected with a source metal through a grounded P region. The device further comprises a current spreading region surrounding the first type gate trench for on-resistance reduction.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: October 3, 2023
    Assignee: NAMI MOS CO., LTD.
    Inventor: Fu-Yuan Hsieh
  • Publication number: 20230215920
    Abstract: The present invention introduces a new shielded gate trench SBR (Super Barrier Rectifier) wherein an epitaxial layer having special MSE (multiple stepped epitaxial) layers with different doping concentrations decreasing in a direction from a substrate to a top surface of the epitaxial layer, wherein each of the MSE layers has an uniform doping concentration as grown. Forward voltage Vf is significantly reduced with the special MSE layers. An integrated circuit comprising a SGT MOSFET and a SBR formed on a single chip obtains benefits of low on-resistance, low reverse recovery time and high avalanche capability from the special MSE layers.
    Type: Application
    Filed: January 3, 2022
    Publication date: July 6, 2023
    Inventor: FU-YUAN HSIEH
  • Patent number: 11600725
    Abstract: A semiconductor power device having shielded gate structure in an active area and trench field plate termination surrounding the active area is disclosed. A Zener diode connected between drain metal and source metal or gate metal for functioning as a SD or GD clamp diode. Trench field plate termination surrounding active area wherein only cell array located will not cause BV degradation when SD or GD poly clamped diode integrated.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: March 7, 2023
    Assignee: NAMI MOS CO., LTD.
    Inventor: Fu-Yuan Hsieh
  • Publication number: 20230010328
    Abstract: The present invention introduces a new shielded gate trench MOSFETs wherein epitaxial layer having special multiple stepped epitaxial (MSE) layers with different doping concentrations decreasing in a direction from substrate to body regions, wherein each of the MSE layers has uniform doping concentration as grown. Specific on-resistance is significantly reduced with the special MSE structure. Moreover, in sore preferred embodiment, an MSO (multiple stepped oxide) structure is applied to the shielded gate structure to further reduce the specific on-resistance and enhance device ruggedness.
    Type: Application
    Filed: July 6, 2021
    Publication date: January 12, 2023
    Applicant: Nami MOS CO., LTD.
    Inventor: Fu-Yuan HSIEH
  • Patent number: 11515303
    Abstract: A SGT MOSFET having ESD diode and a method of manufacturing the same are disclosed. The SGT trench MOSFET according to the present invention, has n+ doped shielded electrode in an N channel device and requires only two poly-silicon layers, making the device can be shrunk with reducing shielded gate width for Rds reduction without increasing switching loss and having dynamic switching instability.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: November 29, 2022
    Assignee: NAMI MOS CO., LTD.
    Inventor: Fu-Yuan Hsieh
  • Publication number: 20220367636
    Abstract: An improved SiC trench MOSFET having first and second type gate trenches for formation of a gate electrode, and a grounded P-shield region under the gate electrode for gate oxide electric-field reduction is disclosed. The gate electrodes are disposed into the first type gate trench having a thick oxide layer on trench bottom. The grounded P-shield region surrounding the second type gate trench filled up with the thick oxide layer is connected with a source metal through a grounded P region. The device further comprises a current spreading region surrounding the first type gate trench for on-resistance reduction.
    Type: Application
    Filed: May 17, 2021
    Publication date: November 17, 2022
    Applicant: Nami MOS CO., LTD.
    Inventor: Fu-Yuan HSIEH
  • Publication number: 20220367710
    Abstract: A SiC SJ trench MOSFET having first and second type gate trenches for formation of gate electrodes and super junction regions is disclosed. The gate electrodes are disposed into the first type gate trenches having a thick oxide layer on trench bottom. The super junction regions are formed surrounding the second type gate trenches filled up with the thick oxide layer. The device further comprises gate oxide electric field reducing regions adjoining lower surfaces of body regions and space apart from the gate trenches.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 17, 2022
    Applicant: Nami MOS CO., LTD.
    Inventor: Fu-Yuan HSIEH
  • Patent number: 11462638
    Abstract: A SiC SJ trench MOSFET having first and second type gate trenches for formation of gate electrodes and super junction regions is disclosed. The gate electrodes are disposed into the first type gate trenches having a thick oxide layer on trench bottom. The super junction regions are formed surrounding the second type gate trenches filled up with the thick oxide layer. The device further comprises gate oxide electric field reducing regions adjoining lower surfaces of body regions and space apart from the gate trenches.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: October 4, 2022
    Assignee: NAMI MOS CO., LTD.
    Inventor: Fu-Yuan Hsieh
  • Publication number: 20220293786
    Abstract: An improved SGT MOSFET having low on-resistance is disclosed in this invention by adding a current spreading region under body region and a method to manufacture the same. With a doping concentration higher than the drift region, the inventive current spreading region can help reducing on-resistance while remaining a target breakdown voltage. Meanwhile, the present invention also features a method of formation of a new MSO structure with LOCOS technique for further improving on-resistance.
    Type: Application
    Filed: March 10, 2021
    Publication date: September 15, 2022
    Applicant: Nami MOS CO., LTD.
    Inventor: Fu-Yuan HSIEH
  • Patent number: 11444164
    Abstract: A SGT MOSFET having two stepped oxide (TSO) structure in gate trench is disclosed, wherein the TSO has thinner oxide thickness along upper sidewalls of the gate trench than along lower sidewalls of the gate trench. The BV can be enhanced as result of the electric filed reduction near channel region, on-resistance is thus reduced. The present invention further comprises a super junction region below the oxide charge balance region, making vertical electrical field more uniform, the BV is further enhanced and on-resistance is further reduced.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: September 13, 2022
    Assignee: NAMI MOS CO., LTD.
    Inventor: Fu-Yuan Hsieh
  • Publication number: 20220231167
    Abstract: A semiconductor power device having shielded gate structure in an active area and trench field plate termination surrounding the active area is disclosed. A Zener diode connected between drain metal and source metal or gate metal for functioning as a SD or GD clamp diode. Trench field plate termination surrounding active area wherein only cell array located will not cause BV degradation when SD or GD poly clamped diode integrated.
    Type: Application
    Filed: April 8, 2022
    Publication date: July 21, 2022
    Applicant: NAMI MOS CO., LTD.
    Inventor: Fu-Yuan HSIEH