Patents by Inventor Fu-Yuan Hsieh

Fu-Yuan Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR POWER DEVICE INTEGRATED WITH CLAMP DIODES HAVING DOPANT OUT-DIFFUSION SUPPRESSION LAYERS
    Publication number: 20130234237
    Abstract: A semiconductor power device integrated with clamp diodes is disclosed by offering dopant out-diffusion suppression layers to enhance the ESD protection between gate and source, and avalanche capability between drain and source.
    Type: Application
    Filed: March 12, 2012
    Publication date: September 12, 2013
    Applicant: FORCE MOS TECHNOLOGY CO. LTD.
    Inventor: Fu-Yuan HSIEH
  • SEMICONDUCTOR POWER DEVICE INTEGRATED WITH ESD PROTECTION DIODES
    Publication number: 20130234238
    Abstract: A semiconductor power device integrated with ESD protection diode is disclosed by offering a dopant out-diffusion suppression layers prior to source dopant activation or diffusion to enhance ESD protection capability between gate and source.
    Type: Application
    Filed: July 6, 2012
    Publication date: September 12, 2013
    Applicant: FORCE MOS TECHNOLOGY CO., LTD.
    Inventor: Fu-Yuan HSIEH
  • Method of manufacturing trench MOSFET structures using three masks process
    Patent number: 8530313
    Abstract: In according with the present invention, a semiconductor device is formed as follows. A contact insulation layer is deposited on the top surface of said silicon layer. A contact mask is applied and following with a dry oxide etching to remove the contact insulation layer from contact open areas. The silicon layer is implanted with a source dopant through the contact open areas and the source dopant is diffused to form source regions, thereby a source mask is saved. A dry silicon etch is carried out to form trenched source-body contacts in the contact open areas, penetrating through the source regions and extending into the body regions.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: September 10, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Trench MOSFET with trenched floating gates having thick trench bottom oxide as termination
    Patent number: 8525255
    Abstract: A power semiconductor power device having composite trench bottom oxide and multiple trench floating gates is disclosed. The gate charge is reduced by forming a pad oxide surrounding a HDP oxide on trench bottom. The multiple trenched floating gates are applied in termination for saving body mask.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: September 3, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Trench MOSFET with trenched floating gates and trenched channel stop gates in termination
    Patent number: 8519477
    Abstract: A trench MOSFET comprising multiple trenched floating gates in termination area is disclosed. The multiple trenched floating gates have trench depth equal to or deeper than body junction of body regions in active area. The trench MOSFET further comprises at least one trenched channel stop gate around outside of the trenched floating gates and connected to at least one sawing trenched gate extended into scribe line for prevention of leakage path formation between drain and source regions.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: August 27, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • TRENCH MOSFET HAVING A TOP SIDE DRAIN
    Publication number: 20130207172
    Abstract: This invention discloses a trench MOSFET comprising a top side drain region in a wide trench in a termination area besides a BV sustaining area, wherein said top side drain comprises a top drain metal connected to an epitaxial layer and a substrate through a plurality of trenched drain contacts, wherein the wide trench is formed simultaneously when a plurality of gate trenches are formed in an active area, and the trenched drain contacts are formed simultaneously when a trenched source-body contact is formed in the active area.
    Type: Application
    Filed: February 13, 2012
    Publication date: August 15, 2013
    Applicant: FORCE MOS TECHNOLOGY CO. LTD.
    Inventor: Fu-Yuan HSIEH
  • Trench MOSFET layout with trenched floating gates and trenched channel stop gates in termination
    Patent number: 8487372
    Abstract: A trench MOSFET layout with multiple trenched floating gates and at least one trenched channel stop gate in termination area shorted with drain region is disclosed to make it feasibly achieved after die sawing. The layout consisted of dual trench MOSFETs connected together with multiple sawing trenched gates across a space between the two trench MOSFETs having a width same as scribe line.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: July 16, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • TRENCH SEMICONDUCTOR POWER DEVICE HAVING ACTIVE CELLS UNDER GATE METAL PAD
    Publication number: 20130168764
    Abstract: A trench semiconductor power device having active cells under gate metal pad to increase total active area for lowering on-resistance is disclosed. The gate metal pad is not only for gate wire bonding but also for active cells disposition. Therefore, the device die can be shrunk so that the number of devices per wafer is increased for die cost reduction. Moreover, the device can be packaged into smaller type package for further cost reduction.
    Type: Application
    Filed: December 30, 2011
    Publication date: July 4, 2013
    Applicant: FEEI CHERNG ENTERPRISE CO., LTD.
    Inventor: Fu-Yuan HSIEH
  • SEMICONDUCTOR POWER DEVICE HAVING IMPROVED TERMINATION STRUCTURE FOR MASK SAVING
    Publication number: 20130168761
    Abstract: A improved termination structure for semiconductor power devices is disclosed, comprising a trenched field plate formed not only along trench sidewall but also on trench bottom of the wide termination trench by doing poly-silicon CMP so that body ion implantation is blocked by the trenched field plate on the trench bottom to prevent a body region formation underneath the trench bottom of the wide termination trench, degrading avalanche voltage.
    Type: Application
    Filed: December 30, 2011
    Publication date: July 4, 2013
    Applicant: FEEI CHERNG ENTERPRISE CO., LTD.
    Inventor: Fu-Yuan HSIEH
  • TRENCH MOSFET WITH RESURF STEPPED OXIDE AND DIFFUSED DRIFT REGION
    Publication number: 20130168760
    Abstract: A trench MOSFET with split gates and diffused drift region for on-resistance reduction is disclosed. Each of the split gates is symmetrically disposed in the middle of the source electrode and adjacent trench sidewall of a deep trench. The inventive structure can save a mask for definition of the location of the split gate electrodes. Furthermore, the fabrication method can be implemented more reliably with lower cost.
    Type: Application
    Filed: December 30, 2011
    Publication date: July 4, 2013
    Applicant: FORCE MOS TECHNOLOGY CO. LTD.
    Inventor: Fu-Yuan HSIEH
  • Semiconductor power device integrated with improved gate source ESD clamp diodes
    Patent number: 8466514
    Abstract: A trench semiconductor power device integrated with four types of ESD clamp diodes for optimization of total perimeter of the ESD clamp diodes, wherein the ESD clamp diodes comprise multiple back to back Zener diodes with alternating doped regions of a first conductivity type next to a second conductivity type, wherein each of the doped regions has a closed ring structure.
    Type: Grant
    Filed: October 17, 2011
    Date of Patent: June 18, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • TRENCH MOSFET WITH SPLIT TRENCHED GATE STRUCTURES IN CELL CORNERS FOR GATE CHARGE REDUCTION
    Publication number: 20130113038
    Abstract: A trench MOSFET with closed cells having split trenched gates structure in trenched gates intersection area in cell corner is disclosed. The invented split trenched gates structure comprises an insulation layer between said split trenched gates with thick thermal oxide layer in center portion of the trenched gates intersection area, therefore further reducing Qgd of the trench MOSFET without increasing additional Rds.
    Type: Application
    Filed: November 8, 2011
    Publication date: May 9, 2013
    Applicant: FEEI CHERNG ENTERPRISE CO., LTD.
    Inventor: Fu-Yuan HSIEH
  • Integrated trench MOSFET with trench Schottky rectifier
    Patent number: 8426913
    Abstract: An integrated circuit comprising trench MOSFET having trenched source-body contacts and trench Schottky rectifier having trenched anode contacts is disclosed. By employing the trenched contacts in trench MOSFET and trench Schottky rectifier, the integrated circuit is able to be shrunk to achieve low specific on-resistance for trench MOSFET, and low Vf and reverse leakage current for trench Schottky Rectifier.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: April 23, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • A SEMICONDUCTOR POWER DEVICE INTEGRATRED WITH IMPROVED GATE SOURCE ESD CLAMP DIODES
    Publication number: 20130092976
    Abstract: A trench semiconductor power device integrated with four types of ESD clamp diodes for optimization of total perimeter of the ESD clamp diodes, wherein the ESD clamp diodes comprise multiple back to back Zener diodes with alternating doped regions of a first conductivity type next to a second conductivity type, wherein each of the doped regions has a closed ring structure.
    Type: Application
    Filed: October 17, 2011
    Publication date: April 18, 2013
    Applicant: FORCE MOS TECHNOLOGY CO., LTD.
    Inventor: Fu-Yuan HSIEH
  • SEMICONDUCTOR POWER DEVICE WITH EMBEDDED DIODES AND RESISTORS USING REDUCED MASK PROCESSES
    Publication number: 20130075809
    Abstract: A trench semiconductor power device integrated with a Gate-Source and a Gate-Drain clamp diodes without using source mask is disclosed, wherein a plurality source regions of a first conductivity type of the trench semiconductor device and multiple doped regions of the first conductivity type of the clamp diodes are formed simultaneously through contact open areas defined by a contact mask.
    Type: Application
    Filed: September 27, 2011
    Publication date: March 28, 2013
    Applicant: FORCE MOS TECHNOLOGY CO. LTD.
    Inventor: Fu-Yuan HSIEH
  • SEMICONDUCTOR POWER DEVICES INTEGRATED WITH A TRENCHED CLAMP DIODE
    Publication number: 20130075810
    Abstract: A semiconductor power device having shielded gate structure integrated with a trenched clamp diode formed in a semiconductor silicon layer, wherein the shielded gate structure comprises a shielded electrode formed by a first poly-silicon layer and a gate electrode formed by a second poly-silicon layer. The trenched clamp diode is formed by the first poly-silicon layer. A shielded gate mask used to define the shielded gate is also used to define the trenched clamp diode. Therefore, one poly-silicon layer and a mask for the trenched clamp diode are saved.
    Type: Application
    Filed: September 27, 2011
    Publication date: March 28, 2013
    Applicant: FORCE MOS TECHNOLOGY CO., LTD.
    Inventor: Fu-Yuan HSIEH
  • Power semiconductor device comprising a plurality of trench IGBTs
    Patent number: 8384194
    Abstract: A power semiconductor device with improved avalanche capability structures is disclosed. By forming at least an avalanche capability enhancement doped regions with opposite conductivity type to epitaxial layer underneath an ohmic contact doped region which surrounds at least bottom of trenched contact filled with metal plug between two adjacent gate trenches, avalanche current is enhanced with the disclosed structures.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: February 26, 2013
    Assignee: Force MOS Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Power semiconductor devices integrated with clamp diodes having separated gate metal pads to avoid breakdown voltage degradation
    Patent number: 8378411
    Abstract: A structure of power semiconductor device integrated with clamp diodes having separated gate metal pads is disclosed. The separated gate metal pads are wire bonded together on the gate lead frame. This improved structure can prevent the degradation of breakdown voltage due to electric field in termination region blocked by polysilicon or gate metal.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: February 19, 2013
    Assignee: Force Mos Technology., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Trench MOSFET with body region having concave-arc shape
    Patent number: 8378392
    Abstract: A trench Metal Oxide Semiconductor Field Effect Transistor with improved body region structures is disclosed. By forming the inventive body region structures with concave-arc shape with respect to epitaxial layer, a wider interfaced area between the body region and the epitaxial layer is achieved, thus increasing capacitance between drain and source Cds. Moreover, the invention further comprises a Cds enhancement doped region interfaced with said body region having higher doping concentration than the epitaxial layer to further enhancing Cds without significantly impact breakdown voltage.
    Type: Grant
    Filed: April 7, 2010
    Date of Patent: February 19, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh
  • Super-junction trench MOSFET with Resurf stepped oxides and split gate electrodes
    Patent number: 8373225
    Abstract: A super-junction trench MOSFET with Resurf Stepped Oxide and split gate electrodes is disclosed. The inventive structure can apply additional freedom for better optimization of device performance and manufacturing capability by tuning thick oxide thickness to minimize influence of charge imbalance, trapped charges, etc. Furthermore, the fabrication method can be implemented more reliably with lower cost.
    Type: Grant
    Filed: November 23, 2011
    Date of Patent: February 12, 2013
    Assignee: Force Mos Technology Co., Ltd.
    Inventor: Fu-Yuan Hsieh