Abstract: In a first aspect, a method is provided that includes (1) forming a first barrier layer over the sidewalls and bottom of a via using atomic layer deposition within an atomic layer deposition (ALD) chamber; (2) removing at least a portion of the first barrier layer from the bottom of the via by sputter etching; and (3) depositing a second barrier layer on the sidewalls and bottom of the via within the ALD chamber. Numerous other embodiments are provided, as are systems, methods and computer program products in accordance with these and other aspects.

Abstract: A sputter deposition method is performed in a sputtering chamber having a sputtering target facing a substrate support. A substrate is placed on the support in the chamber and, in a first sputtering stage, a first layer of sputtered material is deposited on the substrate by maintaining a first pressure of a sputtering gas in the chamber, and maintaining the substrate support at a first bias power level. In a second sputtering stage, a second layer of sputtered material is deposited on the substrate by maintaining a second pressure of the sputtering gas that is lower than the first pressure, and maintaining the substrate support at a second bias power level that is higher than the first bias power level.

Abstract: A two-step method of filling copper into a high-aspect ratio via or dual-damascene structure. The first step sputters at a low temperature of no more than 100° C. and with at least portions of high wafer bias, thereby filling a lower half of the hole. The initial copper sputtering is preferably performed through multiple cycles of low-level and high-level pedestal bias to deposit copper on exposed corners and to sputter resulting overhangs from the corners while depositing deep in the hole. The second step may include either electrochemical plating or sputtering performed at a higher temperature, e.g., at least 200° C. and with lower wafer bias to complete the hole filling. In another aspect of the invention, diffusion promoting gas such as hydrogen is added to the copper sputter plasma.

Abstract: A method of filling copper into a high-aspect ratio via by a plasma sputter process and allowing the elimination of electrochemical plating. In one aspect of the invention, the sputtering is divided into a first step performed at a low temperature of no more than 100° C. and with at least portions of high wafer bias, thereby filling a lower half of the hole, and a second step performed at a higher temperature, e.g., at least 200° C. and with at least portions of low wafer bias to complete the hole filling. In another aspect of the invention, diffusion promoting gas such as hydrogen is added to the copper sputter plasma. In still another aspect, copper sputtering, even in the final fill phase, is performed through multiple cycles of low-level and high-level pedestal bias to deposit copper on exposed corners and to sputter from the corners.

Abstract: The present invention relates generally to an improved process for providing uniform step coverage on a substrate and planarization of metal layers to form continuous, void-free contacts or vias in sub-half micron applications. In one aspect of the invention, a refractory layer is deposited onto a substrate having high aspect ratio contacts or vias formed thereon. A CVD metal layer is then deposited onto the refractory layer at low temperatures to provide a conformal wetting layer for a PVD metal. Next, a PVD metal is deposited onto the previously formed CVD metal layer at a temperature below that of the melting point temperature of the metal. The resulting CVD/PVD metal layer is substantially void-free.

Abstract: The present invention relates generally to an improved process for providing uniform step coverage on a substrate and planarization of metal layers to form continuous, void-free contacts or vias in sub-half micron applications. In one aspect of the invention, a refractory layer is deposited onto a substrate having high aspect ratio contacts or vias formed thereon. A CVD metal layer is then deposited onto the refractory layer at low temperatures to provide a conformal wetting layer for a PVD metal. Next, a PVD metal is deposited onto the previously formed CVD metal layer at a temperature below that of the melting point temperature of the metal. The resulting CVD/PVD metal layer is substantially void-free.

Abstract: A method and apparatus for electrochemically plating on a production surface of a substrate are provided. The apparatus generally includes a plating cell having a plating solution reservoir configured to contain a volume of an electrochemical plating solution, and a substrate support member positioned above the plating solution reservoir, the substrate support member being configured to electrically engage a non-production side of a substrate secured thereto.

Abstract: In a first aspect, a method is provided that includes (1) forming a first barrier layer over the sidewalls and bottom of a via using atomic layer deposition within an atomic layer deposition (ALD) chamber; (2) removing at least a portion of the first barrier layer from the bottom of the via by sputter etching; and (3) depositing a second barrier layer on the sidewalls and bottom of the via within the ALD chamber. Numerous other embodiments are provided, as are systems, methods and computer program products in accordance with these and other aspects.

Abstract: A plasma reaction chamber, particularly a DC magnetron sputter reactor, in which the plasma density and the ionization fraction of the plasma is increased by a plasma inductive loop passing through the processing space. A tube has its two ends connected to the vacuum chamber on confronting sides of the processing space. An RF coil powered by an RF power supply is positioned adjacent to the tube outside of the chamber and aligned to produce an RF magnetic field around the toroidal circumference of the tube such that an electric field is induced along the tube axis. Thereby, a plasma is generated in the tube in a loop circling through the processing space.

Abstract: A method and apparatus is provided for filling apertures formed in a substrate surface by depositing materials that selectively inhibit or limit the formation or growth of subsequent layers used to fill an aperture. In one aspect, a method is provided for processing a substrate including providing a substrate having a field and apertures formed therein, wherein the apertures each have a bottom and sidewalls, depositing a seed layer on the bottom and sidewalls of the apertures, depositing a growth-inhibiting layer on at least one of the field of the substrate or an upper portion of the sidewalls of the apertures, and depositing a conductive layer on the growth-inhibiting layer and the seed layer. Deposition of the growth-inhibiting layer improves fill of the aperture from the bottom of the aperture up to the field of the substrate.

Abstract: The present invention generally provides a metallization process for forming a highly integrated interconnect. More particularly, the present invention provides a dual damascene interconnect module that incorporates selective chemical vapor deposition aluminum (CVD Al) via fill with a metal wire, preferably copper, formed within a barrier layer. The invention provides the advantages of having copper wires with lower resistivity (greater conductivity) and greater electromigration resistance than aluminum, a barrier layer between the copper wire and the surrounding dielectric material, void-free, sub-half micron selective CVD Al via plugs, and a reduced number of process steps to achieve such integration.

Abstract: A method and associated apparatus of electroplating an object and filling small features. The method comprises immersing the plating surface into an electrolyte solution and mechanically enhancing the concentration of metal ions in the electrolyte solution in the features. In one embodiment, the mechanical enhancement comprises mechanically vibrating the plating surface. In another embodiment, the mechanical enhancement comprises mechanically vibrating the electrolyte solution. In a further embodiment, the mechanical enhancement comprises increasing the pressure applied to the electrolyte solution.

Abstract: A magnetron sputter reactor for sputtering deposition materials such as tantalum, tantalum nitride and copper, for example, and its method of use, in which self-ionized plasma (SIP) sputtering and inductively coupled plasma (ICP) sputtering are promoted, either together or alternately, in the same chamber. Also, bottom coverage may be thinned or eliminated by ICP resputtering. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. ICP is provided by one or more RF coils which inductively couple RF energy into a plasma. The combined SIP-ICP layers can act as a liner or barrier or seed or nucleation layer for hole. In addition, an RF coil may be sputtered to provide protective material during ICP resputtering.

Abstract: An inter-level metallization structure and the method of forming it, preferably based on copper dual damascene in which the lower-metal level is formed with a exposed metallization and an adjacent, embedded stop layer, both the metallization and embedded stop layer have exposed surfaces approximately level with each other with a lower dielectric layer. The upper-metal level includes a second stop layer deposited over the embedded stop layer and the first metallization and a second dielectric layer. An inter-level via is etched through the second dielectric layer and through the second stop layer and metal is filled into the via to contact the metallization. If the inter-level via is offset over the edge of the metallization, the metal in the via contacts the embedded stop layer and not the first dielectric layer, whereby the embedded stop layer acts as a copper diffusion barrier.

Abstract: The present invention generally provides a metallization process for forming a highly integrated interconnect. More particularly, the present invention provides a dual damascene interconnect module that incorporates selective chemical vapor deposition aluminum (CVD Al) via fill with a metal wire, preferably copper, formed within a barrier layer. The invention provides the advantages of having copper wires with lower resistivity (greater conductivity) and greater electromigration resistance than aluminum, a barrier layer between the copper wire and the surrounding dielectric material, void-free, sub-half micron selective CVD Al via plugs, and a reduced number of process steps to achieve such integration.

Abstract: A magnetic shield to reduce sputtering of an RF coil for a plasma chamber in a semiconductor fabrication system is provided. The magnetic shield also reduces deposition of material onto the coil which in turn leads to a reduction in particulate matter shed by the coil onto the workpiece.

Abstract: The present invention provides a process sequence and related hardware for filling a hole with copper. The sequence comprises first forming a reliable barrier layer in the hole to prevent diffusion of the copper into the dielectric layer through which the hole is formed. One sequence comprises forming a generally conformal barrier layer over a patterned dielectric, etching the bottom of the hole, depositing a second barrier, and then filling the hole with copper. An alternative sequence comprises depositing a first barrier layer over a blanket dielectric layer, forming a hole through both the barrier layer and the dielectric layer, depositing a generally conformal second barrier layer in the hole, removing the barrier layer from the bottom of the hole, and selectively filling the hole with copper.

Abstract: The present invention provides a process sequence and related hardware for filling a hole with copper. The sequence comprises first forming a reliable barrier layer in the hole to prevent diffusion of the copper into the dielectric layer through which the hole is formed. One sequence comprises forming a generally conformal barrier layer over a patterned dielectric, etching the bottom of the hole, depositing a second barrier, and then filling the hole with copper. An alternative sequence comprises depositing a first barrier layer over a blanket dielectric layer, forming a hole through both the barrier layer and the dielectric layer, depositing a generally conformal second barrier layer in the hole, removing the barrier layer from the bottom of the hole, and selectively filling the hole with copper.

Abstract: A method of forming a composite barrier layer structure for use in integrated circuits is disclosed. The composite barrier layer structure formed using both physical vapor deposition (PVD) and chemical vapor deposition (CVD) techniques. The composite barrier layer structure comprises a CVD deposited layer formed on a PVD deposited layer. During the PVD process, the underlying surface of the substrate is treated, reducing the resistivity of the barrier layer structure formed thereon.

Abstract: A multi-step sputtering process in plasma sputter reactor having target and magnetron operable in two modes, for example, in a substrate sputter etch and a substrate sputter deposition. The target has an annular vault facing the wafer to be sputter coated. Various types of magnetic means positioned around the vault create a magnetic field supporting a plasma extending over a large volume of the vault. An integrated copper via filling process with the inventive reactor or other reactor includes a first step of highly ionized sputter deposition of copper, which can optionally be used to remove the barrier layer at the bottom of the via, a second step of more neutral, lower-energy sputter deposition of copper to complete the seed layer, and a third step of electroplating copper into the hole to complete the metallization. The first two steps can be also used with barrier metals.