Patents by Inventor Fusen Chen

Fusen Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6485618
    Abstract: A target and magnetron for a plasma sputter reactor. The target has an annular vault facing the wafer to be sputter coated. Various types of magnetic means positioned around the vault create a magnetic field supporting a plasma extending over a large volume of the vault. An integrated copper via filling process includes a first step of highly ionized sputter deposition of copper, a second step of more neutral, lower-energy sputter deposition of copper to complete the seed layer, and electroplating copper into the hole to complete the metallization.
    Type: Grant
    Filed: July 30, 2001
    Date of Patent: November 26, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Praburam Gopalraja, Jianming Fu, Fusen Chen, Girish Dixit, Zheng Xu, Sankaram Athreya, Wei D. Wang, Ashok K. Sinha
  • Patent number: 6451177
    Abstract: A target and magnetron for a plasma sputter reactor. The target has an annular vault facing the wafer to be sputter coated. Various types of magnetic means positioned around the vault create a magnetic field supporting a plasma extending over a large volume of the vault. Preferably, the magnetron includes annular magnets of opposed polarities disposed behind the two vault sidewalls and a small closed unbalanced magnetron of nested magnets of opposed polarities scanned along the vault roof. An integrated copper via filling process with the inventive reactor or other reactor includes a first step of highly ionized sputter deposition of copper, which can optionally be used to remove the barrier layer at the bottom of the via, a second step of more neutral, lower-energy sputter deposition of copper to complete the seed layer, and a third step of electroplating copper into the hole to complete the metallization. The first two steps can be also used with barrier metals.
    Type: Grant
    Filed: November 1, 2000
    Date of Patent: September 17, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Praburam Gopalraja, Jianming Fu, Fusen Chen, Girish Dixit, Zheng Xu, Wei Wang, Ashok K. Sinha
  • Publication number: 20020117399
    Abstract: A method of forming a copper via and the resultant structure. A thin layer of an insulating barrier material, such as aluminum oxide or tantalum nitride, is conformally coated onto the sides and bottom of the via hole, for example, by atomic layer deposition (ALD) to a thickness of less than 5 nm, preferably less than 2 nm and having an electrical resistivity of more than 500 microohm-cm. A copper seed layer is then deposited under conditions such that copper is deposited on the via sidewalls but not deposited over most of the bottom of via hole. Instead energetic copper ions sputter the barrier material from the via bottom. Copper is electroplated into the via hole lined only on its sidewalls with the barrier. The invention preferably extends also to dual-damascene structures in which the copper seed sputter process sputters the barrier layer from the via bottom but not the trench floor.
    Type: Application
    Filed: February 23, 2001
    Publication date: August 29, 2002
    Applicant: Applied Materials, Inc.
    Inventors: Fusen Chen, Ling Chen
  • Publication number: 20020102842
    Abstract: The present invention relates generally to an improved process for providing uniform step coverage on a substrate and planarization of metal layers to form continuous, void-free contacts or vias in sub-half micron applications. In one aspect of the invention, a refractory layer is deposited onto a substrate having high aspect ratio contacts or vias formed thereon. A CVD metal layer is then deposited onto the refractory layer at low temperatures to provide a conformal wetting layer for a PVD metal. Next, a PVD metal is deposited onto the previously formed CVD metal layer at a temperature below that of the melting point temperature of the metal. The resulting CVD/PVD metal layer is substantially void-free.
    Type: Application
    Filed: February 11, 2002
    Publication date: August 1, 2002
    Applicant: Applied Materials, Inc.
    Inventors: Roderick Craig Mosley, Hong Zhang, Fusen Chen, Ted Guo, Liang-Yun Chen
  • Publication number: 20020084189
    Abstract: A method and associated apparatus of electroplating an object and filling small features. The method comprises immersing the plating surface into an electrolyte solution and mechanically enhancing the concentration of metal ions in the electrolyte solution in the features. In one embodiment, the mechanical enhancement comprises mechanically vibrating the plating surface. In another embodiment, the mechanical enhancement comprises mechanically vibrating the electrolyte solution. In a further embodiment, the mechanical enhancement comprises increasing the pressure applied to the electrolyte solution.
    Type: Application
    Filed: January 3, 2001
    Publication date: July 4, 2002
    Applicant: Applied Materials, Inc.
    Inventors: Hougong Wang, Bo Zheng, Girish Dixit, Fusen Chen
  • Patent number: 6399479
    Abstract: The invention provides a method for filling a structure on a substrate comprising: depositing a barrier layer on one or more surfaces of the structure, depositing a seed layer over the barrier layer, removing a portion of the seed layer, and electrochemically depositing a metal to fill the structure. Preferably, a portion or all of the seed layer formed on the sidewall portion of the structure is removed using a electrochemical de-plating process prior to the electroplating process.
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: June 4, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Fusen Chen, Zheng Xu, Peijun Ding, Barry Chin, Ashok Sinha
  • Publication number: 20020060363
    Abstract: Embodiments of the present invention provide a process sequence and related hardware for filling a patterned feature on a substrate with a metal, such as copper. The sequence comprises first forming a reliable barrier layer in the patterned feature to prevent diffusion of the metal into the dielectric layer through which the patterned feature is formed. One sequence comprises forming a generally conformal barrier layer over a patterned dielectric, etching the barrier layer at the bottom of the patterned feature, depositing a second barrier layer, and then filling the patterned feature with a metal, such as copper.
    Type: Application
    Filed: January 17, 2002
    Publication date: May 23, 2002
    Applicant: Applied Materials, Inc.
    Inventors: Ming Xi, Paul Frederick Smith, Ling Chen, Michael X. Yang, Mei Chang, Fusen Chen, Christophe Marcadal, Jenny C. Lin
  • Patent number: 6383915
    Abstract: We have discovered particular wetting layer or wetting/barrier layer structures which enable depositing of overlying aluminum interconnect layers having <111> texturing sufficient to provide a Rocking Curve FWHM angle &thgr; of about 1° or less. The aluminum interconnect layer exhibiting a Rocking Curve FWHM angle &thgr; of about 1° or less exhibits excellent electromigration properties. In addition when the aluminum layer is subsequently pattern etched, the sidewalls of the etched aluminum pattern exhibit a surprising reduction in pitting compared with pattern etched aluminum layers exhibiting higher Rocking Curve FWHM angles.
    Type: Grant
    Filed: February 3, 1999
    Date of Patent: May 7, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Jingang Su, Gongda Yao, Zhang Xu, Fusen Chen
  • Patent number: 6355560
    Abstract: The present invention relates generally to an improved process for providing uniform step coverage on a substrate and planarization of metal layers to form continuous, void-free contacts or vias in sub-half micron applications. In one aspect of the invention, a refractory layer is deposited onto a substrate having high aspect ratio contacts or vias formed thereon. A CVD metal layer is then deposited onto the refractory layer at low temperatures to provide a conformal wetting layer for a PVD metal. Next, a PVD metal is deposited onto the previously formed CVD metal layer at a temperature below that of the melting point temperature of the metal. The resulting CVD/PVD metal layer is substantially void-free.
    Type: Grant
    Filed: December 10, 1998
    Date of Patent: March 12, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Roderick Craig Mosely, Hong Zhang, Fusen Chen, Ted Guo
  • Publication number: 20010050226
    Abstract: A target and magnetron for a plasma sputter reactor. The target has an annular vault facing the wafer to be sputter coated. Various types of magnetic means positioned around the vault create a magnetic field supporting a plasma extending over a large volume of the vault. An integrated copper via filling process includes a first step of highly ionized sputter deposition of copper, a second step of more neutral, lower-energy sputter deposition of copper to complete the seed layer, and electroplating copper into the hole to complete the metallization.
    Type: Application
    Filed: July 30, 2001
    Publication date: December 13, 2001
    Inventors: Praburam Gopalraja, Jianming Fu, Fusen Chen, Girish Dixit, Zheng Xu, Sankaram Athreya, Wei D. Wang, Ashok K. Sinha
  • Publication number: 20010032783
    Abstract: A target and magnetron for a plasma sputter reactor. The target has an annular vault facing the wafer to be sputter coated. Preferably, the magnetron includes annular magnets of opposed polarities disposed behind the two vault sidewalls and a small closed unbalanced magnetron of nested magnets of opposed polarities scanned along the vault roof. The nested magnets are rotated along the vault. An integrated copper via filling process with the inventive reactor or other reactor includes a first step of highly ionized sputter deposition of copper, which can optionally be used to remove the barrier layer at the bottom of the via, a second step of more neutral, lower-energy sputter deposition of copper to complete the seed layer, and a third step of electroplating copper into the hole to complete the metallization. The first two steps can be also used with barrier metals.
    Type: Application
    Filed: May 11, 2001
    Publication date: October 25, 2001
    Inventors: Praburam Gopalraja, Jianming Fu, Fusen Chen, Girish Dixit, Zheng Xu, Wei Wang, Ashok K. Sinha
  • Patent number: 6306265
    Abstract: A magnetron especially advantageous for low-pressure plasma sputtering or sustained self-sputtering having reduced area but full target coverage. The magnetron includes an outer pole face surrounding an inner pole face with a gap therebetween. The outer pole of the magnetron of the invention is smaller than that of a circular magnetron similarly extending from the center to the periphery of the target. A preferred triangular shape having a small apex angle of 20 to 30° may be formed from outer bar magnets of one magnetic polarity enclosing an inner magnet of the other magnetic polarity. The magnetron allows the generation of plasma waves in the neighborhood of 22 MHz which interact with the 1 to 20 eV electrons of the plasma to thereby increase the plasma density.
    Type: Grant
    Filed: April 11, 2000
    Date of Patent: October 23, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Jianming Fu, Praburam Gopalraja, Fusen Chen, John Forster
  • Patent number: 6277249
    Abstract: A target and magnetron for a plasma sputter reactor. The target has an annular trough facing the wafer to be sputter coated. Various types of magnetic means positioned around the trough create a magnetic field supporting a plasma extending over a large volume of the trough. For example, the magnetic means may include magnets disposed on one side within a radially inner wall of the trough and on another side outside of a radially outer wall of the trough to create a magnetic field extending across the trough, to thereby support a high-density plasma extending from the top to the bottom of the trough. The large plasma volume increases the probability that the sputtered metal atoms will become ionized. The magnetic means may include a magnetic coil, may include additional magnets in back of the trough top wall to increase sputtering there, and may include confinement magnets near the bottom of the trough sidewalls.
    Type: Grant
    Filed: March 2, 2000
    Date of Patent: August 21, 2001
    Assignee: Applied Materials Inc.
    Inventors: Praburam Gopalraja, Jianming Fu, Fusen Chen, Girish Dixit, Zheng Xu, Sankaram Athreya, Wei D. Wang, Ashok K. Sinha
  • Patent number: 6274008
    Abstract: A target and magnetron for a plasma sputter reactor. The target has an annular vault facing the wafer to be sputter coated. Various types of magnetic means positioned around the vault create a magnetic field supporting a plasma extending over a large volume of the vault. An integrated copper via filling process includes a first step of highly ionized sputter deposition of copper, a second step of more neutral, lower-energy sputter deposition of copper to complete the seed layer, and electroplating copper into the hole to complete the metallization.
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: August 14, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Praburam Gopalraja, Jianming Fu, Fusen Chen, Girish Dixit, Zheng Xu, Sankaram Athreya, Wei D. Wang, Ashok K. Sinha
  • Patent number: 6238528
    Abstract: A plasma chamber in a semiconductor fabrication system improves the uniformity of a high density plasma by optimizing a ratio of RF power from a first coil, surrounding and inductively coupled into the high density plasma, to RF power from a second coil, positioned above a central region and inductively coupled into the high density plasma. It has also been found that an increase in RF power supplied to the second coil positioned above the central region relative to RF power suppled to the first coil surrounding the high density plasma tends to increase the relative density of the plasma toward the center of the high density plasma. It is believed that RF power supplied to the second coil positioned above the central region substrate tends to add more electrons into the central region of the high density plasma to compensate for electrons recombining with plasma ions.
    Type: Grant
    Filed: October 13, 1998
    Date of Patent: May 29, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Zheng Xu, Fusen Chen, Jianming Fu
  • Patent number: 6238803
    Abstract: Improved titanium nitride barrier layers are formed by depositing a first titanium layer; treating this layer with an oxygen plasma to form an oxygen-containing titanium layer thereover; depositing a titanium nitride layer over the oxygen-containing titanium layer; and treating the titanium nitride layer with an oxygen-containing plasma. Robust titanium nitride barrier layers are formed that can prevent spiking by an overlying aluminum contact layer even after heat treatment up to 550° C.
    Type: Grant
    Filed: February 9, 2000
    Date of Patent: May 29, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Jianming Fu, Zheng Xu, Fusen Chen
  • Patent number: 6217721
    Abstract: An aluminum sputtering process, particularly useful for filling vias and contacts of high aspect ratios formed through a dielectric layer and also usefull for forming interconnects that are highly resistant to electromigration. A liner or barrier layer is first deposited by a high-density plasma (HDP) physical vapor deposition (PVD, also called sputtering) process, such as is done with an inductively coupled plasma. If a contact is connected at its bottom to a silicon element, the first sublayer of the liner layer is a Ti layer, which is silicided to the silicon substrate. The second sublayer comprises TiN, which not only acts as a barrier against the migration of undesirable components into the underlying silicon but also when deposited with an HDP process and biased wafer forms a dense, smooth crystal structure. The third sublayer comprises Ti and preferably is graded from TiN to Ti. Over the liner layer, an aluminum layer is deposited in a standard, non-HDP process.
    Type: Grant
    Filed: April 5, 1996
    Date of Patent: April 17, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Zheng Xu, John Forster, Tse-Yong Yao, Jaim Nulman, Fusen Chen
  • Patent number: 6139697
    Abstract: The present invention relates generally to an improved process for providing complete via fill on a substrate and planarization of metal layers to form continuous, void-free contacts or vias in sub-half micron applications. In one aspect of the invention, a refractory layer is deposited onto a substrate having high aspect ratio contacts or vias formed thereon. A CVD metal layer, such as CVD Al or CVD Cu, is then deposited onto the refractory layer at low temperatures to provide a conformal wetting layer for a PVD Cu. Next, a PVD Cu is deposited onto the previously formed CVD Cu layer at a temperature below that of the melting point temperature of the metal. The resulting CVD/PVD Cu layer is substantially void-free.
    Type: Grant
    Filed: January 31, 1997
    Date of Patent: October 31, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Liang-Yuh Chen, Roderick Craig Mosely, Fusen Chen, Rong Tao, Ted Guo
  • Patent number: 6120844
    Abstract: The present invention relates generally to an improved apparatus and process to provide a thin self-aligning layer prior to forming a conducting film layer thereover to improve the film characteristics and deposition coverage. In one aspect of the invention, a dielectric layer is formed over a conducting or semiconducting layer and etched to form an aperture exposing the underlying conducting or semiconducting layer on the aperture floor. An ultra-thin nucleation layer is then deposited by either vapor deposition or chemical vapor deposition onto the field of the dielectric layer. A CVD metal layer is then deposited onto the structure to achieve selective deposition on the floor of the aperture, while preferably also forming a highly oriented blanket layer on the field. In another aspect of the invention, a thin, self-aligning layer is formed over a barrier layer prior to deposition of a conducting film thereover.
    Type: Grant
    Filed: March 27, 1996
    Date of Patent: September 19, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Liang Chen, Ted Guo, Fusen Chen, Roderick C. Mosely
  • Patent number: 6110821
    Abstract: Titanium is sputtered in an ionized metal plasma sputtering chamber to form titanium silicide in situ in the bottom of openings onto silicon in a series of steps that change the temperature and deposition conditions of sputtering. Ionized titanium is sputtered cold, the temperature is rapidly increased by passing argon through the heated substrate support without sputtering, thereby initiating titanium silicide formation, and then the sputtering of titanium ions is continued at high temperatures to deposit titanium silicide.To deposit titanium silicide in very high aspect ratio openings, a first layer of titanium atoms is sputter deposited in conventional manner to line the sidewalls of the openings, followed by sputtering from a plasma and continuing with the above process.
    Type: Grant
    Filed: January 27, 1998
    Date of Patent: August 29, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Gene Y. Kohara, Fusen Chen, Hyman Joseph Levinstein, Zheng Xu, Peijun Ding, Gongda Yao, Hong Zhang