Abstract: The present invention relates generally to an improved apparatus and process for providing uniform step coverage on a substrate and planarization of conducting layers to form continuous, void-free interconnects in sub-half micron, high aspect ratio aperture width applications and highly oriented conducting layers. In one aspect of the invention, a dielectric layer is formed over a conducting or semiconducting layer and etched to form an aperture exposing the underlying conducting or semiconducting layer on the aperture floor. An ultra-thin nucleation layer is then deposited by physical vapor deposition onto the field of the dielectric layer. A CVD metal layer is then deposited onto the structure to achieve selective deposition on the floor of the aperture, while preferably also forming a highly oriented blanket layer on the field. The present apparatus and process reduce the number of steps necessary to fabricate CVD metal interconnects and layers that are substantially void-free and planarized.

Abstract: An improved titanium nitride barrier layer that prevents spiking between an overlying aluminum layer and a silicon substrate is formed by first sputter depositing a titanium layer onto the substrate, forming an oxygen-containing titanium layer thereover, and sputter depositing a titanium nitride layer over the oxygen-containing layer. The oxygen-containing layer can be formed in an oxygen-containing plasma, or titanium can be sputtered in the presence of oxygen. The titanium-containing layers can be deposited in a single sputtering chamber fitted with a source of RF power to the substrate support to form the plasma. An aluminum contact layer is sputter deposited over the titanium nitride layer.

Abstract: A hybrid Johnsen-Rahbek chuck that provides a combination of both Coulombic and Johnsen-Rahbek chucking mechanisms. More specifically, the chuck contains a plurality of dielectric mesas deposited upon particular regions of the support surface of a chuck. The body of the chuck is generally fabricated from a Johnsen-Rahbek semiconducting dielectric. The mesas are formed from a thin film deposition of a highly-resistive dielectric. Consequently, the thin, highly resistive film prevents excess DC standby current as well as reduces the dependence of the electrostatic chuck performance on the wafer backside morphology and composition.

Abstract: Improved titanium nitride barrier layers are formed by depositing a first titanium layer; treating this layer with an oxygen plasma to form an oxygen-containing titanium layer thereover; depositing a titanium nitride layer over the oxygen-containing titanium layer; and treating the titanium nitride layer with an oxygen-containing plasma. Robust titanium nitride barrier layers are formed that can prevent spiking by an overlying aluminum contact layer even after heat treatment up to 550.degree. C.

Abstract: The present invention relates generally to an improved process for providing uniform step coverage on a substrate and planarization of metal layers to form continuous, void-free contacts or vias in sub-half micron applications. In one aspect of the invention, a refractory layer is deposited onto a substrate having high aspect ratio contacts or vias formed thereon. A CVD metal layer is then deposited onto the refractory layer at low temperatures to provide a conformal wetting layer for a PVD metal. Next, a PVD metal is deposited onto the previously formed CVD metal layer at a temperature below that of the melting point temperature of the metal. The resulting CVD/PVD metal layer is substantially void-free.

Abstract: An improved titanium nitride barrier layer that prevents spiking between an overlying aluminum layer and a silicon substrate is formed by first sputter depositing a titanium layer onto the substrate, forming an oxygen-containing titanium layer thereover, and sputter depositing a titanium nitride layer over the oxygen-containing layer. The oxygen-containing layer can be formed in an oxygen-containing plasma, or titanium can be sputtered in the presence of oxygen. The titanium-containing layers can be deposited in a single sputtering chamber fitted with a source of RF power to the substrate support to form the plasma. An aluminum contact layer is sputter deposited over the titanium nitride layer.

Abstract: A method of eliminating or substantially eliminating voids formed in the bottom of high aspect ratio holes following the physical vapor deposition of a material over the surface of a substrate. The method includes placing the substrate in an ultrasonic processing chamber filled with a fluid and having an ultrasonic source. The ultrasonic source is used to generate ultrasonic waves at a frequency no higher than is sufficient to cause a flow of the material adjacent the voids into these voids, without significantly affecting the deposited material elsewhere on the substrate.

Abstract: A cover layer, and method of fabricating the same, for covering a support surface of a workpiece support. More specifically, the cover layer contains a plurality of conductive pads and an insulating material coating. The insulating material coating covers substantially the entire surface of the chuck; however, a top surface of each conductive pad is exposed through the coating. The cover layer maintains a wafer, or other workpiece, in a spaced apart relation to the support surface of the chuck. The distance between the underside surface of the wafer and the chuck is defined by the thickness of conductive pads in the cover layer. The plurality of conductive pads create a plurality of conductive paths from the wafer to the surface of the chuck such that the insulating material layer does not interfere with the Johnsen-Rahbek effect that electrostatically retains the wafer on the chuck.

Abstract: A method of eliminating or substantially eliminating voids formed in the bottom of high aspect ratio holes following the physical vapor deposition of a material over the surface of a substrate. The method includes placing the substrate in an ultrasonic processing chamber filled with a fluid and having an ultrasonic source. The ultrasonic source is used to generate ultrasonic waves at a frequency no higher than is sufficient to cause a flow of the material adjacent the voids into these voids, without significantly affecting the deposited material elsewhere on the substrate.

Abstract: A method for fabrication of local interconnects in an integrated circuit, and an integrated circuit formed according to the same, is disclosed. According to the disclosed embodiment, a first and a second conductive structure are formed over the integrated circuit. An insulating layer is formed over the integrated. A first photoresist layer is formed over the insulating layer, patterned and developed. The insulating layer is etched to expose selected regions of the first and second conductive structures. A refractory metal layer is formed over the integrated circuit. A barrier layer is formed over the refractory metal layer, and optionally a refractory metal silicide layer is formed over the barrier layer. A second photoresist layer is formed over the barrier layer, patterned and developed.

Abstract: A method for fabrication of local interconnects in an integrated circuit, and an integrated circuit formed according to the same, is disclosed. According to the disclosed embodiment, a first and a second conductive structure are formed over the integrated circuit. An insulating layer is formed over the integrated. A first photoresist layer is formed over the insulating layer, patterned and developed. The insulating layer is etched to expose selected regions of the first and second conductive structures. A refractory metal layer is formed over the integrated circuit. A barrier layer is formed over the refractory metal layer, and optionally a refractory metal silicide layer is formed over the barrier layer. A second photoresist layer is formed over the barrier layer, patterned and developed.

Abstract: The method for fabrication of openings in semiconductor devices to improve metal step coverage includes forming an active region over a substrate. A metal oxide layer is then formed over the source/drain region. An insulating layer is formed over the metal oxide layer. A photoresist layer is formed over the insulating layer, and patterned to form an opening, exposing a portion of the insulating. The insulating layer is then etched to expose a portion of the metal oxide layer. The photoresist layer is removed and the insulating layer is reflowed so as to form rounded corners at the opening of the insulating layer. The exposed portion of the metal oxide layer is removed to expose a portion of the active region.

Abstract: The method for fabrication of openings in semiconductor devices to improve metal step coverage includes forming an active region over a substrate. A metal oxide layer is then formed over the source/drain region. An insulating layer is formed over the metal oxide layer. A photoresist layer is formed over the insulating layer, and patterned to form an opening, exposing a portion of the insulating. The insulating layer is then etched to expose a portion of the metal oxide layer. The photoresist layer is removed and the insulating layer is reflowed so as to form rounded corners at the opening of the insulating layer. The exposed portion of the metal oxide layer is removed to expose a portion of the active region.

Abstract: The method for producing the surface reflectance of the metal layer during semiconductor processing includes the step of roughening the surface of a metal layer prior to forming the photoresist thereon. The roughened surface reduces reflections that can cause metal notching effects. The step of roughening the surface includes depositing a layer (34) of aluminum which is substantially thinner than the thickness of the primary metal layer by a sputtering process.