Abstract: The present disclosure relates to a sound source file structure, to output lyrics as audible sounds right before melodies corresponding to the lyrics start, to help a user to remind the lyrics based on accompaniment for a song after the accompaniment starts to be provided, and to help the user to sing based on correct lyrics corresponding to the melodies. The sound source file structure may include one or more backing sound source layers in which backing sounds based on beats and rhythms are placed, a melody sound source layer in which melody notes corresponding to lyrics based on beats and rhythms and a rest section corresponding to a rest are placed, and a lyric voice source layer in which a lyric voice is placed at a position corresponding to a rest section.

Abstract: Provided are an apparatus and method of interworking IoT servers associated with heterogeneous platforms. The method of providing IoT resource information in an IoT server operating based on a first IoT platform includes: receiving device information of a first IoT device to register in a resource table; transmitting resource information of the first IoT device including a resource path of the first IoT device to an external IoT server through an interworking brokerage server; receiving resource information of a second IoT device registered in the external IoT server operating based on a second IoT platform through the interworking brokerage server; and translating an original resource path included in the resource information of the second IoT device into a format according to the first IoT platform to store the resource information of the second IoT device including the original resource path and a translated resource path in the resource table.

Abstract: A display substrate may include a substrate and a wiring on the substrate. The wiring may include a metal oxide layer including at least one oxide selected from tantalum (Ta), niobium (Nb), and titanium (Ti), and a metal layer on the metal oxide layer and including copper (Cu), and a thickness of the metal oxide layer may be in a range of about 30 angstroms (?) to about 50 ?.

Abstract: A light emitting diode device includes a thin film transistor substrate having a plurality of light emitting areas, a first diode electrode and a second diode electrode on the thin film transistor substrate, a first passivation pattern between the first diode electrode and the second diode electrode, a plurality of micro light emitting diodes on the first passivation pattern, a first bridge pattern on the micro light emitting diodes and electrically connecting the first diode electrode to the micro light emitting diodes, and a second bridge pattern on the first bridge pattern and electrically connecting the second diode electrode to the micro light emitting diodes, wherein each sidewall of each of the micro light emitting diodes and each sidewall of the first passivation pattern form a same plane.

Abstract: An manufacturing method of a display device may include the following steps: forming a transistor on a substrate; forming an insulating layer on the transistor; forming a conductive layer including silver on the insulating layer; forming a photosensitive member on the conductive layer; forming an electrode of a light-emitting element by etching the conductive layer; performing plasma treatment on a structure that comprises the electrode, the plasma treatment using a gas including a halogen; and removing a product that is resulted from the plasma treatment.

Abstract: A display device and a method for manufacturing a display device, the device including a semiconductor layer on a substrate; a gate insulation layer and an interlayer insulation layer that overlap the semiconductor layer; contact holes that penetrate the gate insulation layer and the interlayer insulation layer; a source electrode and a drain electrode that are electrically connected with the semiconductor layer through the contact holes; a light emitting diode that is connected with the drain electrode; and first spacers and second spacers between the source electrode and the interlayer insulation layer and between the drain electrode and the interlayer insulation layer in the contact holes.

Abstract: A conductive pattern for a display device includes a first layer including aluminum or an aluminum alloy disposed on a substrate and forming a first taper angle with the substrate, and a second layer disposed on the first layer forming a second taper angle with the first layer, in which the second taper angle is smaller than the first taper angle.

Abstract: A display device and a method of the display device are provided. The display device includes a lower metal layer on a substrate, a buffer layer on the lower metal layer, a first semiconductor layer on the buffer layer, a gate insulating layer on the first semiconductor layer, a first gate electrode on the gate insulating layer, an interlayer insulating layer on the first gate electrode, a via layer on the interlayer insulating layer, a pixel electrode on the via layer and electrically connected to the first semiconductor layer, a light emitting layer on the pixel electrode, a common electrode on the light emitting layer, a first contact hole penetrating the buffer layer and the interlayer insulating layer and a second contact hole penetrating the interlayer insulating layer, and a first via hole and a second via hole each penetrating the via layer.

Abstract: A display device includes a thin film transistor on a base substrate and a signal wiring electrically connected to the thin film transistor. The signal wiring includes a main conductive layer including copper, and a capping layer including titanium the capping layer overlapping a portion of an upper surface of the main conductive layer. The signal wiring has a taper angle in a range of about 70° to about 90°. A thickness of the capping layer is in a range of about 100 ? to about 300 ?, and a thickness of the main conductive layer is in a range of about 1,000 ? to about 20,000 ?.

Abstract: A method of manufacturing a display substrate may include the following steps: forming a drain electrode on a pixel area of a substrate; forming a pad electrode on a pad area of the substrate; forming an inorganic insulation layer that covers the drain electrode and the pad electrode; forming an organic insulation member that has a first thickness at the pixel area of the substrate, has a second thickness less than the first thickness at the pad area of the substrate, exposes a first portion of the inorganic insulation layer on the drain electrode, and exposes a second portion of the inorganic insulation layer on the pad electrode; removing the first portion of the inorganic insulation layer and the second portion of the inorganic insulation layer; and partially removing the organic insulation member.

Abstract: An OLED display device includes a substrate including a display region and a pad region, a display structure in the display region on the substrate, and a pad electrode structure in the pad region on the substrate, the pad electrode structure having a first pad electrode on the substrate, a first insulation layer covering opposite lateral portions of the first pad electrode and exposing a portion of an upper surface of the first pad electrode, a second pad electrode on the first pad electrode and on the first insulation layer, the second pad electrode having a step portion where the first pad electrode and the first insulation layer are overlapped, and a third pad electrode on the second pad electrode and on the first insulation layer, the third electrode covering the second pad electrode.

Abstract: A display device includes a first base, a pixel electrode on the first base, a pixel defining layer having an opening that at least partially exposes the pixel electrode, a light emitting layer on the pixel electrode, an auxiliary electrode on the same layer as the pixel electrode, a partition wall on the auxiliary electrode that at least partially exposes a side surface of the auxiliary electrode, an organic layer on the partition wall, and a common electrode continuously arranged on the light emitting layer and the organic layer, wherein a side surface of the partition wall has a reverse-tapered shape, and the common electrode contacts the side surface of the auxiliary electrode.

Abstract: A copper plasma etching method according an exemplary embodiment includes: placing a substrate on a susceptor in a process chamber of a plasma etching apparatus; supplying an etching gas that include hydrogen chloride into the process chamber; plasma-etching a conductor layer that include copper in the substrate; and maintaining a temperature of the susceptor at 10° C. or less during the plasma-etching.

Abstract: A display device includes a base substrate; an organic layer disposed on the base substrate; and a first conductive layer disposed on the organic layer, wherein the first conductive layer includes a plurality of stacked films, the plurality of stacked films include a first conductive film disposed directly on the organic layer and a second conductive film disposed on the first conductive film, and the first conductive film has an oxygen concentration higher than an oxygen concentration of the second conductive film.

Abstract: A method of manufacturing a display substrate may include the following steps: forming a drain electrode on a pixel area of a substrate; forming a pad electrode on a pad area of the substrate; forming an inorganic insulation layer that covers the drain electrode and the pad electrode; forming an organic insulation member that has a first thickness at the pixel area of the substrate, has a second thickness less than the first thickness at the pad area of the substrate, exposes a first portion of the inorganic insulation layer on the drain electrode, and exposes a second portion of the inorganic insulation layer on the pad electrode; removing the first portion of the inorganic insulation layer and the second portion of the inorganic insulation layer; and partially removing the organic insulation member.

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

Abstract: A transistor array panel is manufactured by a method that reduces or obviates the need for highly selective etching agents or complex processes requiring multiple photomasks to create contact holes. The panel includes: a substrate; a buffer layer positioned on the substrate; a semiconductor layer positioned on the buffer layer; an intermediate insulating layer positioned on the semiconductor layer; and an upper conductive layer positioned on the intermediate insulating layer, wherein the semiconductor layer includes a first contact hole, the intermediate insulating layer includes a second contact hole positioned in an overlapping relationship with the first contact hole, and the upper conductive layer is in contact with a side surface of the semiconductor layer in the first contact hole.

Abstract: An organic light-emitting diode display device includes a pixel electrode, a pixel-defining layer, an organic emission layer, and a counter electrode. The pixel-defining layer includes an opening partially exposing the pixel electrode. The organic emission layer is disposed on the pixel electrode. The organic emission layer is disposed in the opening. The counter electrode is disposed on the organic emission layer. The counter electrode opposes the pixel electrode. The pixel-defining layer includes a first pixel-defining layer and a second pixel-defining layer. The first pixel-defining layer is disposed on the pixel electrode and includes an inorganic material. The second pixel-defining layer is disposed on the first pixel-defining layer and includes an organic material. A sidewall of the first pixel-defining layer that is closest to the opening is aligned with a sidewall of the second pixel-defining layer that is closest to the opening.

Abstract: A display device includes: a substrate; first and second transistors provided on the substrate to be spaced apart from each other, the first and second transistors being electrically connected to each other; and a display unit electrically connected to the first transistor, wherein the first transistor includes a first semiconductor layer including crystalline silicon, a first gate electrode, a first source electrode, and a first drain electrode, wherein the second transistor includes a second semiconductor layer including an oxide semiconductor, a second gate electrode, a second source electrode, and a second drain electrode, wherein each of the second source electrode and the second drain electrode includes a first layer that includes molybdenum and is provided on the second semiconductor layer, a second layer that includes aluminum and is provided on the first layer, and a third layer that includes titanium and is provided on the second layer.

Abstract: A transistor array panel is manufactured by a method that reduces or obviates the need for highly selective etching agents or complex processes requiring multiple photomasks to create contact holes. The panel includes: a substrate; a buffer layer positioned on the substrate; a semiconductor layer positioned on the buffer layer; an intermediate insulating layer positioned on the semiconductor layer; and an upper conductive layer positioned on the intermediate insulating layer, wherein the semiconductor layer includes a first contact hole, the intermediate insulating layer includes a second contact hole positioned in an overlapping relationship with the first contact hole, and the upper conductive layer is in contact with a side surface of the semiconductor layer in the first contact hole.