Patents by Inventor Gab Kim

Gab Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200243638
    Abstract: A conductive line for a display device may include a first layer including aluminum (Al) or an aluminum alloy, a second layer disposed on the first layer, the second layer including titanium nitride (TiNx), and a third layer disposed on the second layer, the third layer including titanium (Ti) and having a multilayer structure including a plurality of stacked sub-layers.
    Type: Application
    Filed: December 19, 2019
    Publication date: July 30, 2020
    Inventors: Sukyoung YANG, Sangwoo SOHN, Dokeun SONG, Dongmin LEE, Sangwon SHIN, Hyuneok SHIN, Kyeong Su KO, Sang Gab KIM, Joongeol LEE
  • Publication number: 20200240703
    Abstract: The present disclosure relates to an external member for home appliances and a manufacturing method therefor. The external member has through-holes in a metal layer for transmitting light emitted from a light source, such as a light-emitting device mounted rear of the external member, are not exposed to the outside by a film layer attached to a front surface of the metal layer when the light-emitting device is turned off. The external member for home appliances can provides appearance of home appliances with improved luxuriousness and aesthetic sensibility.
    Type: Application
    Filed: April 14, 2020
    Publication date: July 30, 2020
    Inventors: Sung Gab KIM, So Hee BAK, Ja Hun KOO, Youngwoo KIM, Pojin KIM, Byungchun MOON, Kuhyeong LEE, Hye Sun JUNG
  • Publication number: 20200235196
    Abstract: Provided is a display device. The display device includes: a substrate; a gate line disposed on the substrate; a transistor including a part of the gate line; and a light-emitting element connected to the transistor, in which the gate line includes a first layer including aluminum or an aluminum alloy, a second layer including titanium nitride, and a third layer including metallic titanium nitride. An N/Ti molar ratio of the metallic titanium nitride may be in a range from about 0.2 to about 0.75.
    Type: Application
    Filed: December 5, 2019
    Publication date: July 23, 2020
    Inventors: Dong Min LEE, Sang Woo SOHN, Do Keun SONG, Sang Won SHIN, Hyun Eok SHIN, Su Kyoung YANG, Kyeong Su KO, Sang Gab KIM, Joon Geol LEE
  • Patent number: 10672799
    Abstract: A display device may include a substrate, an active pattern layer, a gate insulating layer, a first metal pattern layer, an interlayer insulating layer, a second metal pattern layer, and a passivation film. The active pattern layer may be disposed on the substrate. The gate insulating layer may be disposed on the active pattern layer. The first metal pattern layer may be disposed on the gate insulating layer. The interlayer insulating layer may be disposed on the first metal pattern layer. The second metal pattern layer may be disposed on the interlayer insulating layer. The passivation film may be disposed on the side wall of the second metal pattern layer.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: June 2, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yu Gwang Jeong, Su Bin Bae, Hyun Min Cho, Sang Gab Kim
  • Publication number: 20200168684
    Abstract: A method of manufacturing a display substrate may include the following steps: forming a drain electrode on a pixel area of a substrate; forming a pad electrode on a pad area of the substrate; forming an inorganic insulation layer that covers the drain electrode and the pad electrode; forming an organic insulation member that has a first thickness at the pixel area of the substrate, has a second thickness less than the first thickness at the pad area of the substrate, exposes a first portion of the inorganic insulation layer on the drain electrode, and exposes a second portion of the inorganic insulation layer on the pad electrode; removing the first portion of the inorganic insulation layer and the second portion of the inorganic insulation layer; and partially removing the organic insulation member.
    Type: Application
    Filed: November 12, 2019
    Publication date: May 28, 2020
    Inventors: Sang Gab KIM, Hyunmin CHO, Taesung KIM, Subin BAE, Yu-Gwang JEONG, Jinseock KIM
  • Patent number: 10641542
    Abstract: The present disclosure describes an external member for home appliances and a manufacturing method therefor. The external member includes a metal layer that defines through-holes for transmitting light emitted from a light source including a light-emitting device mounted on a rear surface of the metal layer. The through-holes are not exposed to an outside by a film layer attached to a front surface of the metal layer when the light-emitting device is turned off. The external member for home appliances provides improved luxuriousness and aesthetic sensibility to the home appliances.
    Type: Grant
    Filed: September 6, 2016
    Date of Patent: May 5, 2020
    Assignee: LG Electronics Inc.
    Inventors: Sung Gab Kim, So Hee Bak, Ja Hun Koo, Youngwoo Kim, Pojin Kim, Byungchun Moon, Kuhyeong Lee, Hye Sun Jung
  • Publication number: 20200091393
    Abstract: A light emitting diode device includes a thin film transistor substrate having a plurality of light emitting areas, a first diode electrode and a second diode electrode on the thin film transistor substrate, a first passivation pattern between the first diode electrode and the second diode electrode, a plurality of micro light emitting diodes on the first passivation pattern, a first bridge pattern on the micro light emitting diodes and electrically connecting the first diode electrode to the micro light emitting diodes, and a second bridge pattern on the first bridge pattern and electrically connecting the second diode electrode to the micro light emitting diodes, wherein each sidewall of each of the micro light emitting diodes and each sidewall of the first passivation pattern form a same plane.
    Type: Application
    Filed: November 21, 2019
    Publication date: March 19, 2020
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Su Bin BAE, Yu Gwang JEONG, Shin Il CHOI, Joon Geol LEE, Sang Gab KIM
  • Publication number: 20200075707
    Abstract: An OLED display according to an exemplary embodiment includes: a substrate; a gate insulation layer that is disposed on the substrate; and a gate wire that is disposed on the gate insulation layer, and includes a gate electrode, wherein the gate wire includes a single layer of aluminum or an aluminum alloy, and an angle formed by side surfaces of the gate wire and the gate insulation layer is less than 65°.
    Type: Application
    Filed: May 13, 2019
    Publication date: March 5, 2020
    Inventors: Kyeong Su KO, Joon Geol LEE, Shin Il CHOI, Sang Gab KIM, Hyun Min CHO, Hyun Eok SHIN
  • Publication number: 20200058727
    Abstract: An manufacturing method of a display device may include the following steps: forming a transistor on a substrate; forming an insulating layer on the transistor; forming a conductive layer including silver on the insulating layer; forming a photosensitive member on the conductive layer; forming an electrode of a light-emitting element by etching the conductive layer; performing plasma treatment on a structure that comprises the electrode, the plasma treatment using a gas including a halogen; and removing a product that is resulted from the plasma treatment.
    Type: Application
    Filed: July 24, 2019
    Publication date: February 20, 2020
    Inventors: Sang Gab KIM, Hyun Min CHO, Tae Sung KIM, Yu-Gwang JEONG, Su Bin BAE, Jin Seock KIM, Sang Gyun KIM, Hyo Min KO, Kil Won CHO, Han Sol LEE
  • Patent number: 10558078
    Abstract: A polarizing layer includes a substrate and a plurality of parallel wires disposed on the substrate. Each of the plurality of wires includes a base layer disposed on the substrate and an anti-reflective layer disposed on the base layer. The base layer includes aluminum or an aluminum alloy. The anti-reflective layer has a thickness within a range of 12 nm to 40 nm.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: February 11, 2020
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Seung In Baek, Hyun Eok Shin, Su Jin Choi, Sang Gab Kim, Ji Hun Kim, Hyeon Hwan Kim, Jung Gun Nam, Young Eun Park, Joon Yong Park, Jin Ho Park, Gyung Min Baek, Yun Jong Yeo, Gug Rae Jo, Hyun Ji Ha, Youn Ho Han
  • Publication number: 20200043998
    Abstract: An organic light-emitting diode display device includes a pixel electrode, a pixel-defining layer, an organic emission layer, and a counter electrode. The pixel-defining layer includes an opening partially exposing the pixel electrode. The organic emission layer is disposed on the pixel electrode. The organic emission layer is disposed in the opening. The counter electrode is disposed on the organic emission layer. The counter electrode opposes the pixel electrode. The pixel-defining layer includes a first pixel-defining layer and a second pixel-defining layer. The first pixel-defining layer is disposed on the pixel electrode and includes an inorganic material. The second pixel-defining layer is disposed on the first pixel-defining layer and includes an organic material. A sidewall of the first pixel-defining layer that is closest to the opening is aligned with a sidewall of the second pixel-defining layer that is closest to the opening.
    Type: Application
    Filed: April 3, 2019
    Publication date: February 6, 2020
    Inventors: Dae Won Choi, Tae Wook Kang, Kyeong Su Ko, Sang Gab Kim, Tae Sung Kim, Joon Geol Lee, Hyun Min Cho
  • Patent number: 10490537
    Abstract: A light emitting diode device includes a thin film transistor substrate having a plurality of light emitting areas, a first diode electrode and a second diode electrode on the thin film transistor substrate, a first passivation pattern between the first diode electrode and the second diode electrode, a plurality of micro light emitting diodes on the first passivation pattern, a first bridge pattern on the micro light emitting diodes and electrically connecting the first diode electrode to the micro light emitting diodes, and a second bridge pattern on the first bridge pattern and electrically connecting the second diode electrode to the micro light emitting diodes, wherein each sidewall of each of the micro light emitting diodes and each sidewall of the first passivation pattern form a same plane.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: November 26, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Su Bin Bae, Yu Gwang Jeong, Shin Il Choi, Joon Geol Lee, Sang Gab Kim
  • Publication number: 20190355791
    Abstract: An OLED display device includes a substrate including a display region and a pad region, a display structure in the display region on the substrate, and a pad electrode structure in the pad region on the substrate, the pad electrode structure having a first pad electrode on the substrate, a first insulation layer covering opposite lateral portions of the first pad electrode and exposing a portion of an upper surface of the first pad electrode, a second pad electrode on the first pad electrode and on the first insulation layer, the second pad electrode having a step portion where the first pad electrode and the first insulation layer are overlapped, and a third pad electrode on the second pad electrode and on the first insulation layer, the third electrode covering the second pad electrode.
    Type: Application
    Filed: August 2, 2019
    Publication date: November 21, 2019
    Inventors: Jin-Seock KIM, Jong-Hee PARK, Bong-Won LEE, Seung-Bae KANG, Sang-Gab KIM, Jeong-Min PARK, Hyun-Eok SHIN
  • Publication number: 20190348297
    Abstract: A connecting structure of a conductive layer includes a first conductive layer, a first insulating layer disposed on the first conductive layer and including a first opening overlapping the first conductive layer, a connecting conductor disposed on the first insulating layer and connected to the first conductive layer through the first opening, an insulator island disposed on the connecting conductor, a second insulating layer disposed on the first insulating layer and including a second opening overlapping the connecting conductor and the insulator island, and a second conductive layer disposed on the second insulating layer and connected to a connecting electrode through the second opening. A sum of a thickness of the first insulating layer and a thickness of the second insulating layer is greater than or equal to 1 ?m, and each of the thicknesses of the first and second insulating layers is less than 1 ?m.
    Type: Application
    Filed: March 8, 2019
    Publication date: November 14, 2019
    Inventors: SU BIN BAE, YU-GWANG JEONG, SHIN IL CHOI, SANG GAB KIM, JOON GEOL LEE
  • Publication number: 20190312147
    Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
    Type: Application
    Filed: December 24, 2018
    Publication date: October 10, 2019
    Inventors: Yong Su Lee, Yoon Ho Khang, Dong Jo Kim, Hyun Jae Na, Sang Ho Park, Se Hwan Yu, Chong Sup Chang, Dae Ho Kim, Jae Neung Kim, Myoung Geun Cha, Sang Gab Kim, Yu-Gwang Jeong
  • Publication number: 20190280067
    Abstract: A display device and a method for manufacturing a display device, the device including a semiconductor layer on a substrate; a gate insulation layer and an interlayer insulation layer that overlap the semiconductor layer; contact holes that penetrate the gate insulation layer and the interlayer insulation layer; a source electrode and a drain electrode that are electrically connected with the semiconductor layer through the contact holes; a light emitting diode that is connected with the drain electrode; and first spacers and second spacers between the source electrode and the interlayer insulation layer and between the drain electrode and the interlayer insulation layer in the contact holes.
    Type: Application
    Filed: January 29, 2019
    Publication date: September 12, 2019
    Inventors: Yu-Gwang JEONG, Su Bin BAE, Joon Geol LEE, Sang Gab KIM, Shin Il CHOI
  • Patent number: 10381418
    Abstract: An OLED display device includes a substrate including a display region and a pad region, a display structure in the display region on the substrate, and a pad electrode structure in the pad region on the substrate, the pad electrode structure having a first pad electrode on the substrate, a first insulation layer covering opposite lateral portions of the first pad electrode and exposing a portion of an upper surface of the first pad electrode, a second pad electrode on the first pad electrode and on the first insulation layer, the second pad electrode having a step portion where the first pad electrode and the first insulation layer are overlapped, and a third pad electrode on the second pad electrode and on the first insulation layer, the third electrode covering the second pad electrode.
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: August 13, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jin-Seock Kim, Jong-Hee Park, Bong-Won Lee, Seung-Bae Kang, Sang-Gab Kim, Jeong-Min Park, Hyun-Eok Shin
  • Publication number: 20190172819
    Abstract: A light emitting diode device includes a thin film transistor substrate having a plurality of light emitting areas, a first diode electrode and a second diode electrode on the thin film transistor substrate, a first passivation pattern between the first diode electrode and the second diode electrode, a plurality of micro light emitting diodes on the first passivation pattern, a first bridge pattern on the micro light emitting diodes and electrically connecting the first diode electrode to the micro light emitting diodes, and a second bridge pattern on the first bridge pattern and electrically connecting the second diode electrode to the micro light emitting diodes, wherein each sidewall of each of the micro light emitting diodes and each sidewall of the first passivation pattern form a same plane.
    Type: Application
    Filed: July 5, 2018
    Publication date: June 6, 2019
    Inventors: Su Bin BAE, Yu Gwang JEONG, Shin Il CHOI, Joon Geol LEE, Sang Gab KIM
  • Publication number: 20190165083
    Abstract: A conductive pattern for a display device includes a first layer including aluminum or an aluminum alloy disposed on a substrate and forming a first taper angle with the substrate, and a second layer disposed on the first layer forming a second taper angle with the first layer, in which the second taper angle is smaller than the first taper angle.
    Type: Application
    Filed: October 19, 2018
    Publication date: May 30, 2019
    Inventors: Joon Geol LEE, Kyeong Su KO, Sang Won SHIN, Dong Min LEE, Sang Gab KIM, Sang Woo SOHN, Hyun Eok SHIN, Shin Il CHOI
  • Publication number: 20190123065
    Abstract: A transistor array panel is manufactured by a method that reduces or obviates the need for highly selective etching agents or complex processes requiring multiple photomasks to create contact holes. The panel includes: a substrate; a buffer layer positioned on the substrate; a semiconductor layer positioned on the buffer layer; an intermediate insulating layer positioned on the semiconductor layer; and an upper conductive layer positioned on the intermediate insulating layer, wherein the semiconductor layer includes a first contact hole, the intermediate insulating layer includes a second contact hole positioned in an overlapping relationship with the first contact hole, and the upper conductive layer is in contact with a side surface of the semiconductor layer in the first contact hole.
    Type: Application
    Filed: December 10, 2018
    Publication date: April 25, 2019
    Inventors: Yu-Gwang JEONG, Hyun Min CHO, Su Bin BAE, Shin II CHOI, Sang Gab KIM