Patents by Inventor Gang Chen

Gang Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220367193
    Abstract: An embodiment includes a method including forming an opening in a cut metal gate region of a metal gate structure of a semiconductor device, conformally depositing a first dielectric layer in the opening, conformally depositing a silicon layer over the first dielectric layer, performing an oxidation process on the silicon layer to form a first silicon oxide layer, filling the opening with a second silicon oxide layer, performing a chemical mechanical polishing on the second silicon oxide layer and the first dielectric layer to form a cut metal gate plug, the chemical mechanical polishing exposing the metal gate structure of the semiconductor device, and forming a first contact to a first portion of the metal gate structure and a second contact to a second portion of the metal gate structure, the first portion and the second portion of the metal gate structure being separated by the cut metal gate plug.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 17, 2022
    Inventors: Ya-Lan Chang, Ting-Gang Chen, Tai-Chun Huang, Chi On Chui, Yung-Cheng Lu
  • Patent number: 11497822
    Abstract: Provided herein are radiopharmaceutical compositions and uses thereof. The radiopharmaceutical compositions can comprise one or more stabilizing agents, an aqueous vehicle, and a conjugate that comprises a targeting ligand and a radionuclide bound to a metal chelator. The targeting ligand can be a small molecule compound or a peptide such as a monocyclic peptide. The targeting ligand can be configured to bind with a tumor target. The stabilizing agent can comprise a radiolysis stabilizer, a free metal chelator, and/or a pH stabilizer. Further provided herein are methods of preparing the radiopharmaceutical compositions and methods of treating cancer by administering the described radiopharmaceutical compositions.
    Type: Grant
    Filed: July 6, 2022
    Date of Patent: November 15, 2022
    Assignee: RAYZEBIO, INC.
    Inventors: Daniel Kim, Gang Chen, Ken Song, Matthew Moran, Susan Arangio
  • Patent number: 11498110
    Abstract: A fine blanking device and method for forming a friction plate with friction material layers. The fine blanking device includes an upper die, a lower die, a guide mechanism, a punch and a counter punch. Upper and lower blank holders are respectively provided at outer circumferences of the punch and the counter punch. The upper and lower blank holders are respectively provided with a buffer mechanism. Friction material powders are sintered on both sides of the base sheet. The friction material layers are trimmed and planished by hot pressing. The base sheet with the friction material layers is fixed by the upper blank holder and the lower blank holder. A tooth profile with an absolute shear fractural surface is formed. The fixing indentation of the V-shaped structure of the friction material layers is cut off for obtaining a finished friction plate product with the friction material layers.
    Type: Grant
    Filed: August 9, 2020
    Date of Patent: November 15, 2022
    Assignees: Southwest Technology and Engineering Research Institute, Harbin Institute of Technology at Weihai
    Inventors: Qiang Chen, Gang Chen, Xusheng Chang, Hongming Zhang, Dayu Shu, Hong Zhan, Lin Xiang, Yunliang Xiang, Yan Tang
  • Publication number: 20220359206
    Abstract: A gate stack can be etched to form a trench extending through the gate stack, the trench removing a portion of the gate stack to separate the gate stack into a first gate stack portion and a second gate stack portion. A dielectric material is deposited in the trench to form a dielectric region, the dielectric region having an air gap in the dielectric material. The air gap may extend upward from beneath the gate stack to an area interposed between the end of the first gate stack portion and the end of the second gate stack portion. Contacts to the first gate stack portion and contacts to the second gate stack portion may be formed which are electrically isolated from each other by the dielectric material and air gap formed therein.
    Type: Application
    Filed: July 25, 2022
    Publication date: November 10, 2022
    Inventors: Ting-Gang Chen, Wan-Hsien Lin, Chieh-Ping Wang, Tai-Chun Huang, Chi On Chui
  • Publication number: 20220359515
    Abstract: A semiconductor device includes a plurality of semiconductor fins, at least one gate stack, a refill isolation, and an air gap. Each of the semiconductor fins extends in an X direction. Two adjacent ones of the semiconductor fins are spaced apart from each other in a Y direction transverse to the X direction. The at least one gate stack has two stack sections spaced apart from each other in the Y direction. The stack sections are disposed over two adjacent ones of the semiconductor fins, respectively. The refill isolation and the air gap are disposed between the stack sections.
    Type: Application
    Filed: May 6, 2021
    Publication date: November 10, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Pei-Yu CHOU, Yi-Ting FU, Ting-Gang CHEN, Tze-Liang LEE
  • Publication number: 20220356230
    Abstract: The present disclosure provides antibodies and antigen-binding fragments thereof that bind specifically to a coronavirus spike protein and methods of using such antibodies and fragments for treating or preventing viral infections (e.g., coronavirus infections).
    Type: Application
    Filed: March 19, 2021
    Publication date: November 10, 2022
    Inventors: Robert Babb, Alina BAUM, Gang CHEN, Cindy GERSON, Johanna HANSEN, Tammy HUANG, Christos KYRATSOUS, Wen-Yi LEE, Marine MALBEC, Andrew MURPHY, William OLSON, Neil STAHL, George D. YANCOPOULOS
  • Publication number: 20220355267
    Abstract: Provided is a preparation method and use method of a material for deep purification of HF electronic gas. A metal fluoride-loaded activated carbon material AC/MFx.nH20 is prepared, and a mixed gas flow of carbonyl fluoride and high-purity nitrogen is used to deeply dehydrate the material to obtain the material for deep purification of HF electronic gas AC/MFx. This kind of material has fluoride that can form crystal water to form hydrated metal fluoride, and has strong water absorption properties. Moreover, the anhydrous fluoride and activated carbon do not have to face the problem of being corroded by HF, and the collapse of framework structure and the secondary pollution to HF from reaction products would not be caused. The material has the advantages of high purity and extremely low moisture content when being used for efficiently removing moisture in HF.
    Type: Application
    Filed: April 14, 2021
    Publication date: November 10, 2022
    Inventors: Xiangrong YE, Liyang ZHOU, Gang CHEN, Huilong HE, Xueliang ZHANG, Jun LI, Jingsen ZHOU, Yunfeng ZHANG
  • Patent number: 11495464
    Abstract: An embodiment includes a method including forming an opening in a cut metal gate region of a metal gate structure of a semiconductor device, conformally depositing a first dielectric layer in the opening, conformally depositing a silicon layer over the first dielectric layer, performing an oxidation process on the silicon layer to form a first silicon oxide layer, filling the opening with a second silicon oxide layer, performing a chemical mechanical polishing on the second silicon oxide layer and the first dielectric layer to form a cut metal gate plug, the chemical mechanical polishing exposing the metal gate structure of the semiconductor device, and forming a first contact to a first portion of the metal gate structure and a second contact to a second portion of the metal gate structure, the first portion and the second portion of the metal gate structure being separated by the cut metal gate plug.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: November 8, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ya-Lan Chang, Ting-Gang Chen, Tai-Chun Huang, Chi On Chui, Yung-Cheng Lu
  • Patent number: 11496837
    Abstract: A low distortion flat diaphragm provided with a diaphragm. A periphery of the diaphragm is defined as a fixing region and a middle portion thereof is defined as a vibrating region. The diaphragm is provided with an electric transduction coil located in the vibrating region, and a coil terminal and coil locating and wiring located in the fixing region. The diaphragm is further provided with a mass balancing line that makes a mass center of the vibrating region be matched with a mechanical center. The diaphragm is further provided with two brim compliant balancing lines. The brim compliant balancing lines and fan-out lines are symmetrically arranged in an X shape relative to a center axis of the diaphragm. The utility model eliminates cutting oscillation and sound distortion generated by unbalanced distribution of mass of the diaphragm effectively in a locating and wiring way of improving the electric transduction coil.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: November 8, 2022
    Inventor: Gang Chen
  • Publication number: 20220352220
    Abstract: An image sensor comprises a first photodiode region and circuitry. The first photodiode region is disposed within a semiconductor substrate proximate to a first side of the semiconductor substrate to form a first pixel. The first photodiode region includes a first segment coupled to a second segment. The circuitry includes at least a first electrode associated with a first transistor. The first electrode is disposed, at least in part, between the first segment and the second segment of the first photodiode region such that the circuity is at least partially surrounded by the first photodiode region when viewed from the first side of the semiconductor substrate.
    Type: Application
    Filed: April 28, 2021
    Publication date: November 3, 2022
    Inventors: Hui Zang, Yuanliang Liu, Keiji Mabuchi, Gang Chen, Bill Phan, Duli Mao, Takeshi Takeda
  • Patent number: 11489080
    Abstract: The disclosure provides a passivated contact structure and a solar cell including the same, a cell assembly and a photovoltaic system. The passivated contact structure includes a first passivated contact region on a silicon substrate and a second passivated contact region on the first passivated contact region. The second passivated contact region has an opening connecting a conductive layer to the first passivated contact region. The first passivated contact region includes a first doped layer, a first passivation layer and a second doped layer. The second passivated contact region includes a second passivation layer and a third doped layer. The first passivation layer is a porous structure inlaid with the first doped layer and/or the second doped layer in a hole region. Utilizing the passivated contact structure provided in this invention, mitigates the serious recombination caused by metal directly contacting with silicon substrate.
    Type: Grant
    Filed: October 24, 2021
    Date of Patent: November 1, 2022
    Assignee: SOLARLAB AIKO EUROPE GMBH
    Inventors: Gang Chen, Wenli Xu, Kaifu Qiu, Yongqian Wang, Xinqiang Yang
  • Patent number: 11482632
    Abstract: A back contact solar cell string includes at least two cell pieces, each cell piece including P-type doped regions and N-type doped regions that are alternately arranged, the P-type doped regions including positive electrode thin grid lines, and the N-type doped regions including negative electrode thin grid lines; and a plurality of conductive wires connected to the positive electrode thin grid lines and the negative electrode thin grid lines. The conductive regions configured for electrical connection between each conductive wire and the positive electrode thin grid lines or the negative electrode thin grid lines and insulation regions configured for insulating connection between each conductive wire and the negative electrode thin grid lines or the positive electrode thin grid lines are alternately disposed at joints between each conductive wire and the positive electrode thin grid lines, and at joints between each conductive wire and the negative electrode thin grid lines.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: October 25, 2022
    Assignees: Zhejiang Aiko Solar Energy Technology Co., Ltd., Guangdong Aiko Solar Energy Technology Co., Ltd., Tianjin Aiko Solar Energy Technology Co., Ltd.
    Inventors: Wei Dai, Gang Chen
  • Publication number: 20220332713
    Abstract: Fused compounds of Formula (I) and Formula (II), pharmaceutical compositions containing them, methods of making them, and methods of using them including methods for treating disease states, disorders, and conditions associated with MGL modulation, such as those associated with pain, psychiatric disorders, neurological disorders (including, but not limited to major depressive disorder, treatment resistant depression, anxious depression, bipolar disorder), cancers and eye conditions. Wherein R1, R2, R2a, R3, R3a, R4, and R4a are defined herein.
    Type: Application
    Filed: December 23, 2020
    Publication date: October 20, 2022
    Inventors: Michael K. Ameriks, Gang Chen, Chaofeng Huang, Brian Ngo Laforteza, Suchitra Ravula, Emma Helen Southgate, Wei Zhang
  • Patent number: 11470973
    Abstract: A sidekick stool is provided, including a frame body, including at least two support portions which are spacingly arranged; a seat body, being disposed on the at least two support portions; and a rail assembly, fixed to the seat body for a receiving unit to slide therein.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: October 18, 2022
    Inventors: Jianyong Yu, Gang Chen
  • Patent number: 11476290
    Abstract: An image sensor includes photodiodes disposed in a pixel region and proximate to a front side of a semiconductor layer. A backside metal grating is formed in a backside oxide layer disposed proximate to a backside of the semiconductor layer. A deep trench isolation (DTI) structure with a plurality of pixel region portions and an edge region portion is formed in the semiconductor layer. The pixel region portions are disposed in the pixel region of the semiconductor layer such that incident light is directed through the backside metal grating, through the backside of the semiconductor layer, and between the pixel region portions of the DTI structure to the photodiodes. The edge region portion of the DTI structure is disposed in an edge region outside of the pixel region. The edge region portion of the DTI structure is biased with a DTI bias voltage.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: October 18, 2022
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hui Zang, Gang Chen, Kenny Geng
  • Publication number: 20220328545
    Abstract: A pixel circuit includes a photodiode and a floating diffusion disposed in a semiconductor substrate. A transfer gate is disposed between the photodiode and the floating diffusion to transfer photogenerated image charge from the photodiode to the floating diffusion. A dual floating diffusion (DFD) transistor is coupled between the floating diffusion and a DFD capacitor. The DFD transistor includes a DFD gate that includes a planar gate portion disposed over a surface of the semiconductor substrate and a vertical gate portion that extends vertically from the planar gate portion into the semiconductor substrate. The vertical gate portion of the DFD gate is configured to increase a gate to substrate coupling capacitance of the DFD transistor. The gate to substrate coupling capacitance and the DFD capacitor are coupled to increase an effective capacitance associated with the floating diffusion in response to the DFD transistor being turned on.
    Type: Application
    Filed: April 13, 2021
    Publication date: October 13, 2022
    Inventors: Hui Zang, Gang Chen
  • Publication number: 20220320162
    Abstract: A pixel-array substrate includes (i) a semiconductor substrate including a photodiode region and a floating diffusion region, and (ii) a vertical-transfer-gate structure that includes a trench and a gate electrode. The trench is defined by a bottom surface and a sidewall surface of the substrate each located between a front substrate-surface and a back substrate-surface thereof. The trench extends into the substrate. In a cross-sectional plane perpendicular to the front substrate-surface and intersecting the floating diffusion region, the photodiode region, and the sidewall surface, (a) the trench is located between the floating diffusion region and the photodiode region, and (b) a top section of the sidewall surface is adjacent to the floating diffusion region. A gate electrode partially fills the trench such that the top section and a conductive-surface of the gate electrode in-part define a recess located between the floating diffusion region and the gate electrode.
    Type: Application
    Filed: April 1, 2021
    Publication date: October 6, 2022
    Inventors: Hui ZANG, Gang CHEN
  • Publication number: 20220315583
    Abstract: Bridged compounds of Formula (I) and Formula (II), pharmaceutical compositions containing them, methods of making them, and methods of using them including methods for treating disease states, disorders, and conditions associated with MGL modulation, such as those associated with pain, psychiatric disorders, neurological disorders (including, but not limited to major depressive disorder, treatment resistant depression, anxious depression, bipolar disorder), cancers and eye conditions. wherein R2, R3 R4, R5 and R6 are defined herein.
    Type: Application
    Filed: December 23, 2020
    Publication date: October 6, 2022
    Inventors: Michael K. Ameriks, Gang Chen, Chaofeng Huang, Brian Ngo Laforteza, Suchitra Ravula, Wei Zhang
  • Publication number: 20220320175
    Abstract: An uneven-trench pixel cell includes a semiconductor substrate that includes a floating diffusion region, a photodiode region, and, between a front surface and a back surface: a first sidewall surface, a shallow bottom surface, a second sidewall surface, and a deep bottom surface. The first sidewall surface and a shallow bottom surface define a shallow trench, located between the floating diffusion region and the photodiode region, that extends into the semiconductor substrate from the front surface. A shallow depth of the shallow trench exceeds a junction depth of the floating diffusion region. The second sidewall surface and a deep bottom surface define a deep trench, located between the floating diffusion region and the photodiode region, that extends into the semiconductor substrate from the front surface. A distance between the deep bottom surface and the front surface defines a deep depth, of the deep trench, that exceeds the shallow depth.
    Type: Application
    Filed: April 1, 2021
    Publication date: October 6, 2022
    Inventors: Hui ZANG, Gang CHEN
  • Patent number: 11462579
    Abstract: A method for forming a transfer gate includes (i) forming a dielectric pillar on a surface of a semiconductor substrate and (ii) growing an epitaxial layer on the semiconductor substrate and surrounding the dielectric pillar. The dielectric pillar has a pillar height that exceeds an epitaxial-layer height of the epitaxial layer relative to the surface. The method also includes removing the dielectric pillar to yield a trench in the epitaxial layer. A pixel includes a doped semiconductor substrate having a front surface opposite a back surface. The front surface forms a trench extending a depth zT with respect to the front surface within the doped semiconductor substrate along a direction z perpendicular to the front surface and the back surface. The pixel has a dopant concentration profile, a derivative thereof with respect to direction z being discontinuous at depth zT.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: October 4, 2022
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hui Zang, Gang Chen