Patents by Inventor Geordie Rose

Geordie Rose has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220324113
    Abstract: In a method of operation of a robot, the robot identifies a set of candidate actions that may be performed by the robot, and collects, for each candidate action of the set of candidate actions, a respective set of ancillary data. The robot transmits a request for instructions to a tele-operation system that is communicatively coupled to the robot. The request for instructions includes each candidate action and each respective set of ancillary data. The robot receives, and executes, the instructions from the tele-operation system. The robot updates a control model, based at least in part on each candidate action, each respective set of ancillary data, and the instructions, to increase a level of autonomy of the robot. The robot may transmit the request for instructions to the tele-operation system in response to determining the robot is unable to select a candidate action to perform in furtherance of an objective.
    Type: Application
    Filed: April 12, 2022
    Publication date: October 13, 2022
    Inventor: Geordie Rose
  • Publication number: 20220324114
    Abstract: In a method of operation of a robot, the robot identifies a set of candidate actions that may be performed by the robot, and collects, for each candidate action of the set of candidate actions, a respective set of ancillary data. The robot transmits a request for instructions to a tele-operation system that is communicatively coupled to the robot. The request for instructions includes each candidate action and each respective set of ancillary data. The robot receives, and executes, the instructions from the tele-operation system. The robot updates a control model, based at least in part on each candidate action, each respective set of ancillary data, and the instructions, to increase a level of autonomy of the robot. The robot may transmit the request for instructions to the tele-operation system in response to determining the robot is unable to select a candidate action to perform in furtherance of an objective.
    Type: Application
    Filed: April 12, 2022
    Publication date: October 13, 2022
    Inventor: Geordie Rose
  • Publication number: 20220258340
    Abstract: Systems, devices, and methods for training and operating (semi-)autonomous robots to complete multiple different work objectives are described. A robot control system stores a library of reusable work primitives each corresponding to a respective basic sub-task or sub-action that the robot is operative to autonomously perform. A work objective is analyzed to determine a sequence (i.e., a combination and/or permutation) of reusable work primitives that, when executed by the robot, will complete the work objective. The robot executes the sequence of reusable work primitives to complete the work objective. The reusable work primitives may include one or more reusable grasp primitives that enable(s) a robot's end effector to grasp objects. Simulated instances of real physical robots may be trained in simulated environments to develop control instructions that, once uploaded to the real physical robots, enable such real physical robots to autonomously perform reusable work primitives.
    Type: Application
    Filed: December 30, 2021
    Publication date: August 18, 2022
    Inventors: Suzanne Gildert, Olivia Norton, Geordie Rose
  • Publication number: 20220258341
    Abstract: Systems, devices, and methods for training and operating (semi-)autonomous robots to complete multiple different work objectives are described. A robot control system stores a library of reusable work primitives each corresponding to a respective basic sub-task or sub-action that the robot is operative to autonomously perform. A work objective is analyzed to determine a sequence (i.e., a combination and/or permutation) of reusable work primitives that, when executed by the robot, will complete the work objective. The robot executes the sequence of reusable work primitives to complete the work objective. The reusable work primitives may include one or more reusable grasp primitives that enable(s) a robot's end effector to grasp objects. Simulated instances of real physical robots may be trained in simulated environments to develop control instructions that, once uploaded to the real physical robots, enable such real physical robots to autonomously perform reusable work primitives.
    Type: Application
    Filed: December 30, 2021
    Publication date: August 18, 2022
    Inventors: Suzanne Gildert, Olivia Norton, Geordie Rose
  • Publication number: 20220258342
    Abstract: Systems, devices, and methods for training and operating (semi-)autonomous robots to complete multiple different work objectives are described. A robot control system stores a library of reusable work primitives each corresponding to a respective basic sub-task or sub-action that the robot is operative to autonomously perform. A work objective is analyzed to determine a sequence (i.e., a combination and/or permutation) of reusable work primitives that, when executed by the robot, will complete the work objective. The robot executes the sequence of reusable work primitives to complete the work objective. The reusable work primitives may include one or more reusable grasp primitives that enable(s) a robot's end effector to grasp objects. Simulated instances of real physical robots may be trained in simulated environments to develop control instructions that, once uploaded to the real physical robots, enable such real physical robots to autonomously perform reusable work primitives.
    Type: Application
    Filed: December 30, 2021
    Publication date: August 18, 2022
    Inventors: Suzanne Gildert, Olivia Norton, Geordie Rose
  • Publication number: 20210342289
    Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
    Type: Application
    Filed: June 23, 2021
    Publication date: November 4, 2021
    Inventors: Alexander Maassen van den Brink, Peter Love, Mohammad H.S. Amin, Geordie Rose, David Grant, Miles F.H. Steininger, Paul I. Bunyk, Andrew J. Berkley
  • Patent number: 11093440
    Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: August 17, 2021
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Alexander Maassen van den Brink, Peter Love, Mohammad H. S. Amin, Geordie Rose, David Grant, Miles F. H. Steininger, Paul I. Bunyk, Andrew J. Berkley
  • Patent number: 10991755
    Abstract: Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: April 27, 2021
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Eric Ladizinsky, Geordie Rose, Jeremy P. Hilton, Eugene Dantsker, Byong Hyop Oh
  • Publication number: 20200293486
    Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
    Type: Application
    Filed: April 27, 2020
    Publication date: September 17, 2020
    Inventors: Alexander Maassen van den Brink, Peter Love, Mohammad H.S. Amin, Geordie Rose, David Grant, Miles F.H. Steininger, Paul I. Bunyk, Andrew J. Berkley
  • Patent number: 10691633
    Abstract: Methods and systems for solving various computational problems with quantum processors are provided. Such quantum processors comprise a plurality of quantum devices together with a plurality of coupling devices. The quantum processor is initialized by setting states of the quantum devices and coupling devices and allowed to evolve to a final state which approximates a natural ground state of the computational problem. The final state can include values of nodes arranged in a lattice in the quantum processor and can represent a solution to the computational processor. The computational problem can have complexity P, NP, NP-Hard, or NP-Complete and may be mapped to a quantum processor with nearest-neighbor and next-nearest-neighbor couplings. The solution to the computational problem can be read out from the quantum processor and transmitted as a data signal embodied in a carrier wave.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: June 23, 2020
    Assignee: D-WAVE SYSTEMS, INC.
    Inventors: Alexander Maassen van den Brink, Peter Love, Mohammad H. S. Amin, Geordie Rose, David Grant, Miles F. H. Steininger, Paul I. Bunyk, Andrew J. Berkley
  • Publication number: 20200006421
    Abstract: Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector.
    Type: Application
    Filed: September 12, 2019
    Publication date: January 2, 2020
    Inventors: Eric Ladizinsky, Geordie Rose, Jeremy P. Hilton, Eugene Dantsker, Byong Hyop Oh
  • Patent number: 10467543
    Abstract: Quantum processor based techniques minimize an objective function for example by operating the quantum processor as a sample generator providing low-energy samples from a probability distribution with high probability. The probability distribution is shaped to assign relative probabilities to samples based on their corresponding objective function values until the samples converge on a minimum for the objective function. Problems having a number of variables and/or a connectivity between variables that does not match that of the quantum processor may be solved. Interaction with the quantum processor may be via a digital computer. The digital computer stores a hierarchical stack of software modules to facilitate interacting with the quantum processor via various levels of programming environment, from a machine language level up to an end-use applications level.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: November 5, 2019
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: William G. Macready, Mani Ranjbar, Firas Hamze, Geordie Rose, Suzanne Gildert
  • Publication number: 20190324941
    Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
    Type: Application
    Filed: May 23, 2019
    Publication date: October 24, 2019
    Inventors: Alexander Maassen van den Brink, Peter Love, Mohammad H.S. Amin, Geordie Rose, David Grant, Miles F.H. Steininger, Paul I. Bunyk, Andrew J. Berkley
  • Patent number: 10453894
    Abstract: Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: October 22, 2019
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Eric Ladizinsky, Geordie Rose, Jeremy P. Hilton, Eugene Dantsker, Byong Hyop Oh
  • Patent number: 10346349
    Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: July 9, 2019
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Alexander Maassen van den Brink, Peter Love, Mohammad H. S. Amin, Geordie Rose, David Grant, Miles F. H. Steininger, Paul I. Bunyk, Andrew J. Berkley
  • Patent number: 10318881
    Abstract: Systems, methods and aspects, and embodiments thereof relate to unsupervised or semi-supervised features learning using a quantum processor. To achieve unsupervised or semi-supervised features learning, the quantum processor is programmed to achieve Hierarchal Deep Learning (referred to as HDL) over one or more data sets. Systems and methods search for, parse, and detect maximally repeating patterns in one or more data sets or across data or data sets. Embodiments and aspects regard using sparse coding to detect maximally repeating patterns in or across data. Examples of sparse coding include L0 and L1 sparse coding. Some implementations may involve appending, incorporating or attaching labels to dictionary elements, or constituent elements of one or more dictionaries. There may be a logical association between label and the element labeled such that the process of unsupervised or semi-supervised feature learning spans both the elements and the incorporated, attached or appended label.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: June 11, 2019
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Geordie Rose, Suzanne Gildert, William G. Macready, Dominic Christoph Walliman
  • Publication number: 20190087385
    Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
    Type: Application
    Filed: October 29, 2018
    Publication date: March 21, 2019
    Inventors: Alexander Maassen van den Brink, Peter Love, Mohammad H.S. Amin, Geordie Rose, David Grant, Miles F. H. Steininger, Paul I. Bunyk, Andrew J. Berkley
  • Patent number: 10140248
    Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices. A method of determining a result of a computational problem using an analog processor includes receiving at a first digital computer, including a digital processor, an instance of the computational problem defined over an input graph, wherein the input graph is non-planar; and determining a mapping of the instance of the computational problem onto the analog processor, by the digital processor.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: November 27, 2018
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Alexander Maassen van den Brink, Peter Love, Mohammad H. S. Amin, Geordie Rose, David Grant, Miles F. H. Steininger, Paul I. Bunyk, Andrew J. Berkley
  • Publication number: 20180308896
    Abstract: Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector.
    Type: Application
    Filed: April 18, 2018
    Publication date: October 25, 2018
    Inventors: Eric Ladizinsky, Geordie Rose, Jeremy P. Hilton, Eugene Dantsker, Byong Hyop Oh
  • Patent number: 9978809
    Abstract: Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector.
    Type: Grant
    Filed: October 10, 2016
    Date of Patent: May 22, 2018
    Assignee: D-Wave Systems Inc.
    Inventors: Eric Ladizinsky, Geordie Rose, Jeremy P. Hilton, Eugene Dantsker, Byong Hyop Oh