Patents by Inventor Gerald Deboy

Gerald Deboy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8638129
    Abstract: A power circuit. One embodiment provides a circuit for driving a power transistor having a control electrode and a load path. The circuit includes a driver circuit configured to change the power transistor to a completely on or off state with the aid of a control signal supplied to the control electrode. A series circuit includes a semiconductor switching element and a capacitor. The series circuit is connected in parallel with the load path and the capacitor provides a supply voltage for the driver circuit.
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: January 28, 2014
    Assignee: Infineon Technologies AG
    Inventors: Peter Kanschat, Uwe Jansen, Gerald Deboy
  • Patent number: 8634215
    Abstract: A rectifier circuit with a synchronously controlled semiconductor element. The rectifier circuit includes at least one field effect transistor with a control electrode and two switching electrodes. The control electrode operates the reverse state and the forward state between the switching electrodes. At least one driver, which cooperates with a voltage sensor of the field effect transistor, controls this to the forward state during the diode operating state of the field effect transistor. The voltage sensor includes a sensor output capacitance that forms a non-linear voltage divider with an external reference capacitance.
    Type: Grant
    Filed: March 14, 2012
    Date of Patent: January 21, 2014
    Assignee: Infineon Technologies Austria AG
    Inventor: Gerald Deboy
  • Publication number: 20140016386
    Abstract: A circuit arrangement includes a rectifier circuit having a first and a second load terminal, a first semiconductor device having a load path and a control terminal and a plurality of n, with n>1, second semiconductor devices, each having a load path between a first load terminal and a second load terminal and a control terminal. The second semiconductor devices have their load paths connected in series and connected in series to the load path of the first semiconductor device. The series circuit with the first semiconductor device and the second semiconductor devices are connected between the load terminals of the rectifier circuit. Each of the second semiconductor devices has its control terminal connected to the load terminal of one of the other second semiconductor devices. One of the second semiconductor devices has its control terminal connected to one of the load terminals of the first semiconductor device.
    Type: Application
    Filed: July 11, 2012
    Publication date: January 16, 2014
    Applicant: INFINEON TECHNOLOGIES DRESDEN GMBH
    Inventors: Rolf Weis, Gerald Deboy
  • Publication number: 20140016361
    Abstract: A rectifier circuit includes first and second load terminals, a first semiconductor device having a load path and configured to receive a drive signal, and a plurality of second semiconductor devices each having a load path and each configured to receive a drive signal. The load paths of the second semiconductor devices are connected in series, and connected in series to the load path of the first semiconductor device. A series circuit with the first semiconductor device and the second semiconductor devices is connected between the load terminals. Each of the second semiconductor devices is configured to receive as a drive voltage either a load-path voltage of at least one of the second semiconductor devices, or a load-path of at least the first semiconductor device. The first semiconductor device is configured to receive as a drive voltage a load-path-voltage of at least one of the second semiconductor devices.
    Type: Application
    Filed: March 15, 2013
    Publication date: January 16, 2014
    Inventors: Rolf Weis, Gerald Deboy
  • Patent number: 8569842
    Abstract: A semiconductor device arrangement includes a first semiconductor device having a load path, and a number of second transistors, each having a load path between a first and a second load terminal and a control terminal. The second transistors have their load paths connected in series and connected in series to the load path of the first transistor. Each of the second transistors has its control terminal connected to the load terminal of one of the other second transistors. One of the second transistors has its control terminal connected to one of the load terminals of the first semiconductor device.
    Type: Grant
    Filed: October 17, 2011
    Date of Patent: October 29, 2013
    Assignee: Infineon Technologies Austria AG
    Inventors: Rolf Weis, Franz Hirler, Matthias Stecher, Armin Willmeroth, Gerald Deboy, Martin Feldtkeller
  • Publication number: 20130193525
    Abstract: A semiconductor device arrangement includes a first semiconductor device having a load path and a plurality of second semiconductor devices, each having a load path between a first and a second load terminal and a control terminal. The second semiconductor devices have their load paths connected in series and connected in series to the load path of the first semiconductor device. Each of the second semiconductor devices has its control terminal connected to the load terminal of one of the other second semiconductor devices, and one of the second semiconductor devices has its control terminal connected to one of the load terminals of the first semiconductor device. Each of the second semiconductor devices has at least one device characteristic. At least one device characteristic of at least one of the second semiconductor devices is different from the corresponding device characteristic of others of the second semiconductor devices.
    Type: Application
    Filed: January 31, 2012
    Publication date: August 1, 2013
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Rolf Weis, Gerald Deboy, Michael Treu, Armin Willmeroth, Hans Weber
  • Publication number: 20130187473
    Abstract: A circuit arrangement includes a number of DC power sources. Each DC power source includes a rechargeable battery. The circuit arrangement also includes a number converter units. Each converter unit has input terminals and output terminals. The input terminals are coupled to one DC power source. The converter units form a series circuit between load terminals.
    Type: Application
    Filed: August 30, 2012
    Publication date: July 25, 2013
    Applicant: Infineon Technologies Austria AG
    Inventors: Gerald Deboy, Yi Tang
  • Publication number: 20130181530
    Abstract: A power converter circuit includes output terminals configured to receive an external voltage. A series circuit includes a number of converter units, each including input terminals configured to be coupled to a DC power source and output terminals configured to provide an output current. The series circuit is connected between the output terminals of the power converter circuit. A synchronization circuit is configured to generate a synchronization signal. The power converter circuit can be operated in a normal operation mode. In the normal operation mode, the synchronization circuit is configured to generate the synchronization signal dependent on the external voltage. In the normal operation mode, at least one converter unit of the plurality of converter units is configured to receive the synchronization signal and to regulate a generation of the output current such that a frequency and/or a phase of the output current is dependent on the synchronization signal.
    Type: Application
    Filed: April 5, 2012
    Publication date: July 18, 2013
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Gerald Deboy, Yi Tang
  • Publication number: 20130181531
    Abstract: A power converter circuit includes output terminals configured to receive an external voltage. A series circuit with a number of converter units is connected between the output terminals of the power converter circuit. Each converter unit includes input terminals configured to be coupled to a DC power source and output terminals configured to provide an output current. At least one converter unit of the converter units includes a signal generator configured to receive a synchronization signal and to generate a continuous synchronization signal from the synchronization signal. The power converter circuit can be operated in a normal operation mode. In the normal operation mode, the at least one converter unit is configured to regulate generation of the output current such that a frequency and/or a phase of the output current are dependent on the continuous synchronization signal.
    Type: Application
    Filed: April 5, 2012
    Publication date: July 18, 2013
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Gerald Deboy, Yi Tang
  • Publication number: 20130181529
    Abstract: A power converter circuit includes output terminals configured to receive an external AC voltage. At least one series circuit has at least two converter units. Each converter unit includes input terminals configured to be coupled to a DC power source. Output terminals provide an AC output current. The at least one series circuit is connected between the output terminals of the power converter circuit. A voltage measurement circuit is connected between the output terminals of the power converter circuit and configured to provide at least one measurement signal that includes information related to phase and frequency of the external AC voltage. At least one of the converter units is configured to receive the at least one measurement signal and is configured to regulate the generation of the AC output current dependent on the at least one measurement signal.
    Type: Application
    Filed: January 17, 2012
    Publication date: July 18, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Yi Tang, Gerald Deboy
  • Publication number: 20130147523
    Abstract: One aspect is a circuit having an input configured to receive an input signal, and an actuation output configured to be connected to an actuation terminal of a transistor. A measurement arrangement is configured to ascertain at least one of a load current through a load path of the transistor, and a load voltage across the load path of the transistor and to provide a measurement signal that is dependent on at least one of the load current and the load path voltage. An actuation current source is configured to receive the measurement signal and to provide an actuation current at the actuation output, the actuation current having a current level dependent on the measurement signal.
    Type: Application
    Filed: August 29, 2012
    Publication date: June 13, 2013
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Gerald Deboy, Karl Norling
  • Publication number: 20130106402
    Abstract: An embodiment method of diagnosing a power source arrangement includes a plurality of n power sources connected in series between output terminals, wherein n?2. At least two different groups of power sources are selected from the power source arrangement. A voltage of each of the at least two different groups is measured between the output terminals. During the measurement of the voltage of one group, the power sources of the power source arrangement that do not belong to the one group are bypassed. The at least two measured voltages obtained through measuring the voltage of each of the at least two different groups or at least two voltages that are dependent on these at least two measured voltages are compared.
    Type: Application
    Filed: October 27, 2011
    Publication date: May 2, 2013
    Applicant: Infineon Technologies Austria AG
    Inventor: Gerald Deboy
  • Patent number: 8427207
    Abstract: A semiconductor device arrangement and a method. One embodiment includes at least one power transistor and at least one gate resistor located between a gate of the power transistor and a connecting point in the drive circuit of the power transistor. The semiconductor device arrangement includes a switchable element between the connecting point and a source of the power transistor.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: April 23, 2013
    Assignee: Infineon Technologies AG
    Inventor: Gerald Deboy
  • Patent number: 8421196
    Abstract: A semiconductor device includes a drift zone of a first conductivity type formed within a semiconductor body, wherein one side of opposing sides of the drift zone adjoins a first zone within the semiconductor body and the other side adjoins a second zone within the semiconductor body. First semiconductor subzones of a second conductivity type different from the first conductivity type are formed within each of the first and second zones opposing each other along a lateral direction extending parallel to a surface of the semiconductor body. A second semiconductor subzone is formed within each of the first and second zones and between the first semiconductor subzones along the lateral direction. An average concentration of dopants within the second semiconductor subzone along 10% to 90% of an extension of the second semiconductor subzone along a vertical direction perpendicular to the surface is smaller than the average concentration of dopants along a corresponding section of extension within the drift zone.
    Type: Grant
    Filed: November 25, 2009
    Date of Patent: April 16, 2013
    Assignee: Infineon Technologies Austria AG
    Inventors: Hans Weber, Gerald Deboy
  • Patent number: 8400123
    Abstract: A voltage converter includes input terminals configured to receive an input voltage, and output terminals configured to provide an output voltage and an output current. At least one first converter stage is connected between the input terminals and the output terminals, having at least one unipolar transistor, and configured to provide a first output current. At least one second converter stage is connected between the input terminals and the output terminals, having at least one bipolar transistor, and configured to provide a second output current. A control circuit is configured to control the first output current and the second output current such that there is a first output current range in which the first output current is higher than the second output current.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: March 19, 2013
    Assignee: Infineon Technologies Austria AG
    Inventor: Gerald Deboy
  • Patent number: 8390261
    Abstract: A circuit arrangement, includes output terminals that provide an output current and input terminals that receive a source current and a source voltage from a DC current source. A maximum power point tracker is coupled between the input terminals and the output terminals and a bypass circuit is coupled between the input terminals and the output terminals. The bypass circuit is configured to enter a bypass state dependent on the output current and dependent on the source current. The source current flows through the bypass circuit in the bypass state.
    Type: Grant
    Filed: May 21, 2010
    Date of Patent: March 5, 2013
    Assignee: Infineon Technologies Austria AG
    Inventor: Gerald Deboy
  • Publication number: 20130009700
    Abstract: A power converter circuit includes output terminals, and a plurality of converter units each comprising input terminals configured to be coupled to a DC power source, and output terminals for providing an AC output voltage and an AC output current. The plurality of converter units are connected in series between the output terminals of the power converter circuit. At least one of the converter units is configured to detect its AC output voltage and its AC output current and is configured to regulate a generation of the AC output current such that a phase difference between the AC output voltage and the AC output current corresponds to a given set value.
    Type: Application
    Filed: July 8, 2011
    Publication date: January 10, 2013
    Applicant: Infineon Technologies AG
    Inventors: Gerald Deboy, Roland Bruendlinger, Filip Andrèn, Felix Lehfuss
  • Publication number: 20120306464
    Abstract: Disclosed is a circuit arrangement, including a transistor component with a gate terminal, a control terminal, and a load path between a source and a drain terminal, and a drive circuit connected to the control terminal and configured to determine a load condition of the transistor component, to provide a drive potential to the control terminal, and to adjust the drive potential dependent on the load condition.
    Type: Application
    Filed: May 31, 2011
    Publication date: December 6, 2012
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Franz HIRLER, Martin FELDTKELLER, Gerald DEBOY
  • Patent number: 8299820
    Abstract: A circuit for actuation of a transistor. One embodiment provides an actuation output for connection to the actuation connection of the transistor. A measurement arrangement is provided for ascertaining a load current flowing through the load path or a voltage across the load path and for providing a measurement signal. An actuation current source having an actuation current output is connected to the actuation output and supplied with the measurement signal and designed to produce an actuation current at the actuation current output. The actuation current is at a current level dependent on the measurement signal.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: October 30, 2012
    Assignee: Infineon Technologies Austria AG
    Inventor: Gerald Deboy
  • Publication number: 20120235661
    Abstract: A method for controlling a current between an energy source and a load is disclosed. A switching module is coupled between the energy source and the load. The switching module includes two input terminals coupled to the energy source and two output terminals coupled to the load and at least one semiconductor switching element coupled between one of the input terminals and one of the output terminals. At least one current parameter of the current is measured between the energy source and the load. The current between the energy source and the load is interrupted by switching off the switching element when the at least one current parameter reaches or exceeds at least one predetermined parameter threshold value.
    Type: Application
    Filed: March 15, 2011
    Publication date: September 20, 2012
    Applicant: Infineon Technologies AG
    Inventors: Werner Roessler, Gerald Deboy