Patents by Inventor Gerhard Schrom
Gerhard Schrom has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11755048Abstract: A compensator is described with higher bandwidth than a traditional differential compensator, lower area than traditional differential compensator (e.g., 40% lower area), and lower power than traditional differential compensator. The compensator includes a differential to single-ended circuitry that reduces the number of passive devices used to compensate an input signal. The high bandwidth compensator allows for faster power state and/or voltage transitions. For example, a pre-charge technique is applied to handle faster power state transitions that enables aggressive dynamic voltage and frequency scaling (DVFS) and voltage transitions. The compensator is configurable in that it can operate in voltage mode or current mode.Type: GrantFiled: April 1, 2021Date of Patent: September 12, 2023Assignee: Intel CorporationInventors: Sergio Carlo Rodriguez, Alexander Lyakhov, Gerhard Schrom, Keith Hodgson, Sarath S. Makala, Sidhanto Roy
-
Publication number: 20230280811Abstract: An electronic system includes a circuit board including a power plane. An integrated circuit (e.g., processor) is attached to a first side of the circuit board and is arranged to receive power from the power plane. A plurality of DC-to-DC converters are attached to a second side of the circuit board and are arranged to transfer power to the power plane. Each DC-to-DC converter includes a respective voltage sense input that is electrically connected to a separate location on the power plane. A telemetry circuit is coupled to each of the plurality of DC-to-DC converters and is configured to detect a quantity of power transferred to the common power plane from each of the plurality of power conversion devices.Type: ApplicationFiled: March 2, 2023Publication date: September 7, 2023Applicant: Empower Semiconductor, Inc.Inventors: Trey Roessig, Timothy Alan Phillips, David Lidsky, Gerhard Schrom, Yali Xiong, Artin Der Minassians
-
Patent number: 11193961Abstract: Apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc.Type: GrantFiled: May 4, 2020Date of Patent: December 7, 2021Assignee: Intel CorporationInventors: Gerhard Schrom, J. Keith Hodgson, Alexander Lyakhov, Chiu Keung Tang, Narayanan Raghuraman, Narayanan Natarajan
-
Publication number: 20210223811Abstract: A compensator is described with higher bandwidth than a traditional differential compensator, lower area than traditional differential compensator (e.g., 40% lower area), and lower power than traditional differential compensator. The compensator includes a differential to single-ended circuitry that reduces the number of passive devices used to compensate an input signal. The high bandwidth compensator allows for faster power state and/or voltage transitions. For example, a pre-charge technique is applied to handle faster power state transitions that enables aggressive dynamic voltage and frequency scaling (DVFS) and voltage transitions. The compensator is configurable in that it can operate in voltage mode or current mode.Type: ApplicationFiled: April 1, 2021Publication date: July 22, 2021Applicant: Intel CorporationInventors: Sergio Carlo Rodriguez, Alexander Lyakhov, Gerhard Schrom, Keith Hodgson, Sarath S. Makala, Sidhanto Roy
-
Patent number: 11048284Abstract: Some embodiments include apparatuses and methods of operating such apparatuses. One of the embodiments includes an input node to receive an input voltage, a circuit portion to generate first, second, and third voltages based on the input voltage, a comparator circuit to compare the first voltage with the second voltage to generate a first signal and to compare the first voltage with the third voltage to generate a second signal, and an output circuit to generate an output signal based on the first and second signals.Type: GrantFiled: September 10, 2019Date of Patent: June 29, 2021Assignee: Intel CorporationInventors: Praveen Mosalikanti, Gerhard Schrom, Vaughn J. Grossnickle, Nasser A. Kurd
-
Patent number: 10976764Abstract: A compensator is described with higher bandwidth than a traditional differential compensator, lower area than traditional differential compensator (e.g., 40% lower area), and lower power than traditional differential compensator. The compensator includes a differential to single-ended circuitry that reduces the number of passive devices used to compensate an input signal. The high bandwidth compensator allows for faster power state and/or voltage transitions. For example, a pre-charge technique is applied to handle faster power state transitions that enables aggressive dynamic voltage and frequency scaling (DVFS) and voltage transitions. The compensator is configurable in that it can operate in voltage mode or current mode.Type: GrantFiled: September 18, 2019Date of Patent: April 13, 2021Assignee: Intel CorporationInventors: Sergio Carlo Rodriguez, Alexander Lyakhov, Gerhard Schrom, Keith Hodgson, Sarath S. Makala, Sidhanto Roy
-
Publication number: 20210080987Abstract: A compensator is described with higher bandwidth than a traditional differential compensator, lower area than traditional differential compensator (e.g., 40% lower area), and lower power than traditional differential compensator. The compensator includes a differential to single-ended circuitry that reduces the number of passive devices used to compensate an input signal. The high bandwidth compensator allows for faster power state and/or voltage transitions. For example, a pre-charge technique is applied to handle faster power state transitions that enables aggressive dynamic voltage and frequency scaling (DVFS) and voltage transitions. The compensator is configurable in that it can operate in voltage mode or current mode.Type: ApplicationFiled: September 18, 2019Publication date: March 18, 2021Applicant: Intel CorporationInventors: Sergio Carlo Rodriguez, Alexander Lyakhov, Gerhard Schrom, Keith Hodgson, Sarath S. Makala, Sidhanto Roy
-
Publication number: 20200264214Abstract: Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.Type: ApplicationFiled: May 4, 2020Publication date: August 20, 2020Applicant: Intel CorporationInventors: Gerhard SCHROM, J. Keith HODGSON, Alexander LYAKHOV, Chiu Keung TANG, Narayanan RAGHURAMAN, Narayanan NATARAJAN
-
Patent number: 10651733Abstract: Described is an apparatus which comprises: a low-side switch coupled to an output node for providing regulated voltage supply; and a first driver operable to cause the low-side switch to turn off when the output node rises above a first transistor threshold voltage. Described is also a voltage regulator which comprises: a signal generator to generate a pulse-width modulated (PWM) signal; a bridge having a low-side switch coupled to an output node for providing regulated voltage supply according to the PWM signal; a first driver operable to cause the low-side switch to turn off when the output node rises above a first transistor threshold voltage; and a bridge controller to provide control signals to the first driver. The voltage regulator may operate without diode clamps and its operation is self-timed. The voltage regulator also provides tolerance against process variation.Type: GrantFiled: July 27, 2015Date of Patent: May 12, 2020Assignee: INTEL CORPORATIONInventors: Gerhard Schrom, Mark S. Milshtein, Alexander Lyakhov
-
Patent number: 10641799Abstract: Apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), and compensator for a voltage regulator (VR), are provided. In one example, an apparatus includes: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.Type: GrantFiled: January 22, 2019Date of Patent: May 5, 2020Assignee: Intel CorporationInventors: Gerhard Schrom, J. Keith Hodgson, Alexander Lyakhov, Chiu Keung Tang, Narayanan Raghuraman, Narayanan Natarajan
-
Publication number: 20200004286Abstract: Some embodiments include apparatuses and methods of operating such apparatuses. One of the embodiments includes an input node to receive an input voltage, a circuit portion to generate first, second, and third voltages based on the input voltage, a comparator circuit to compare the first voltage with the second voltage to generate a first signal and to compare the first voltage with the third voltage to generate a second signal, and an output circuit to generate an output signal based on the first and second signals.Type: ApplicationFiled: September 10, 2019Publication date: January 2, 2020Inventors: Praveen Mosalikanti, Gerhard Schrom, Vaughn J. Grossnickle, Nasser A. Kurd
-
Patent number: 10483249Abstract: Embodiments are generally directed to integrated passive devices on chip. An embodiment of a device includes a semiconductor die; a semiconductor die package, a first side of the package being coupled with the semiconductor die; and one or more separate dies to provide passive components for operation of the semiconductor die, wherein the passive components for operation of the semiconductor die includes inductors.Type: GrantFiled: December 26, 2015Date of Patent: November 19, 2019Assignee: Intel CorporationInventors: Donald S. Gardner, Edward A. Burton, Gerhard Schrom, Larry E. Mosley
-
Patent number: 10423182Abstract: Some embodiments include apparatuses and methods of operating such apparatuses. One of the embodiments includes an input node to receive an input voltage, a circuit portion to generate first, second, and third voltages based on the input voltage, a comparator circuit to compare the first voltage with the second voltage to generate a first signal and to compare the first voltage with the third voltage to generate a second signal, and an output circuit to generate an output signal based on the first and second signals.Type: GrantFiled: April 4, 2017Date of Patent: September 24, 2019Assignee: Intel CorporationInventors: Praveen Mosalikanti, Gerhard Schrom, Vaughn J. Grossnickle, Nasser A. Kurd
-
Patent number: 10374614Abstract: Some embodiments include apparatuses and methods using the apparatuses. Some of the apparatuses include a phase frequency detector to generate output information having a value based on a relationship between a first clock signal and a second clock signal, a memory element to store the values of the output information, a digital control oscillator to generate the second clock signal having a phase and frequency based on a digital code, the digital code having a value based on control information, and circuitry to generate the control information based on conditions determined at least from the values stored in the memory element.Type: GrantFiled: December 26, 2017Date of Patent: August 6, 2019Assignee: Intel CorporationInventors: Gerhard Schrom, Sarath Makala, Kowshik Gandham, Chun Lee
-
Patent number: 10367409Abstract: Described herein is an apparatus and system for generating a signal with phase angle configuration. The apparatus comprises an array of switch-resistors, each switch resistor to receive a control signal, wherein the array of switch-resistors to generate an output signal; and a circuit to configure phase angle of the output signal. The apparatus can be used for different package and inductor configurations. The apparatus provides flexibility to mitigate switching noise by adjusting phase angles, and provides the ability to enable and disable switch-resistors on the fly without ripples. The apparatus also saves power consumption by selectively turning off switch-resistors when phases are disabled. The output signal of the apparatus has smooth triangular waveforms for improving the quality of power supply generated using the output signal. Overall, the apparatus exhibits reduced sensitivity to process variations compared to traditional signal generators.Type: GrantFiled: January 9, 2017Date of Patent: July 30, 2019Assignee: INTEL CORPORATIONInventors: Gerhard Schrom, Narayanan Raghuraman, Fabrice Paillet
-
Patent number: 10354786Abstract: Embodiments are generally directed to hybrid magnetic material structures for electronic devices and circuits. An embodiment of an inductor includes a first layer of magnetic film material applied on a substrate, one or more conductors placed on the first layer of magnetic film material, and a second layer of magnetic particles, wherein the magnetic particles are suspended in an insulating medium.Type: GrantFiled: October 1, 2016Date of Patent: July 16, 2019Assignee: Intel CorporationInventors: Donald S. Gardner, Gerhard Schrom, Edward A. Burton
-
Publication number: 20190199358Abstract: Some embodiments include apparatuses and methods using the apparatuses. Some of the apparatuses include a phase frequency detector to generate output information having a value based on a relationship between a first clock signal and a second clock signal, a memory element to store the values of the output information, a digital control oscillator to generate the second clock signal having a phase and frequency based on a digital code, the digital code having a value based on control information, and circuitry to generate the control information based on conditions determined at least from the values stored in the memory element.Type: ApplicationFiled: December 26, 2017Publication date: June 27, 2019Inventors: Gerhard Schrom, Sarath Makala, Kowshik Gandham, Chun Lee
-
Publication number: 20190154739Abstract: Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.Type: ApplicationFiled: January 22, 2019Publication date: May 23, 2019Applicant: Intel CorporationInventors: Gerhard SCHROM, J. Keith HODGSON, Alexander LYAKHOV, Chiu Keung TANG, Narayanan RAGHURAMAN, Narayanan NATARAJAN
-
Patent number: 10184961Abstract: Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.Type: GrantFiled: September 26, 2016Date of Patent: January 22, 2019Assignee: Intel CorporationInventors: Gerhard Schrom, J. Keith Hodgson, Alexander Lyakhov, Chiu Keung Tang, Narayanan Raghuraman, Narayanan Natarajan
-
Publication number: 20190006334Abstract: Embodiments are generally directed to integrated passive devices on chip. An embodiment of a device includes a semiconductor die; a semiconductor die package, a first side of the package being coupled with the semiconductor die; and one or more separate dies to provide passive components for operation of the semiconductor die, wherein the passive components for operation of the semiconductor die includes inductors.Type: ApplicationFiled: December 26, 2015Publication date: January 3, 2019Inventors: Donald S. GARDNER, Edward A. BURTON, Gerhard SCHROM, Larry E. MOSLEY