Abstract: A high dynamic range amplifier circuit for amplifying pixel signals of an imager device is disclosed. The amplifier circuit uses a read-out scheme based on a charge recycling approach, where a pixel signal is first amplified with a low gain during a first amplification phase T1, and then the amplifier output is immediately recycled and the pixel signal amplified with a higher gain during a second amplification phase T2.

Abstract: Apparatus and methods for synchronizing a plurality of image sensors in a video camera system. In one embodiment, a method includes generating a video sync signal, and resetting at least one internal clock divider in each image sensor in synchronization with the video sync signal at the beginning of each video frame. Another embodiment of a method of synchronizing a plurality of image sensors in a video camera system includes detecting a phase state of a signal of at least one internal clock divider in each sensor, wherein the phase state is relative to a system sync signal, and selecting a video output signal for each sensor based on the detected phase state of the at least one internal divider. In a third embodiment, the method includes asserting an asynchronous reset signal, stopping the system clocks in the system, de-asserting the asynchronous reset signal, while the system clocks are stopped, and restarting the system clocks.

Abstract: Signals from an imager pixel photodetector are received by an amplifier having capacitive feedback, such as a capacitive transimpedance amplifier (CTIA). The amplifier can be operated at a low or no power level during an integration period of a photodetector to reduce power dissipation. The amplifier can be distributed, with an amplifier element within each pixel of an array and with amplifier output circuitry outside the pixel array. The amplifier can be a single ended cascode amplifier, a folded cascode amplifier, a differential input telescopic cascode amplifier, or other configuration. The amplifier can be used in pixel configurations where the amplifier is directly connected to the photodetector, or in configurations which use a transfer transistor to couple signal charges to a floating diffusion node with the amplifier being coupled to the floating diffusion node.

Abstract: Circuits, methods, and systems are disclosed in which a current is provided to compensate for spurious current while receiving signals through a line. For example, the spurious current can be sensed and the compensating current can be approximately equal to the sensed spurious current. The spurious current could include photocurrent from a bright light, and the compensating current can prevent bright light effects.

Abstract: A high dynamic range amplifier circuit for amplifying pixel signals of an imager device is disclosed. The amplifier circuit uses a read-out scheme based on a charge recycling approach, where a pixel signal is first amplified with a low gain during a first amplification phase T1, and then the amplifier output is immediately recycled and the pixel signal amplified with a higher gain during a second amplification phase T2.

Abstract: An CMOS active pixel sensor (APS) imaging system include circuitry to compensate for different analog offset levels from the CMOS pixel array. More specifically, the compensation is performed in the analog (charge) domain. A digital correction value, which may be measured as part of the operation or testing of the CMOS APS system, is provided to a offset correction block circuit, to generate an analog electrical signal. The analog electrical signal is supplied to a sample-and-hold circuit including a charge amplifier. The signal read from the pixel array, after conditioning through an analog signal chain, is also supplied to the charge amplifier, which has a linear transfer function and outputs the compensated signal.

Abstract: An image sensor and a method of manufacturing the same, in which, a planarized layer is formed on a semiconductor substrate including a pixel array region, an optical black region, and a logic region to cover a photo sensing unit array in the pixel array region, a patterned metal layer is formed on the planarized layer corresponding to the pixel array region and the logic region, but not the optical black region. An optical black layer is formed in the optical black region after a passivation layer is formed and before a color filter array is formed at a temperature less than about 400° C., and preferably contains metal material.

Abstract: The claimed subject matter provides systems and/or methods that facilitate generating and/or maintaining low noise reference voltages for CMOS imaging System-on-Chip (iSoC) sensors. A primary reference voltage can be generated utilizing a low noise bandgap. Further, the primary reference voltage can be filtered via a low pass filter. The filtered, primary reference voltage can thereafter be distributed to a plurality of isolated domains. Each of the isolated domains can generate an independent set of reference voltages based upon the filtered, primary reference voltage. Moreover, subsets of these reference voltages can be employed by programmable digital to analog converters (DACs). Each of the reference voltages can be isolated from switching noise and/or clock glitches generated within each domain. Further, each DAC output can be buffered to have adequately low impedance with appropriate drive capability and requisite signal swing.

Abstract: An CMOS active pixel sensor (APS) imaging system include circuitry to compensate for different analog offset levels from the CMOS pixel array. More specifically, the compensation is performed in the analog (charge) domain. A digital correction value, which may be measured as part of the operation or testing of the CMOS APS system, is provided to a offset correction block circuit, to generate an analog electrical signal. The analog electrical signal is supplied to a sample-and-hold circuit including a charge amplifier. The signal read from the pixel array, after conditioning through an analog signal chain, is also supplied to the charge amplifier, which has a linear transfer function and outputs the compensated signal.

Abstract: An imager temperature sensor and a current correction apparatus are provided which use dark pixel measurements from an imager chip during operation together with a fabrication process constant as well as a chip dependent constant to calculate chip temperature. The chip temperature may be used to generate a current correction signal. The correction signal is used to tune a current on the imager chip to correct for temperature variations.

Abstract: Signals from an imager pixel photodetector are received by an amplifier having capacitive feedback, such as a capacitive transimpedance amplifier (CTIA). The amplifier can be operated at a low or no power level during an integration period of a photodetector to reduce power dissipation. The amplifier can be distributed, with an amplifier element within each pixel of an array and with amplifier output circuitry outside the pixel array. The amplifier can be a single ended cascode amplifier, a folded cascode amplifier, a differential input telescopic cascode amplifier, or other configuration. The amplifier can be used in pixel configurations where the amplifier is directly connected to the photodetector, or in configurations which use a transfer transistor to couple signal charges to a floating diffusion node with the amplifier being coupled to the floating diffusion node.

Abstract: A method and apparatus for minimizing noise pickup in iSoC sensors using an improved Analog Capacitor Memory (ACM) design and optimized timing methods that together prevent direct connection of the electrical grounds between the low-speed signal processing circuit and high-speed signal processing circuit of an imaging System-on-Chip sensor. The ACM includes a two-terminal capacitor and two pairs of terminals. Each pair of terminals is connected via switches to separate circuits. The switches are controlled to isolate one side of the ACM from the other, thereby reducing the noise pickup between the circuits.

Abstract: The claimed subject matter provides systems and/or methods that facilitate combining analog and digital gain for utilization with CMOS sensor imagers. The analog gain can provide coarse gain steps and the digital gain can provide finer gain steps between adjacent coarse analog gain values. Further, since analog gain can suffer from low precision, dispersion, etc., on-chip calibration can be implemented to calibrate the analog and digital gain. For example, a digital amplifier can be calibrated to compensate for differences between actual and nominal analog gains associated with one or more analog amplifiers.

Abstract: An image sensor, in which, a planarized layer is formed on a semiconductor substrate including a pixel array region, an optical black region, and a logic region to cover a photo sensing unit array in the pixel array region, a patterned metal layer is formed on the planarized layer corresponding to the pixel array region and the logic region, but not the optical black region. An optical black layer is formed in the optical black region after a passivation layer is formed and before a color filter array is formed at a temperature less than about 400° C., and preferably contains metal material.

Abstract: A sample and hold readout circuit, and method of operation which minimizes fixed pattern noise during a read out operation. The circuit improves the consistency of the pixel to pixel output of the pixel array and increases the dynamic range of the pixel output. This is accomplished by eliminating the crowbar between the storage elements in the sample and hold circuit. Switches are added to isolate the sample and hold circuit from the column line coupled to the pixel array and to short the front plates of the capacitors together. Activating these switches allows the signals stored in the sample and hold circuit to be transferred downstream without the use of a crowbar switch.

Abstract: A method and apparatus for forming dummy pixels exhibiting electrical characteristics virtually identical to the clear pixels of the imaging array. Arrays of such dummy pixels are used to form regions that isolate the main imaging array and sub-arrays of optical black pixels while preventing edge effects. The dummy pixels are preferably clear but can also be covered with optical black. By setting quiescent operation in soft reset, the dummy pixels exhibit the diode ideality and RoA product that are typical of any of the pixels in the entire array.

Abstract: An apparatus and method for forming optical black pixels having uniformly low dark current. Optical Black opacity is increased without having to increase Ti/TiN layer thickness. A hybrid approach is utilized combining a Ti/TiN OB layer in conjunction with in-pixel metal stubs that further occlude the focal radius of each pixel's incoming light beam. Additional metal layers can be used to increase the opacity into the infrared region.

Abstract: A black clamp stabilization circuit for an image sensor utilizes a mixed-signal SoC block comprising sub-blocks to dynamically and precisely adjust the black level based on comparison to a reference black level. The black level adjustments include a first level regulation using digital control of an analog signal in a feedback loop that includes a programmable gain amplifier and high-resolution A/D converter. By applying the black clamping in the analog domain, dynamic range is extended. Additional black level regulation is subsequently performed in the digital domain to differentially eliminate line noise and column noise generated within the imaging System-on-Chip. By providing information between the sub-blocks, the algorithms can converge more quickly. The technique enables multiple signal paths to separately handle individual colors and to increase imaging data throughput.

Abstract: Capacitance on a readout line is varied while receiving a signal, from a light sensing pixel or other sensing element through the line. Capacitance can be varied in accordance with a readout characteristic of the pixel, such as color sensed, conversion efficiency, or readout signal range. For example, a CMOS color image sensing array with pixels in an RGB Bayer pattern can include, for each column, a variable capacitance component with parallel switchable capacitors for signal sampling and readout sampling. The capacitors can all have equal values, or can be scaled in a binary format. The variable capacitance component can also include a constant capacitor. A controller can switch the capacitors to obtain capacitances that provide color equalization, and can use light level as well as pixel color for fine tuned color equalization. Sampled values from the capacitances can be provided in sequence to a readout amplifier at the beginning of a readout path to maintain signal-to-noise ratio.

Abstract: A sample and hold readout circuit and method of operation which minimizes fixed pattern noise during a read out operation. The circuit improves the consistency of the pixel to pixel output of the pixel array and increases the dynamic range of the pixel output. This is accomplished by eliminating the crowbar between the storage elements in the sample and hold circuit. Switches are added to isolate the sample and hold circuit from the column line coupled to the pixel array and to short the front plates of the capacitors together. Activating these switches allows the signals stored in the sample and hold circuit to be transferred downstream without the use of a crowbar switch.