Abstract: A high dynamic range amplifier circuit for amplifying pixel signals of an imager device is disclosed. The amplifier circuit uses a read-out scheme based on a charge recycling approach, where a pixel signal is first amplified with a low gain during a first amplification phase T1, and then the amplifier output is immediately recycled and the pixel signal amplified with a higher gain during a second amplification phase T2.

Abstract: A configurable current source for imager readout system that can be operated as a simple-current-source or as a cascode-current-source. The configurable current source can be operated in a simple-current-source mode during circumstances when a low power supply voltage or large output signal swing is needed to output a pixel signal. The configurable current source can also be operated in a cascode-current-source mode for reduced nonlinearity and column-wise fixed pattern noise when power from a power supply is not a limitation. The configurable current source provides design flexibility and pixel optimization for imager development.

Abstract: A voltage amplifier is provided. The voltage amplifier includes an amplifier stage to amplify an input signal. A bias current generator supplies a bias current to the amplifier stage. The bias current generator is controllable in response to a frame rate signal that is representative of a video frame rate. A compensation network stabilizes a loop response of the voltage amplifier. The compensation network is controllable in response to the frame rate signal.

Abstract: An imager temperature sensor and a current correction apparatus are provided which use dark pixel measurements from an imager chip during operation together with a fabrication process constant as well as a chip dependent constant to calculate chip temperature. The chip temperature may be used to generate a current correction signal. The correction signal is used to tune a current on the imager chip to correct for temperature variations.

Abstract: An imager temperature sensor and a current correction apparatus are provided which use dark pixel measurements from an imager chip during operation together with a fabrication process constant as well as a chip dependent constant to calculate chip temperature. The chip temperature may be used to generate a current correction signal. The correction signal is used to tune a current on the imager chip to correct for temperature variations.

Abstract: A high dynamic range amplifier circuit for amplifying pixel signals of an imager device is disclosed. The amplifier circuit uses a read-out scheme based on a charge recycling approach, where a pixel signal is first amplified with a low gain during a first amplification phase T1, and then the amplifier output is immediately recycled and the pixel signal amplified with a higher gain during a second amplification phase T2.

Abstract: Signals from an imager pixel photodetector are received by an amplifier having capacitive feedback, such as a capacitive transimpedance amplifier (CTIA). The amplifier can be operated at a low or no power level during an integration period of a photodetector to reduce power dissipation. The amplifier can be distributed, with an amplifier element within each pixel of an array and with amplifier output circuitry outside the pixel array. The amplifier can be a single ended cascode amplifier, a folded cascode amplifier, a differential input telescopic cascode amplifier, or other configuration. The amplifier can be used in pixel configurations where the amplifier is directly connected to the photodetector, or in configurations which use a transfer transistor to couple signal charges to a floating diffusion node with the amplifier being coupled to the floating diffusion node.

Abstract: Circuits, methods, and systems are disclosed in which a current is provided to compensate for spurious current while receiving signals through a line. For example, the spurious current can be sensed and the compensating current can be approximately equal to the sensed spurious current. The spurious current could include photocurrent from a bright light, and the compensating current can prevent bright light effects.

Abstract: An analog to digital conversion (ADC) circuit is disclosed including a fully differential reference voltage source. The reference voltage source includes a programmable current supply adapted to drive a programmed current through a resistor so as to establish an initial reference voltage. The initial reference voltage is sampled onto a capacitive network during a first sampling time interval. The capacitive network is coupled to a differential input of a fully differential amplifier, and maintained at a differential output of the differential amplifier during a second output time interval. An output coupling between the differential output and differential input of the differential amplifier acts to maintain stability of the output voltage during the output time interval.

Abstract: An CMOS active pixel sensor (APS) imaging system include circuitry to compensate for different analog offset levels from the CMOS pixel array. More specifically, the compensation is performed in the analog (charge) domain. A digital correction value, which may be measured as part of the operation or testing of the CMOS APS system, is provided to a offset correction block circuit, to generate an analog electrical signal. The analog electrical signal is supplied to a sample-and-hold circuit including a charge amplifier. The signal read from the pixel array, after conditioning through an analog signal chain, is also supplied to the charge amplifier, which has a linear transfer function and outputs the compensated signal.

Abstract: Circuits, methods, and systems are disclosed in which a current is provided to compensate for spurious current while receiving signals through a line. For example, the spurious current can be sensed and the compensating current can be approximately equal to the sensed spurious current. The spurious current could include photocurrent from a bright light, and the compensating current can prevent bright light effects.

Abstract: A new capacitor architecture includes a front plate of the capacitor formed form a first polysilicon layer. The front plate is surround by first and second dielectric layers. The back plate of the capacitor is formed from one layer of a first two-layer conductive structure which surrounds the first and second dielectric layer. The two layer structure is an equal potential structure and includes a conductive coupling between the two layers. In one embodiment, the back plate of the capacitor is formed from a metal layer. A third and fourth dielectric layers surround the first two-layer conductive structure. A second two-layer equal potential conductive structure surrounds the third and fourth dielectric layers. In one embodiment, the second two-layer equal potential conductive structure comprise an interconnect between a metal layer and the substrate.

Abstract: An CMOS active pixel sensor (APS) imaging system include circuitry to compensate for different analog offset levels from the CMOS pixel array. More specifically, the compensation is performed in the analog (charge) domain. A digital correction value, which may be measured as part of the operation or testing of the CMOS APS system, is provided to a offset correction block circuit, to generate an analog electrical signal. The analog electrical signal is supplied to a sample-and-hold circuit including a charge amplifier. The signal read from the pixel array, after conditioning through an analog signal chain, is also supplied to the charge amplifier, which has a linear transfer function and outputs the compensated signal.

Abstract: A high dynamic range amplifier circuit for amplifying pixel signals of an imager device is disclosed. The amplifier circuit uses a read-out scheme based on a charge recycling approach, where a pixel signal is first amplified with a low gain during a first amplification phase T1, and then the amplifier output is immediately recycled and the pixel signal amplified with a higher gain during a second amplification phase T2.

Abstract: An analog differential voltage circuit is disclosed that enables the combination of a plurality of voltage signals in the analog domain of a CMOS processing system prior to being received by a differential amplifier and prior to being digitized. By programming the column decoder to read out a plurality of column buffer circuits, a plurality of linear operations (e.g., addition, substation, averaging, weighted, sum) may be performed on the plurality of analog voltage levels prior to their being digitized.

Abstract: A sample and hold readout circuit and method of operation which minimizes fixed pattern noise during a read out operation. The circuit improves the consistency of the pixel to pixel output of the pixel array and increases the dynamic range of the pixel output. This is accomplished by eliminating the crawbar between the storage elements in the sample and hold circuit. Switches are added to isolate the sample and hold circuit from the column line coupled to the pixel array and to short the front plates of the capacitors together. Activating these switches allows the signals stored in the sample and hold circuit to be transferred downstream without the use of a crawbar switch.

Abstract: An analog signal chain for a CMOS active pixel sensor imaging system utilizes, for each amplification stage, a plurality of fixed gain amplifiers instead of a single multi-gain amplifier. The fixed gain amplifier corresponding to the desired gain level is selected and powered on and coupled to the input/output signal paths, while the non-selected fixed gain amplifier(s) are powered off and isolated from the input/output signal paths. Each fixed gain amplifier is operated at a gain bandwidth corresponding to the timing requirements of the imaging system and the gain of the amplifier. Thus, each fixed gain amplifier (other than the one corresponding to the maximum gain of a comparable multi-gain amplifier) operates at a lower level of power consumption than the comparable multi-gain amplifier.

Abstract: A high dynamic range amplifier circuit for amplifying pixel signals of an imager device is disclosed. The amplifier circuit uses a read-out scheme based on a charge recycling approach, where a pixel signal is first amplified with a low gain during a first amplification phase T1, and then the amplifier output is immediately recycled and the pixel signal amplified with a higher gain during a second amplification phase T2.

Abstract: A CMOS imager has a programmable current multiplication stage provided between a master current reference and the analog circuitry. The master current of each chip can be stored on-chip, for example, in a fuse-type ROM during production testing. By programming the current multiplication stage using the stored master current information, the master current can be chosen correctly for each chip, regardless of variations in manufacturing, thereby improving the production specification to the customer.

Abstract: A high dynamic range amplifier circuit for amplifying pixel signals of an imager device is disclosed. The amplifier circuit uses a read-out scheme based on a charge recycling approach, where a pixel signal is first amplified with a low gain during a first amplification phase T1, and then the amplifier output is immediately recycled and the pixel signal amplified with a higher gain during a second amplification phase T2.