Abstract: A system and method for recovering stranded data from a non-volatile memory is provided. An example of a method includes copying data from a non-volatile memory (NVM) in a home node over a sideband interface and writing the data to a target memory region, wherein the target memory region is in a fail-over node.

Abstract: Examples disclose a method, memory component, and storage medium to configure a data width of the memory component. The examples disclose receiving a configuration transaction at the memory component capable to communicate at multiple data widths. Additionally, the examples disclose configuring the data width of the memory component based on the configuration transaction.

Abstract: A non-volatile memory (NVM) is to store data and a first password. The first password is to protect the data. A controller is to selectively enable interaction with the data based on authenticating the first password against a second password. A temporary region is to store the second password. The second password is discarded in response to a status change of the apparatus. The data, the first password, and the second password are resettable by the controller in response to a reset request to bypass the first password, such that the apparatus is restorable to an unused state without authenticating the first password.

Abstract: According to an example, a state-retaining logic cell may include a plurality of invertors. The state-retaining logic cell may further include an output node NVM storage cell connected adjacent an output node of one of the inverters.

Abstract: A computing system is disclosed herein. The computing system includes a computing node and a remote memory node coupled to the computing node via a system fabric. The computing node includes a plurality of processors and a master memory controller. The master memory controller is external to the plurality of processors. The master memory controller routes requests corresponding to requests from the plurality of processors across the system fabric to the remote memory node and returns a response.

Abstract: A system and method for addressing split modes of persistent memory are described herein. The system includes a non-volatile memory comprising regions of memory, each region comprising a range of memory address spaces. The system also includes a memory controller (MC) to control access to the non-volatile memory. The system further includes a device to track a mode of each region of memory and to define the mode of each region of memory. The mode is a functional use model.

Abstract: A method for sending data from a local memory device in a first computing device to an external memory device in a second computing device is described herein. In one example, a method includes configuring the local memory device to store data for the external memory device and detecting a request for data from the external memory device. The method also includes translating a memory address that corresponds to the requested data from an external memory address to a local memory address. Additionally, the method includes retrieving the requested data based on the local memory address and sending the requested data to the second computing device.

Abstract: Techniques for updating data in a reflective memory region of a first memory device are described herein. In one example, a method for updating data in a reflective memory region of a first memory device includes receiving an indication that data is to be flushed from a cache device to the first memory device. The method also includes detecting a memory address corresponding to the data is within the reflective memory region of the first memory device and sending data from the cache device to the first memory device with a flush operation. Additionally, the method includes determining that the data received by the first memory device is modified data. Furthermore, the method includes sending the modified data to a second memory device in a second computing system.

Abstract: Data is read from memory cells in the memory device. The read data is transferred over a link to a memory controller that is external of the memory device. While the transferring of the read data is ongoing, error detection of the read data is performed inside the memory device using an error correction code.

Abstract: A computing system can include a memory controller and a first storage device. The first storage device is to receive a serially encoded request and forward the serially encoded request to a second storage device before deserializing the serially encoded request. The first storage device is also to return a training sequence from the target storage device to the memory controller. The first storage device is additionally to return a response from the target storage device to the memory controller.

Abstract: An upstream-communication end node of an apparatus in an example upon a receipt of an indication of threshold-partial fullness of transaction-storage space on a downstream-communication end node modifies transaction-selection for delivery to the downstream-communication end node to exclude one or more transactions originated on the upstream-communication end node.

Abstract: An example processor includes a plurality of processor core components, a memory interface component, and an address translation gasket. Each processor core component is assigned to one of a plurality of system images, and the plurality of system images share a common memory component by at least utilizing the address translation gasket to maintain separation between memory regions assigned to each of the plurality of system images. The memory interface component is shared by the plurality of independent system images. The address translation gasket is configured to intercept transactions bound for the memory interface component comprising a system image identifier and a target address, generate a translation address based at least in part on the system identifier and the target address, and send the translation address to the memory interface component.

Abstract: An example processor includes a plurality of processing core components, one or more memory interface components, and a management component, wherein the one or more memory interface components are each shared by the plurality of processing core components, and wherein the management component is configured to assign each of the plurality of processing core components to one of a plurality of system images.

Abstract: A computing system can include a memory controller and a first storage device. The first storage device is to receive a serially encoded request and forward the serially encoded request to a second storage device before deserializing the serially encoded request. The first storage device is also to return a training sequence from the target storage device to the memory controller. The first storage device is additionally to return a response from the target storage device to the memory controller.

Abstract: In a computing system having a plurality of transaction source nodes issuing transactions into a switching fabric, an underserviced node notifies source nodes in the system that it needs additional system bandwidth to timely complete an ongoing transaction. The notified nodes continue to process already started transactions to completion, but stop the introduction of new traffic into the fabric until such time as the underserviced node indicates that it has progressed to a preselected point.

Abstract: A fabric switch includes ports, a blind route determination function component, a location function component, and a routing function component. Packets are received and forwarded via the ports. The blind route determination function component determines whether a port at which a packet is received is configured for a blind route, the location function component provides for determining a location of routing information within the packet based at least in part on the input port at which the packet was received if a blind route is not defined for the port. The routing function component provides for determining an output port as a routing function based at least in part on the contents of the location, or the existence of a blind route.

Abstract: A fabric switch includes ports, a location function, component, and a routing function component. Packets are received and forwarded via the ports. The location function component provides for determining a location of routing information within a received packet of rooting information based at least in part on the input port at which said packet was received. The routing function component provides for determining an output port as a routing function based at least in part on the contents of said location.

Abstract: Systems and methods are provided to manage access to computing resources. More specifically, certain embodiments are described in which a resource or resource consumer can engage access controls or request that access controls be engaged if the age of a request exceeds one or more thresholds. For example, a requester may, after the age of a request meets or exceeds a threshold, indicate to a destination that a control should be engaged.

Abstract: A system and method for loopback self testing. A system includes a host device and an endpoint device. The host device transmits unencoded test symbols. The endpoint device loops back the unencoded test symbols to the host device. The host device drives at least some bits of each unencoded test symbol onto host device data signals and drives at least some bits of each unencoded test symbol onto host device control signals.

Abstract: In a computing system having a plurality of transaction source nodes issuing transactions into a switching fabric, an underserviced node notifies source nodes in the system that it needs additional system bandwidth to timely complete an ongoing transaction. The notified nodes continue to process already started transactions to completion, but stop the introduction of new traffic into the fabric until such time as the underserviced node indicates that it has progressed to a preselected point.