Abstract: A solid-state light source (SSLS) with an integrated short-circuit protection approach is described. A device can include a SSLS having an n-type semiconductor layer, a p-type semiconductor layer and a light generating structure formed there between. A field-effect transistor (FET) can be monolithically connected in series with the SSLS. The FET can have a saturation current that is greater than the normal operating current of the SSLS and less than a predetermined protection current threshold specified to protect the SSLS and the FET.

Abstract: A semiconductor device including a device channel with a gate-drain region having a carrier concentration that varies laterally along a direction from the gate contact to the drain contact is provided. Lateral variation of the carrier concentration can be implemented by laterally varying one or more attributes of one or more layers located in the gate-drain region of the device.

Abstract: A solid-state light source (SSLS) structure with integrated control. In one embodiment, a SSLS control circuit can be integrated with a SSLS structure formed from a multiple of SSLSs. The SSLS control circuit controls the total operating current of the SSLS structure to within a predetermined total operating current limit by selectively limiting the current in individual SSLSs or in groups of SSLSs as each are turned on according to a sequential order. The SSLS control circuit limits the current in each of the individual SSLSs or groups of SSLSs as function of the saturation current of the SSLSs. In one embodiment, the individual SSLSs or groups of SSLSs has a turn on voltage corresponding to a voltage causing a preceding SSLS or group of SSLSs in the sequential order to saturate current.

Abstract: A solid-state light source (SSLS) with light modulation control is described. A SSLS device can include a main p-n junction region configured for recombination of electron-hole pairs for light emission. A supplementary p-n junction region is proximate the main p-n junction region to supplement the recombination of electron-hole pairs, wherein the supplementary p-n junction region has a smaller electron-hole life time than the electron-hole life time of the main p-n junction region. The main p-n junction region and the supplementary p-n junction region operate cooperatively in a light emission state and a light turn-off-state. In one embodiment, the recombination of electron-hole pairs occurs in the main p-n junction region during a light emission state, and the recombination of electron-hole pairs occurs in the supplementary p-n junction region light during the light turn off-state.

Abstract: A semiconductor heterostructure for an optoelectronic device includes a base semiconductor layer having one or more semiconductor heterostructure mesas located thereon. One or more of the mesas can include a set of active regions having multiple main peaks of radiative recombination at differing wavelengths. For example, a mesa can include two or more active regions, each of which has a different wavelength for the corresponding main peak of radiative recombination. The active regions can be configured to be operated simultaneously or can be capable of independent operation. A system can include one or more optoelectronic devices, each of which can be operated as an emitter or a detector.

Abstract: An opto-electronic device with two-dimensional injection layers is described. The device can include a semiconductor structure with a semiconductor layer having one of an n-type semiconductor layer or a p-type semiconductor layer, and a light generating structure formed on the semiconductor layer. A set of tilted semiconductor heterostructures is formed over the semiconductor structure. Each tilted semiconductor heterostructure includes a core region, a set of shell regions adjoining a sidewall of the core region, and a pair of two-dimensional carrier accumulation (2DCA) layers. Each 2DCA layer is formed at a heterointerface between one of the sidewalls of the core region and one of the shell regions. The sidewalls of the core region, the shell regions, and the 2DCA layers each having a sloping surface, wherein each 2DCA layer forms an angle with a surface of the semiconductor structure.

Abstract: A solid-state light source (SSLS) structure with integrated control. In one embodiment, a SSLS control circuit can be integrated with a SSLS structure formed from a multiple of SSLSs. The SSLS control circuit controls the total operating current of the SSLS structure to within a predetermined total operating current limit by selectively limiting the current in individual SSLSs or in groups of SSLSs as each are turned on according to a sequential order. The SSLS control circuit limits the current in each of the individual SSLSs or groups of SSLSs as function of the saturation current of the SSLSs. In one embodiment, the individual SSLSs or groups of SSLSs has a turn on voltage corresponding to a voltage causing a preceding SSLS or group of SSLSs in the sequential order to saturate current.

Abstract: A normally-off transistor with a high operating voltage is provided. The transistor can include a barrier above the channel and an additional barrier layer located below the channel. A source electrode and a drain electrode are connected to the channel and a gate electrode is connected to the additional barrier layer located below the channel. The bandgap for each of the barrier layers can be larger than the bandgap for the channel. A polarization charge induced at the interface between the additional barrier layer below the channel and the channel depletes the channel. A voltage can be applied to the bottom barrier to induce free carriers into the channel and turn the channel on.

Abstract: A device including a first semiconductor layer and a contact to the first semiconductor layer is disclosed. An interface between the first semiconductor layer and the contact includes a first roughness profile having a characteristic height and a characteristic width. The characteristic height can correspond to an average vertical distance between crests and adjacent valleys in the first roughness profile. The characteristic width can correspond to an average lateral distance between the crests and adjacent valleys in the first roughness profile.

Abstract: A solid-state light source (SSLS) with an integrated electronic modulator is described. A device can include a SSLS having an active p-n junction region is formed within the SSLS for electron-hole pair recombination and light emission. the active p-n junction region can include a n-type semiconductor layer, a p-type semiconductor layer and a light generating structure formed there between. A pair of current supply electrodes can be formed to receive a drive current from a current supply source that drives the SSLS. A field-effect transistor (FET) modulator can be monolithically integrated with the SSLS for modulation thereof. The FET modulator can receive a modulation voltage from a modulation voltage source. The modulation voltage includes voltage pulses having a pulse amplitude and polarity to turn on and off current flowing through the FET modulator. These voltage pulses enable the FET modulator to control the drive current supplied to the SSLS.

Abstract: A semiconductor device including a low conducting field-controlling element is provided. The device can include a semiconductor including an active region (e.g., a channel), and a set of contacts to the active region. The field-controlling element can be coupled to one or more of the contacts in the set of contacts. The field-controlling element can be formed of a low conducting layer of material and have a lateral resistance that is both larger than an inverse of a minimal operating frequency of the device and smaller than an inverse of a maximum control frequency of the device.

Abstract: An integrated ultraviolet analyzer is described. The integrated ultraviolet analyzer can include one or more ultraviolet analyzer cells, each of which includes one or more ultraviolet photodetectors and one or more solid state light sources, which are monolithically integrated. The solid state light source can be operated to emit ultraviolet light, at least some of which passes through an analyzer active gap and irradiates a light sensing surface of the ultraviolet photodetector. A medium to be evaluated can be present in the analyzer active gap and affect the ultraviolet light as it passes there through, thereby altering an effect of the ultraviolet light on a ultraviolet photodetector.

Abstract: A device including a first semiconductor layer and a contact to the first semiconductor layer is disclosed. An interface between the first semiconductor layer and the contact includes a first roughness profile having a characteristic height and a characteristic width. The characteristic height can correspond to an average vertical distance between crests and adjacent valleys in the first roughness profile. The characteristic width can correspond to an average lateral distance between the crests and adjacent valleys in the first roughness profile.

Abstract: A perforating ohmic contact to a semiconductor layer in a semiconductor structure is provided. The perforating ohmic contact can include a set of perforating elements, which can include a set of metal protrusions laterally penetrating the semiconductor layer(s). The perforating elements can be separated from one another by a characteristic length scale selected based on a sheet resistance of the semiconductor layer and a contact resistance per unit length of a metal of the perforating ohmic contact contacting the semiconductor layer. The structure can be annealed using a set of conditions configured to ensure formation of the set of metal protrusions.

Abstract: A solid-state light source with built-in access resistance modulation is described. The light source can include an active region configured to emit electromagnetic radiation during operation of the light source. The active region can be formed at a p-n junction of a p-type side with a p-type contact and a n-type side with a n-type contact. The light source includes a control electrode configured to modulate an access resistance of an access region located on the p-type side and/or an access resistance of an access region located on the n-type side of the active region. The solid-state light source can be implemented in a circuit, which includes a voltage source that supplies a modulation voltage to the control electrode to modulate the access resistance(s).

Abstract: A device having a channel with multiple voltage thresholds is provided. The channel can include a first section located adjacent to a source electrode, which is a normally-off channel and a second section located between the first section and a drain electrode, which is a normally-on channel. The device can include a charge-controlling electrode connected to the source electrode, which extends from the source electrode over at least a portion of the second section of the channel. During operation of the device, a potential difference between the charge-controlling electrode and the channel can control the on/off state of the normally-on section of the channel.

Abstract: A semiconductor device with a breakdown preventing layer is provided. The breakdown preventing layer can be located in a high-voltage surface region of the device. The breakdown preventing layer can include an insulating film or a low conductive film with conducting elements embedded therein. The conducting elements can be arranged along a lateral length of the insulating film or the low conductive film. The conducting elements can vary in at least one of composition, doping, conductivity, size, thickness, shape, and distance from the device channel along a lateral length of the insulating film or the low conductive film, or in a direction that is perpendicular to the lateral length.

Abstract: An optical modulator is provided. The optical modulator can include a wave guide layer made of an electro-optical material with two or more electrodes directly contacting the wave guide layer. Each electrode can include an associated optical wave guide region, which is located within the wave guide layer. Each optical wave guide region is aligned with a lateral location corresponding to an electric field peak, which can be generated during operation of the optical modulator in a circuit, associated with the corresponding electrode. One or more voltage sources in a circuit can be operated to generate an electric field peak at one or more of the electrodes.

Abstract: A solid-state light source (SSLS) structure with integrated control. In one embodiment, a SSLS control circuit can be integrated with a SSLS structure formed from a multiple of SSLSs. The SSLS control circuit controls the total operating current of the SSLS structure to within a predetermined total operating current limit by selectively limiting the current in individual SSLSs or in groups of SSLSs as each are turned on according to a sequential order. The SSLS control circuit limits the current in each of the individual SSLSs or groups of SSLSs as function of the saturation current of the SSLSs. In one embodiment, the individual SSLSs or groups of SSLSs has a turn on voltage corresponding to a voltage causing a preceding SSLS or group of SSLSs in the sequential order to saturate current.

Abstract: A lateral/vertical device is provided. The device includes a device structure including a device channel having a lateral portion and a vertical portion. The lateral portion of the device channel can be located adjacent to a first surface of the device structure, and one or more contacts and/or a gate can be formed on the first surface. The device structure also includes a set of insulating layers located in the device structure between the lateral portion of the device channel and a second surface of the device structure opposite the first surface. An opening in the set of insulating layers defines a transition region between the lateral portion of the device channel and a vertical portion of the device channel. A contact to the vertical portion of the device channel can be located on the second surface.