Abstract: Provided in the embodiments are a transfer structure and a manufacturing method thereof, and a transfer device and a manufacturing method thereof. The transfer structure includes: a first electrode, a piezoelectric layer, a second electrode and an adhesive layer stacked on a substrate in sequence, wherein the first electrode and the second electrode are insulated from each other. The transfer structure further includes: a position-limiting layer, wherein the position-limiting layer includes a cavity; the piezoelectric layer and at least part of the adhesive layer are located in the cavity of the position-limiting layer; and in the direction perpendicular to the substrate, the distance between the surface, away from the substrate, of the position-limiting layer and the substrate is greater than the distance between the surface, away from the substrate, of the adhesive layer and the substrate.

Abstract: A light intensity detecting unit, a display panel, and a method of detecting light intensity are provided. The light intensity detecting unit includes N scanning signal lines, J reading signal lines, at least one enable signal line, N×J photoelectric conversion circuits configured to convert optical signals into electric signals, and at least one gating circuit. Each of the reading signal lines is connected to one or more of at least one gating circuit. Each of the gating circuits is connected to output terminals of a plurality of photoelectric conversion circuits. Each of the scanning signal lines is connected to one or more photoelectric conversion circuits. Each of the enable signal line is connected to one or more of the at least one gating circuit. The gating circuit is configured to transmit the electric signal to the reading signal line in response to an enable signal from the enable signal line.

Abstract: A display substrate is provided. The display substrate includes a functional area; and a buffer area substantially surrounding the functional area, wherein the functional area includes a display area and a peripheral area between the display area and the buffer area; one or more insulating layers on a base substrate, and in the functional area and the buffer area; and an encapsulating structure on a side of the one or more insulating layers away from the base substrate, and encapsulating a plurality of light emitting elements in the display area. The one or more insulating layers include a first part in the functional area and at least a second part in the buffer area. The second part is spaced apart from the first part. The display substrate further includes a first enclosure ring on a side of the second part away from the base substrate.

Abstract: The present disclosure provides a display panel and a manufacturing method thereof, a driving method and a display device. The display panel includes: a base substrate and a thin film transistor on a surface of the base substrate. The thin film transistor includes: a gate, and a source and a drain arranged along a first direction, and a first passivation layer covering the gate, the source and the drain. a space region in which liquid crystal molecules are filled is formed in the first passivation layer. The space region is between the source and the drain. The source and the drain are configured to control rotation of the liquid crystal molecules.

Abstract: The present disclosure provides an oxide semiconductor layer and a preparation method thereof, device, substrate, and means, and belongs to the field of semiconductor technologies. The method includes: forming an oxide semiconductor layer having multiply types of regions on a substrate, at least two types of the multiple types of regions having different thicknesses, and adjusting an oxygen content of at least one type of regions in the multiply types of regions, so that the oxygen content and the thickness in the multiple types of regions are positively correlated.

Abstract: The present disclosure discloses a silicon-based nanowire, a preparation method thereof, and a thin film transistor. By using a eutectic point of catalyst particles and silicon, and a driving factor that the Gibbs free energy of amorphous silicon is greater than that of crystalline silicon, and due to absorption of the amorphous silicon by the molten catalyst particles to form a supersaturated silicon eutectoid, the silicon nucleates and grows into silicon-based nanowires. Moreover, during the growth of the silicon-based nanowire, the amorphous silicon film grows linearly along guide slots under the action of the catalyst particles, and reverse growth of the silicon-based nanowire is restricted by the retaining walls, thus obtaining silicon-based nanowires with a high density and high uniformity. Furthermore, by controlling the size of the catalyst particles and the thickness of the amorphous silicon film, the width of the silicon-based nanowire may also be controlled.

Abstract: A micro-nano channel structure, a method for manufacturing the micro-nano channel structure, a sensor, a method for manufacturing the sensor, and a microfluidic device are provided by the embodiments of the present disclosure. The micro-nano channel structure includes: a base substrate; a base layer, on the base substrate and including a plurality of protrusions; and a channel wall layer, on a side of the plurality of the protrusions away from the base substrate, and the channel wall layer has a micro-nano channel; a recessed portion is provided between adjacent protrusions of the plurality of the protrusions, and an orthographic projection of the micro-nano channel on the base substrate is located within an orthographic projection of the recessed portion on the base substrate.

Abstract: A microfluidic channel and a preparation method and an operation method thereof. The microfluidic channel includes: a channel structure, including a channel for a liquid sample to flow through and a channel wall surrounding the channel. The channel wall includes an electrolyte layer made of an electrolyte material; and a control electrode layer, at a side of the electrolyte layer away from the channel. The control electrode layer overlaps with the electrolyte layer with respect to the channel.

Abstract: A film patterning method, an array substrate, and a manufacturing method of an array substrate are disclosed. The film patterning method includes: applying photoresist on a film to be patterned; performing exposure and development on the photoresist, a region corresponding to a completely removed portion of the photoresist after the exposure and the development being a first region; post-baking the photoresist, so that the photoresist is melted and collapsed to change the region corresponding to the completely removed portion into a second region, the photoresist after post-baking forms into a mask pattern; and patterning the film by using the mask pattern as a mask.

Abstract: The present disclosure relates to a micro-channel device. The micro-channel device may include a micro-channel structure and a semiconductor junction. The micro-channel structure may include a base layer, a plurality of rails distributed on the base layer at intervals, and a cover layer comprising a plurality of columns. The cover layer and the base layer are configured to form a plurality of micro-channels. The semiconductor junction may include a P-type semiconductor layer, an intrinsic semiconductor layer and a N-type semiconductor layer stacked in a first direction.

Abstract: The embodiments of the present disclosure provide a method of fabricating a display backplate. The method of fabricating the display backplate may include forming a channel layer on a surface of a substrate. The channel layer may include a liquid storage portion, a plurality of pixel channels, and a plurality of moving electrodes. Each of the plurality of pixel channels may include a plurality of sub-pixel grooves. The method of fabricating the display backplate may further include printing ink droplets into the liquid storage portion and moving the ink droplets into the plurality of sub-pixel grooves by applying a moving voltage to the moving electrodes.

Abstract: A method of manufacturing an array substrate includes: forming a first semiconductor pattern and a first insulating layer group sequentially on a base substrate; forming a second semiconductor pattern and a second insulating layer group sequentially on the first insulating layer group; forming two first via holes in the first insulating layer group and the second insulating layer group to expose the first semiconductor pattern, annealing the exposed first semiconductor pattern and then removing an oxide layer on a surface of the first semiconductor pattern; forming connecting wires in the first via holes; forming second via holes in the second insulating layer group to expose the second semiconductor pattern, and forming a first source electrode and a first drain electrode in the second via holes such that the first source electrode or the first drain electrode covers and is connected to one of the connecting wires.

Abstract: A display substrate and a manufacturing method thereof, and a display control method. The display substrate includes: a stretchable substrate, a flexible layer on the stretchable substrate, and a plurality of display units and connection parts on the flexible layer. The connection parts are between the display units and are flexible to allow the display substrate to stretch or retract. The connection part includes a deformation sensor configured to detect a deformation state of the connection part.

Abstract: Embodiments of the present disclosure provide a method of manufacturing a mask, a mask and an evaporation method with a mask. The method comprises: providing a frame and a mask body; and fixing the mask body to the frame to form the mask in a case where at least one of the mask body and the frame is at a predetermined temperature, such that the mask body is elastically deformed by a predetermined amount by tensioning the mask body by the frame by a thermal deformation at a usage temperature different from the predetermined temperature.

Abstract: Provided are a thin film transistor including: a base cushion layer having a recessed portion, base insulating layer, source-drain layer and active layer. The base insulating layer is located on a side of the base cushion layer where the recessed portion is located, and has a first and second partition walls that are spaced apart, and an orthographic projection region of a gap region between the first and second partition walls onto the base cushion layer is located at a region where the recessed portion is located; and both orthographic projection regions of the first and second partition walls onto the base cushion layer partially overlap with the recessed portion region; and both the source-drain layer and the active layer are located on the side of the base insulating layer away from the base cushion layer.

Abstract: The present disclosure provides a transistor acoustic sensor element and a method for manufacturing the same, an acoustic sensor and a portable device. The transistor acoustic sensor element comprises a gate, a gate insulating layer, a first electrode, an active layer and a second electrode arranged on a base substrate, wherein the active layer has a nanowire three-dimensional mesh structure and thus can vibrate under the action of sound signals, so that the output current of the transistor acoustic sensor element changes correspondingly. Since the active layer having the nanowire three-dimensional mesh structure can sensitively sense weak vibration of acoustic waves, the sensitivity to sound signals of the transistor acoustic sensor element is improved.

Abstract: The present disclosure provides a heating device for heating an OLED substrate, comprising: a heating plate, a support, and a temperature controller, the temperature controller is connected with the heating plate and the support respectively, and the temperature controller is used to synchronously heat the heating plate and the support, so that the temperature of the heating plate and the support are substantially the same; wherein the heating plate comprises an receiving portion for accommodating the support, the support is configured to be able to protrude from the heating plate and retract into the heating plate.

Abstract: The present disclosure relates to a thin film transistor and a manufacturing method thereof. The thin film transistor includes a substrate, a first semiconductor layer, a gate dielectric layer, and a gate electrode sequentially stacked on the substrate, the first semiconductor layer has a first portion located in a channel region of the thin film transistor and a second portion in source/drain regions of the thin film transistor and located on both sides of the first portion, the second portion and first sub-portions of the first portion adjacent to the second portion include an amorphous semiconductor material, a second sub-portion of the first portion between the first sub-portions includes a polycrystalline semiconductor material, and a second semiconductor layer located in the source/drain regions and in contact with the second portion, wherein a conductivity of the second semiconductor layer is higher than a conductivity of the amorphous semiconductor material.

Abstract: The disclosure relates to a CMOS structure and a manufacturing method thereof. The CMOS structure includes a substrate and an N-type TFT and a P-type TFT on the substrate. The N-type TFT includes a first gate electrode, a first active layer, and a first gate dielectric layer therebetween. The first active layer includes a first semiconductor layer, a second semiconductor layer of the N-type, and a third semiconductor layer of the N-type which are located at opposite ends of the first semiconductor layer and sequentially stacked in a direction away from the first gate dielectric layer. An N-type doping concentration of the second semiconductor layer is smaller than that of the third semiconductor layer. The P-type TFT includes a fifth semiconductor layer and a sixth semiconductor layer. A P-type doping concentration of the fifth semiconductor layer is smaller than that of the sixth semiconductor layer.

Abstract: The present disclosure discloses a thin film transistor and a manufacturing method thereof, an array substrate and a display device, and belongs to the field of semiconductor display technology. The active layer of the thin film transistor is made of a CIGS material. By manufacturing the active layer of the thin film transistor with the CIGS material, and the crystal defects of the CIGS are less than LTPS and IGZO, the mobility of the thin film transistor is higher, and the switching speed of the thin film transistor is faster, thereby being advantageous to further improve the resolution of the display device.