Patents by Inventor Guangcai YUAN

Guangcai YUAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Display Panel and Preparation Method Thereof, and Display Apparatus
    Publication number: 20220113587
    Abstract: Provided are a display panel and a preparation method thereof, and a display apparatus. The display panel includes a first substrate and a second substrate which are aligned and combined into a cell, wherein the first substrate includes a backlight structure layer and an array structure layer arranged on a side of the backlight structure layer facing the second substrate, the backlight structure layer includes a light guide plate, a grating layer arranged on a side of the light guide plate facing the array structure layer and a refractive layer covering the grating layer, the grating layer includes a plurality of grating units, the array structure layer includes a plurality of pixel electrodes, and the grating units are in one-to-one correspondence with the pixel electrodes.
    Type: Application
    Filed: April 30, 2021
    Publication date: April 14, 2022
    Inventors: Liwen DONG, Qi YAO, Guangcai YUAN, Feng ZHANG, Zhijun LV, Wenqu LIU, Zhao CUI, Xiaoxin SONG, Detian MENG
  • GAS-SOLID SEPARATION STRUCTURE, FEEDING DEVICE AND ELECTROCHEMICAL DEPOSITION APPARATUS
    Publication number: 20220097010
    Abstract: The present disclosure provides a gas-solid separation structure including: a feeding pipeline including a first feeding part, a second feeding part and a first valve disposed between the first and second feeding parts; a discharge pipeline having a first opening and a second opening opposite to each other, the second feeding part extending into the discharge pipeline via the first opening; wherein an exhaust channel is formed between the second feeding part and the discharge pipeline, exhaust holes are formed in a portion of the discharge pipeline opposite to the second feeding part, and the exhaust channel is in communication with the exhaust holes. The present disclosure further provides a feeding device and an electrochemical deposition apparatus. The present disclosure can improve the problem of interference with medicine powder release caused by gases entering the discharge pipeline.
    Type: Application
    Filed: August 23, 2021
    Publication date: March 31, 2022
    Inventors: Shaodong SUN, Junwei YAN, Guangcai YUAN, Guocai ZHANG, Shihao DONG, Lilei ZHANG, Haoran GAO, Wenyue FU, Chengfei WANG, Xiaojie PAN
  • DEBRIS CLEANING DEVICE AND ELECTROPLATING SYSTEM
    Publication number: 20220098752
    Abstract: A debris cleaning device includes: a process treatment tank for containing a liquid medicine and a substrate to be treated, wherein the bottom of the tank body of the process treatment tank is provided with a liquid medicine discharge port, and the side wall of the tank body of the process treatment tank is provided with a liquid medicine inlet port; and a self-circulation debris removal system, the self-circulation debris removal system comprising a circulation pipeline communicating between the liquid medicine discharge port and the liquid medicine inlet port, the circulation pipeline being provided with a control valve for controlling the on-off state of the circulation pipeline, a debris filtering and collecting device for filtering the debris in the circulation pipeline, and a power pump for providing circulation driving force for the liquid medicine in the circulation pipeline.
    Type: Application
    Filed: August 10, 2021
    Publication date: March 31, 2022
    Inventors: Guangcai YUAN, Junwei YAN, Shaodong SUN, Guocai ZHANG, Shihao DONG, Chengfei WANG, Pengcheng DONG, Qi QI
  • DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME, AND DISPLAY DEVICE
    Publication number: 20220093896
    Abstract: A display panel includes a base; a plurality of display units disposed on a surface of the base, every two adjacent display units being provided with a gap therebetween; and a connection unit disposed in the gap and connected to the every two adjacent display units. The connection unit includes a first organic layer, a conductive layer and a second organic layer that are sequentially stacked. The first organic layer and the second organic layer are each configured to block stress causing the connection unit to deform.
    Type: Application
    Filed: September 17, 2021
    Publication date: March 24, 2022
    Inventors: Jinxiang XUE, Xiaolei ZHANG, Guoqiang WANG, Zhao CUI, Huili WU, Zhongyuan SUN, Kai SUI, Guangcai YUAN, Wenqi LIU, Yichi ZHANG
  • DISPLAY SUBSTRATE AND MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE
    Publication number: 20220077264
    Abstract: The present disclosure provides a display substrate including: a base substrate, and a thin film transistor, an oxygen supplementing functional layer and an oxygen containing layer formed on the base substrate. The thin film transistor includes: an active layer in direct contact with the oxygen containing layer, and the active layer includes an oxide semiconductor material. The oxygen supplementing functional layer includes a metal oxide material and serves as a first electrode of the display substrate. The oxygen containing layer is between the oxygen supplementing functional layer and the base substrate.
    Type: Application
    Filed: September 7, 2021
    Publication date: March 10, 2022
    Inventors: Dapeng XUE, Guangcai YUAN, Xiaochun XU, Zheng LIU, Liangliang LI, Shuilang DONG, Lizhong WANG, Niangi YAO
  • BACK PLATE AND MANUFACTURING METHOD THEREOF, METHOD FOR BONDING CHIP, AND DISPLAY DEVICE
    Publication number: 20220068873
    Abstract: A backplane (0) and a fabrication method therefor, a chip (01) bonding method, and a display device. The backplane (0) comprises: a base substrate (10); and conductive connection tubes (20) located on the base substrate (10). One end of each conductive connection tube (20) is connected to the base substrate (10), and the side walls of the conductive connection tubes (20) are provided with openings that penetrate said side walls. During the process of bonding the chip (01) to the backplane (0), when the conductive connection tubes (20) are heated, air within inner cavities of the conductive connection tubes (20) can be discharged by means of the openings on the side walls of the conductive connection tubes (20), which helps to ensure the reliability of the bonding between the chip (01) and the backplane (0).
    Type: Application
    Filed: October 19, 2020
    Publication date: March 3, 2022
    Inventors: Guangcai YUAN, Zhiwei LIANG, Ke WANG, Zhanfeng CAO
  • CMOS structure and method for manufacturing CMOS structure
    Patent number: 11264384
    Abstract: The disclosure relates to a CMOS structure and a manufacturing method thereof. The CMOS structure includes a substrate and an N-type TFT and a P-type TFT on the substrate. The N-type TFT includes a first gate electrode, a first active layer, and a first gate dielectric layer therebetween. The first active layer includes a first semiconductor layer, a second semiconductor layer of the N-type, and a third semiconductor layer of the N-type which are located at opposite ends of the first semiconductor layer and sequentially stacked in a direction away from the first gate dielectric layer. An N-type doping concentration of the second semiconductor layer is smaller than that of the third semiconductor layer. The P-type TFT includes a fifth semiconductor layer and a sixth semiconductor layer. A P-type doping concentration of the fifth semiconductor layer is smaller than that of the sixth semiconductor layer.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: March 1, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhi Wang, Feng Guan, Guangcai Yuan, Chen Xu, Lei Chen
  • Thin film transistor and manufacturing method thereof, and display apparatus
    Patent number: 11257954
    Abstract: Provided are a thin film transistor including: a base cushion layer having a recessed portion, base insulating layer, source-drain layer and active layer. The base insulating layer is located on a side of the base cushion layer where the recessed portion is located, and has a first and second partition walls that are spaced apart, and an orthographic projection region of a gap region between the first and second partition walls onto the base cushion layer is located at a region where the recessed portion is located; and both orthographic projection regions of the first and second partition walls onto the base cushion layer partially overlap with the recessed portion region; and both the source-drain layer and the active layer are located on the side of the base insulating layer away from the base cushion layer.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: February 22, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaochen Ma, Guangcai Yuan, Ce Ning, Xin Gu, Hehe Hu
  • Thin film transistor, array substrate, and method for fabricating the same
    Patent number: 11257955
    Abstract: The disclosure provides a thin film transistor, an array substrate, and a method for fabricating the same. An embodiment of the disclosure provides a method for fabricating a thin film transistor, the method including: forming a gate, a gate insulation layer, and an active layer above an underlying substrate successively; forming a patterned hydrophobic layer above the active layer, wherein the hydrophobic layer includes first pattern components, and orthographic projections of the first pattern components onto the underlying substrate overlap with a orthographic projection of a channel area at the active layer onto the underlying substrate; and forming a source and a drain above the hydrophobic layer, wherein the source and the drain are located respectively on two sides of a channel area, and in contact with the active layer.
    Type: Grant
    Filed: July 3, 2018
    Date of Patent: February 22, 2022
    Assignees: BOE Technology Group Co., Ltd., Hefei Xinsheng Optoelectronics Technology Co., Ltd.
    Inventors: Qinghe Wang, Luke Ding, Leilei Cheng, Jun Bao, Tongshang Su, Dongfang Wang, Guangcai Yuan
  • Display panel and method for fabricating the same
    Patent number: 11257849
    Abstract: A display panel and a method for fabricating the same are provided. The display panel includes: a base substrate; a first thin film transistor on one side of the base substrate, the first thin film transistor comprising: a first active layer, a first protection layer, a second protection layer, a first source and a first drain; wherein the first protection layer and the second protection layer are on one side of the first active layer away from the base substrate, and are separated from each other; the first protection layer and the second protection layer are configured to protect the first active layer from being etched during forming of a via-hole corresponding to the first source and/or a via-hole corresponding to the first drain.
    Type: Grant
    Filed: August 5, 2019
    Date of Patent: February 22, 2022
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Wei Yang, Guangcai Yuan, Ce Ning, Xinhong Lu
  • MICROFLUIDIC CHANNEL BACKPLANE AND METHOD OF MANUFACTURING THE SAME, AND MICROFLUIDIC DETECTION CHIP
    Publication number: 20220048028
    Abstract: A microfluidic channel backplane includes a base, and a plurality of microfluidic channels, a sample-adding channel and an enrichment channel that are disposed above the base. Each microfluidic channel of the plurality of microfluidic channels includes a first end and a second end. The sample-adding channel is communicated with first ends of the plurality of microfluidic channels. The enrichment channel includes a first enrichment sub-channel and a second enrichment sub-channel. The first enrichment sub-channel is communicated with second ends of the plurality of microfluidic channels, and one end of the second enrichment sub-channel is communicated with the first enrichment sub-channel.
    Type: Application
    Filed: January 23, 2020
    Publication date: February 17, 2022
    Inventors: Xiaochen MA, Ce NING, Chao LI, Jiayu HE, Xueyuan ZHOU, Xiao ZHANG, Xin GU, Zhengliang LI, Guangcai YUAN
  • Display substrate, display apparatus, method of fabricating display substrate
    Patent number: 11251399
    Abstract: The present application provides a display substrate. The display substrate includes a base substrate; a crack barrier layer on the base substrate defining a plurality of crack barrier regions in the display substrate; and a plurality of encapsulated islands on the base substrate and respectively in the plurality of crack barrier regions. Each of the plurality of encapsulated islands includes at least one of a plurality of light emitting elements; and an encapsulating layer encapsulating the at least one of a plurality of light emitting elements and forming a lateral side of a respective one of the plurality of encapsulated islands. The crack barrier layer forms a barrier wall for preventing cracks in one or more sublayers of the display substrate outside the plurality of encapsulated islands from propagating into inside of each of the plurality of encapsulated islands.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: February 15, 2022
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Zhongyuan Sun, Jingkai Ni, Jinxiang Xue, Guangcai Yuan, Wenqi Liu
  • Display substrate and manufacturing method thereof, display control method
    Patent number: 11251237
    Abstract: A display substrate and a manufacturing method thereof, and a display control method. The display substrate includes: a stretchable substrate, a flexible layer on the stretchable substrate, and a plurality of display units and connection parts on the flexible layer. The connection parts are between the display units and are flexible to allow the display substrate to stretch or retract. The connection part includes a deformation sensor configured to detect a deformation state of the connection part.
    Type: Grant
    Filed: February 2, 2019
    Date of Patent: February 15, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhongyuan Sun, Jinxiang Xue, Liang Chen, Guangcai Yuan
  • Method for preparing array substrate
    Patent number: 11251207
    Abstract: The present disclosure discloses a method for preparing an array substrate, an array substrate and a display panel, wherein the method comprises: forming a buffer layer on a substrate in a first region and a second region, wherein the buffer layer has a groove located in the second region; forming a first indium oxide thin film on the buffer layer in the first region; forming a second indium oxide thin film in the groove; performing a reduction process on the second indium oxide thin film to obtain indium particles; forming an amorphous silicon thin film in the groove, and inducing the amorphous silicon of the amorphous silicon thin film to form microcrystalline silicon at a preset temperature by using the indium particles; and removing the indium particles in the microcrystalline silicon to form a microcrystalline silicon semiconductor layer of the microcrystalline silicon thin film transistor.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: February 15, 2022
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Yupeng Gao, Guangcai Yuan, Feng Guan, Zhi Wang, Jianhua Du, Zhaohui Qiang, Chao Li
  • CMOS STRUCTURE AND METHOD FOR MANUFACTURING CMOS STRUCTURE
    Publication number: 20220045054
    Abstract: The disclosure relates to a CMOS structure and a manufacturing method thereof. The CMOS structure includes a substrate and an N-type TFT and a P-type TFT on the substrate. The N-type TFT includes a first gate electrode, a first active layer, and a first gate dielectric layer therebetween. The first active layer includes a first semiconductor layer, a second semiconductor layer of the N-type, and a third semiconductor layer of the N-type which are located at opposite ends of the first semiconductor layer and sequentially stacked in a direction away from the first gate dielectric layer. An N-type doping concentration of the second semiconductor layer is smaller than that of the third semiconductor layer. The P-type TFT includes a fifth semiconductor layer and a sixth semiconductor layer. A P-type doping concentration of the fifth semiconductor layer is smaller than that of the sixth semiconductor layer.
    Type: Application
    Filed: March 4, 2019
    Publication date: February 10, 2022
    Inventors: Zhi WANG, Feng GUAN, Guangcai YUAN, Chen XU, Lei CHEN
  • Thin film transistor, manufacturing method thereof, sensor
    Patent number: 11245008
    Abstract: The present application provides a TFT, a manufacturing method thereof, and a sensor. The TFT includes a substrate, and a source, a drain and an active layer on the substrate. The active layer includes a microchannel, and the thin film transistor is configured to detect a sample in the microchannel. When a sample to be detected enters the microchannel, the electron distribution in the active layer would be affected, which causes fluctuations in the TFT characteristics. By detecting such fluctuations, detecting the composition and property of the liquid to be detected may be achieved. Moreover, by virtue of the microchannel, the sample may be precisely controlled. The impact of the external environment may be reduced and the detection accuracy can be enhanced. Continuous monitoring instead of one-time detection of the sample may be achieved and the sample detection efficiency may be improved.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: February 8, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaochen Ma, Guangcai Yuan, Ce Ning, Hehe Hu, Xin Gu
  • DISPLAY SUBSTRATE AND DISPLAY DEVICE
    Publication number: 20220037621
    Abstract: A display substrate has at least one display region and at least one non-display region, and a non-display region is located at at least one side of a display region. The display substrate includes a base, a plurality of light-emitting devices, and an encapsulation layer. The plurality of light-emitting devices are located in the at least one display region and disposed on a side of the base. The encapsulation layer is disposed on a side of the plurality of light-emitting devices facing away from the base, and configured to encapsulate the plurality of light-emitting devices. A surface, proximate to the base, of a portion of the encapsulation layer located in the non-display region is unevenly arranged.
    Type: Application
    Filed: July 22, 2020
    Publication date: February 3, 2022
    Inventors: Jinxiang XUE, Guoqiang WANG, Zhongyuan SUN, Wenqi LIU, Jingkai NI, Kai SUI, Xiaofen WANG, Xiang ZHOU, Chao DONG, Guangcai YUAN
  • DRIVING SUBSTRATE AND MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE
    Publication number: 20220028898
    Abstract: The present disclosure provides a driving substrate including: a flexible substrate base, a plurality of thin film transistors on the flexible substrate base and a first conductive pattern layer on a side of the thin film transistors distal to the flexible substrate base. The first conductive pattern layer includes: a plurality of first connection terminals in the display region and a plurality of signal supply lines in the bendable region. A first number of first connection terminals are electrically coupled to first electrodes of the plurality of thin film transistors. The plurality of signal supply lines are coupled to a second number of first connection terminals other than the first number of first connection terminals. At least one inorganic insulating layer including a hollowed-out pattern in the bendable region is between the first conductive pattern layer and the flexible substrate base.
    Type: Application
    Filed: June 22, 2021
    Publication date: January 27, 2022
    Inventors: Xinhong LU, Fangzhen ZHANG, Guangcai YUAN, Zhanfeng CAO, Jiushi WANG, Ke WANG, Xiaoyan ZHU, Qi QI, Jingshang ZHOU, Zhaohui QIANG, Zhiwei LIANG
  • Gas screening film and manufacturing method thereof and face mask
    Patent number: 11229877
    Abstract: The present disclosure provides a gas screening film including at least one gas screening element, each of the at least one gas screening element includes a transistor including a gate, an insulation spacing layer, a first electrode, a semiconductor nanosheet separation layer and a second electrode, and the insulation spacing layer is disposed between the gate and the semiconductor nanosheet separation layer. The present disclosure further provides a manufacturing method of the gas screening film and a face mask. The gas screening film can screen and separate various different gases as necessary.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: January 25, 2022
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Guangyao Li, Guangcai Yuan, Dongfang Wang, Jun Wang, Qinghe Wang, Wei Li, Leilei Cheng
  • Array substrate and display panel
    Patent number: 11222930
    Abstract: An embodiment of the present disclosure provides an array substrate and a display panel. The array substrate includes a base substrate, organic electroluminescence components arranged on the base substrate in an array, and a photoelectric conversion component corresponding to each of the organic electroluminescence components. A luminescent spectrum of each organic electroluminescence component comprises a first waveband and a second waveband. The first waveband is determined by an emission peak of the luminescent spectrum, and is used to determine brightness and tone purity of light emitted by the organic electroluminescence component. The photoelectric conversion component is at least used to convert light of the second waveband emitted by a corresponding organic electroluminescence component into electric energy.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: January 11, 2022
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Guangcai Yuan, Kang Guo, Xin Gu, Haixu Li