Patents by Inventor Habib Hichri
Habib Hichri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220304163Abstract: By interposing a hard mask between a dielectric and photo-sensitive material it is possible to form fine via in the dielectric by dry etching without damaging the remaining surface of the dielectric.Type: ApplicationFiled: March 2, 2022Publication date: September 22, 2022Applicant: AJINOMOTO CO., INC.Inventor: Habib HICHRI
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Patent number: 10898932Abstract: A method and an apparatus for cleaning a substrate having at least one surface having a residue to be removed thereon is described. The method comprises: scanning at least an area of the surface having the residue thereon with laser light to thereby heat the surface and the residue; controlling the heating so that a part of the residue first liquefies such that the liquefied part of the residue starts flowing towards the solid part of the residue, thereby forming a meniscus with the solid part of the residue and accumulating in part on top of the solid part, the thus generated thicker layer of residue absorbing further heat to be decomposed or vaporized.Type: GrantFiled: February 12, 2018Date of Patent: January 26, 2021Assignee: SUSS MICRO TEC PHOTOMASK EQUIPMENT GMBH & CO KGInventors: Uwe Dietze, Habib Hichri, Seongkuk Lee, Davide Dattilo, Martin Samayoa
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Publication number: 20200312713Abstract: A method for patterning and filling features on a substrate includes forming a patterned dielectric layer on a substrate; forming an array of microvias in portions of the patterned dielectric layer where a feature is larger than or equal to a critical size; depositing a seed layer on the patterned dielectric layer, including the array of microvias; electroplating a metal layer on the seed layer that is on the array of microvias; and removing portions of the seed layer where no metal layer is electroplated.Type: ApplicationFiled: March 24, 2020Publication date: October 1, 2020Inventors: Habib HICHRI, Markus ARENDT, Seongkuk LEE
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Publication number: 20190247896Abstract: A method and an apparatus for cleaning a substrate having at least one surface having a residue to be removed thereon is described. The method comprises: scanning at least an area of the surface having the residue thereon with laser light to thereby heat the surface and the residue; controlling the heating so that a part of the residue first liquefies such that the liquefied part of the residue starts flowing towards the solid part of the residue, thereby forming a meniscus with the solid part of the residue and accumulating in part on top of the solid part, the thus generated thicker layer of residue absorbing further heat to be decomposed or vaporized.Type: ApplicationFiled: February 12, 2018Publication date: August 15, 2019Inventors: Uwe Dietze, Habib Hichri, Lee Seongklik, Davide Dattilo, Martin Samayoa
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Patent number: 9779932Abstract: A method of removing post-laser debris from a wafer includes, for an embodiment, forming a sacrificial layer over a layer to be patterned, patterning the sacrificial layer and the layer to be patterned using laser ablation, and removing the sacrificial layer and debris deposited on the sacrificial layer with water. The sacrificial layer includes a water soluble binder and a water soluble ultraviolet (UV) absorbent. Systems for removing the post-laser debris are also described.Type: GrantFiled: December 11, 2015Date of Patent: October 3, 2017Assignee: SUSS MicroTec Photonic Systems Inc.Inventor: Habib Hichri
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Publication number: 20170170003Abstract: A method of removing post-laser debris from a wafer includes, for an embodiment, forming a sacrificial layer over a layer to be patterned, patterning the sacrificial layer and the layer to be patterned using laser ablation, and removing the sacrificial layer and debris deposited on the sacrificial layer with water. The sacrificial layer includes a water soluble binder and a water soluble ultraviolet (UV) absorbent. Systems for removing the post-laser debris are also described.Type: ApplicationFiled: December 11, 2015Publication date: June 15, 2017Inventor: Habib Hichri
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Patent number: 9064848Abstract: Antireflective residues during pattern transfer and consequential short circuiting are eliminated by employing an underlying sacrificial layer to ensure complete removal of the antireflective layer. Embodiments include forming a hard mask layer over a conductive layer, e.g., a silicon substrate, forming the sacrificial layer over the hard mask layer, forming an optical dispersive layer over the sacrificial layer, forming a silicon anti-reflective coating layer over the optical dispersive layer, forming a photoresist layer over the silicon anti-reflective coating layer, where the photoresist layer defines a pattern, etching to transfer the pattern to the hard mask layer, and stripping at least the optical dispersive layer and the sacrificial layer.Type: GrantFiled: November 3, 2014Date of Patent: June 23, 2015Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.Inventors: Xiang Hu, Richard S. Wise, Habib Hichri, Catherine Labelle
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Publication number: 20150054179Abstract: Antireflective residues during pattern transfer and consequential short circuiting are eliminated by employing an underlying sacrificial layer to ensure complete removal of the antireflective layer. Embodiments include forming a hard mask layer over a conductive layer, e.g., a silicon substrate, forming the sacrificial layer over the hard mask layer, forming an optical dispersive layer over the sacrificial layer, forming a silicon anti-reflective coating layer over the optical dispersive layer, forming a photoresist layer over the silicon anti-reflective coating layer, where the photoresist layer defines a pattern, etching to transfer the pattern to the hard mask layer, and stripping at least the optical dispersive layer and the sacrificial layer.Type: ApplicationFiled: November 3, 2014Publication date: February 26, 2015Inventors: Xiang HU, Richard S. WISE, Habib HICHRI, Catherine LABELLE
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Patent number: 8901005Abstract: Embodiments of the invention may include first providing a stack of layers including a semiconductor substrate, a buried oxide layer on the semiconductor substrate, a semiconductor-on-insulator layer on the buried-oxide layer, a nitride layer on the semiconductor-on-insulator layer, and a silicon oxide layer on the nitride layer. A first opening and second opening with a smaller cross-sectional area than the first opening are then formed in the silicon oxide layer, the nitride layer, the semiconductor-on-insulator layer, and the buried-oxide layer. The first opening and the second opening are then etched with a first etching gas. The first opening and the second opening are then etched with a second etching gas, which includes the first etching gas and a halogenated silicon compound, for example, silicon tetrafluoride or silicon tetrachloride. In one embodiment, the first etching gas includes hydrogen bromide, nitrogen trifluoride, and oxygen.Type: GrantFiled: April 18, 2013Date of Patent: December 2, 2014Assignee: International Business Machines CorporationInventors: Habib Hichri, Xi Li, Richard Wise
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Patent number: 8901006Abstract: Antireflective residues during pattern transfer and consequential short circuiting are eliminated by employing an underlying sacrificial layer to ensure complete removal of the antireflective layer. Embodiments include forming a hard mask layer over a conductive layer, e.g., a silicon substrate, forming the sacrificial layer over the hard mask layer, forming an optical dispersive layer over the sacrificial layer, forming a silicon anti-reflective coating layer over the optical dispersive layer, forming a photoresist layer over the silicon anti-reflective coating layer, where the photoresist layer defines a pattern, etching to transfer the pattern to the hard mask layer, and stripping at least the optical dispersive layer and the sacrificial layer.Type: GrantFiled: April 6, 2011Date of Patent: December 2, 2014Assignees: GlobalFoundries Singapore PTE. Ltd., International Business Machines CorporationInventors: Xiang Hu, Richard S. Wise, Habib Hichri, Catherine Labelle
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Patent number: 8822342Abstract: A method of forming a device is disclosed. The method includes providing a substrate prepared with a dielectric layer having first and second regions. The first region comprises wide features and the second region comprises narrow features. A depth delta exists between bottoms of the wide and narrow features. A non-conformal layer is formed on the substrate and it lines the wide and narrow trenches in the first and second regions. The non-conformal layer is removed. Removing the non-conformal layer reduces the depth delta between the bottoms of the wide and narrow features in the first and second region.Type: GrantFiled: December 30, 2010Date of Patent: September 2, 2014Assignees: GLOBALFOUNDRIES Singapore Pte. Ltd.Inventors: Ravi Prakash Srivastava, Oluwafemi. O. Ogunsola, Craig Child, Muhammed Shafi Kurikka Valappil Pallachalil, Habib Hichri, Matthew Angyal, Hideshi Miyajima
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Patent number: 8735284Abstract: A metal seed composition useful in seeding a metal diffusion barrier or conductive metal layer on a semiconductor or dielectric substrate, the composition comprising: a nanoscopic metal component that includes a metal useful as a metal diffusion barrier or conductive metal; an adhesive component for attaching said nanoscopic metal component on said semiconductor or dielectric substrate; and a linker component that links said nanoscopic metal component with said adhesive component. Semiconductor and dielectric substrates coated with the seed compositions, as well as methods for depositing the seed compositions, are also described.Type: GrantFiled: November 12, 2013Date of Patent: May 27, 2014Assignee: International Business Machines CorporationInventors: Kelly Malone, Habib Hichri
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Publication number: 20140072796Abstract: A metal seed composition useful in seeding a metal diffusion barrier or conductive metal layer on a semiconductor or dielectric substrate, the composition comprising: a nanoscopic metal component that includes a metal useful as a metal diffusion barrier or conductive metal; an adhesive component for attaching said nanoscopic metal component on said semiconductor or dielectric substrate; and a linker component that links said nanoscopic metal component with said adhesive component. Semiconductor and dielectric substrates coated with the seed compositions, as well as methods for depositing the seed compositions, are also described.Type: ApplicationFiled: November 12, 2013Publication date: March 13, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kelly Malone, Habib Hichri
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Patent number: 8647535Abstract: A metal seed composition useful in seeding a metal diffusion barrier or conductive metal layer on a semiconductor or dielectric substrate, the composition comprising: a nanoscopic metal component that includes a metal useful as a metal diffusion barrier or conductive metal; an adhesive component for attaching said nanoscopic metal component on said semiconductor or dielectric substrate; and a linker component that links said nanoscopic metal component with said adhesive component. Semiconductor and dielectric substrates coated with the seed compositions, as well as methods for depositing the seed compositions, are also described.Type: GrantFiled: January 7, 2011Date of Patent: February 11, 2014Assignee: International Business Machines CorporationInventors: Kelly Malone, Habib Hichri
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Patent number: 8642475Abstract: A method of manufacturing an integrated circuit system includes: providing a substrate; forming a polysilicon layer over the substrate; forming an anti-reflective coating layer over the polysilicon layer; etching an anti-reflective coating pattern into the anti-reflective coating layer leaving an anti-reflective coating residue over the polysilicon layer; and etching the anti-reflective coating residue with an etchant gas mixture comprising hydrogen bromide, chlorine, and oxygen to remove the anti-reflective coating residue for mitigating the formation of a polysilicon protrusion.Type: GrantFiled: December 21, 2010Date of Patent: February 4, 2014Assignees: GLOBALFOUNDRIES Singapore Pte. Ltd., International Business Machines CorporationInventors: Xiang Hu, Helen Wang, Arifuzzaman (Arif) Sheikh, Habib Hichri, Richard Wise
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Publication number: 20130295773Abstract: Embodiments of the invention may include first providing a stack of layers including a semiconductor substrate, a buried oxide layer on the semiconductor substrate, a semiconductor-on-insulator layer on the buried-oxide layer, a nitride layer on the semiconductor-on-insulator layer, and a silicon oxide layer on the nitride layer. A first opening and second opening with a smaller cross-sectional area than the first opening are then formed in the silicon oxide layer, the nitride layer, the semiconductor-on-insulator layer, and the buried-oxide layer. The first opening and the second opening are then etched with a first etching gas. The first opening and the second opening are then etched with a second etching gas, which includes the first etching gas and a halogenated silicon compound, for example, silicon tetrafluoride or silicon tetrachloride. In one embodiment, the first etching gas includes hydrogen bromide, nitrogen trifluoride, and oxygen.Type: ApplicationFiled: April 18, 2013Publication date: November 7, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Habib Hichri, Xi Li, Richard Wise
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Patent number: 8492280Abstract: Embodiments of the invention may include first providing a stack of layers including a semiconductor substrate, a buried oxide layer on the semiconductor substrate, a semiconductor-on-insulator layer on the buried-oxide layer, a nitride layer on the semiconductor-on-insulator layer, and a silicon oxide layer on the nitride layer. A first opening and second opening with a smaller cross-sectional area than the first opening are then formed in the silicon oxide layer, the nitride layer, the semiconductor-on-insulator layer, and the buried-oxide layer. The first opening and the second opening are then etched with a first etching gas. The first opening and the second opening are then etched with a second etching gas, which includes the first etching gas and a halogenated silicon compound, for example, silicon tetrafluoride or silicon tetrachloride. In one embodiment, the first etching gas includes hydrogen bromide, nitrogen trifluoride, and oxygen.Type: GrantFiled: May 7, 2012Date of Patent: July 23, 2013Assignee: International Business Machines CorporationInventors: Habib Hichri, Xi Li, Richard S. Wise
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Publication number: 20120256299Abstract: Antireflective residues during pattern transfer and consequential short circuiting are eliminated by employing an underlying sacrificial layer to ensure complete removal of the antireflective layer. Embodiments include forming a hard mask layer over a conductive layer, e.g., a silicon substrate, forming the sacrificial layer over the hard mask layer, forming an optical dispersive layer over the sacrificial layer, forming a silicon anti-reflective coating layer over the optical dispersive layer, forming a photoresist layer over the silicon anti-reflective coating layer, where the photoresist layer defines a pattern, etching to transfer the pattern to the hard mask layer, and stripping at least the optical dispersive layer and the sacrificial layer.Type: ApplicationFiled: April 6, 2011Publication date: October 11, 2012Inventors: Xiang HU, Richard S. WISE, Habib HICHRI, Catherine LABELLE
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Publication number: 20120178241Abstract: A metal seed composition useful in seeding a metal diffusion barrier or conductive metal layer on a semiconductor or dielectric substrate, the composition comprising: a nanoscopic metal component that includes a metal useful as a metal diffusion barrier or conductive metal; an adhesive component for attaching said nanoscopic metal component on said semiconductor or dielectric substrate; and a linker component that links said nanoscopic metal component with said adhesive component. Semiconductor and dielectric substrates coated with the seed compositions, as well as methods for depositing the seed compositions, are also described.Type: ApplicationFiled: January 7, 2011Publication date: July 12, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kelly Malone, Habib Hichri
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Publication number: 20120168957Abstract: A method of forming a device is disclosed. The method includes providing a substrate prepared with a dielectric layer having first and second regions. The first region comprises wide features and the second region comprises narrow features. A depth delta exists between bottoms of the wide and narrow features. A non-conformal layer is formed on the substrate and it lines the wide and narrow trenches in the first and second regions. The non-conformal layer is removed. Removing the non-conformal layer reduces the depth delta between the bottoms of the wide and narrow features in the first and second region.Type: ApplicationFiled: December 30, 2010Publication date: July 5, 2012Applicants: GLOBALFOUNDRIES SINGAPORE PTE. LTD., INTERNATIONAL BUSINESS MACHINES CORPORATION, TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC., INFINEON TECHNOLOGIES NORTH AMERICA CORP., ADVANCED MICRO DEVICES CORPORATIONInventors: Ravi Prakash SRIVASTAVA, Oluwafemi O. OGUNSOLA, Craig CHILD, Muhammed Shafi Kurikka Valappil PALLACHALIL, Habib HICHRI, Matthew ANGYAL, Hideshi MIYAJIMA