Patents by Inventor Hae Kang Jung

Hae Kang Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200293475
    Abstract: A system includes a data transmission unit, a termination resistor and a data reception unit. The data transmission unit may drive a data transmission line based on data, and drive the data transmission line to a voltage level corresponding to a termination voltage during a specified operation period. The termination resistor may be coupled between the data transmission line and a termination node. The data reception unit may receive a signal transmitted through the data transmission line.
    Type: Application
    Filed: June 2, 2020
    Publication date: September 17, 2020
    Applicant: SK hynix Inc.
    Inventor: Hae Kang JUNG
  • Publication number: 20200274527
    Abstract: A signal driver circuit includes a first inversion driver, a second inversion driver and an emphasis driver. The first inversion driver is configured to receive a first signal, and output a second signal by inversion-driving the first signal. The second inversion driver is configured to receive the second signal, and output a third signal by inversion-driving the second signal. The emphasis driver is configured to receive the third signal, inversion-drive the third signal, and combine the inversion-driven signal to the first signal.
    Type: Application
    Filed: May 8, 2020
    Publication date: August 27, 2020
    Applicant: SK hynix Inc.
    Inventor: Hae Kang JUNG
  • Publication number: 20200266808
    Abstract: A signal driver circuit includes a first inversion driver, a second inversion driver and an emphasis driver. The first inversion driver is configured to receive a first signal, and output a second signal by inversion-driving the first signal. The second inversion driver is configured to receive the second signal, and output a third signal by inversion-driving the second signal. The emphasis driver is configured to receive the third signal, inversion-drive the third signal, and combine the inversion-driven signal to the first signal.
    Type: Application
    Filed: May 7, 2020
    Publication date: August 20, 2020
    Applicant: SK hynix Inc.
    Inventor: Hae Kang JUNG
  • Publication number: 20200252093
    Abstract: A circuit may include a transmitter for generating a signal indicative of input data, an on-chip channel for transmitting the signal from the transmitter, and a receiver comprising a receiving terminal that has a negative resistance value as input resistance of the receiving terminal, the receiver generating a signal indicative of recovered data based on the transmitted signal through the on-chip channel. The circuit may recycle a portion of charge stored in the on-chip channel using charge recycling, and the charge recycling is associated with the negative resistance value of the input resistance.
    Type: Application
    Filed: April 23, 2020
    Publication date: August 6, 2020
    Inventors: Hong June PARK, Ji Hoon LIM, Hae Kang JUNG
  • Patent number: 10734041
    Abstract: A semiconductor apparatus includes a first chip and a second chip. The first chip provides a first termination control signal to the second chip and the second chip provides a termination resistance for the first chip based on the first termination control signal, when the first chip receives data.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: August 4, 2020
    Assignee: SK hynix Inc.
    Inventor: Hae Kang Jung
  • Patent number: 10734951
    Abstract: A receiver circuit receives a signal from a semiconductor device. The receiver circuit includes an input buffer including a first plurality of transistors, the input buffer being configured to detect a fabrication condition of the receiver circuit, generate a control signal according to the detected fabrication condition, and control a gain of an input signal by adjusting a number of operating transistors among the first plurality of transistors in response to the control signal; and a latch circuit configured to latch an output signal of the input buffer, and adjust threshold voltages of a second plurality of transistors in response to a test signal.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: August 4, 2020
    Assignees: SK hynix Inc., NORTHEASTERN UNIVERSITY
    Inventors: Hae Kang Jung, Yong Suk Choi, Yong Bin Kim, Gyunam Jeon, Dae-Han Kwon, Joo Hwan Cho
  • Patent number: 10715308
    Abstract: A transmitting circuit may include a clock generation circuit and a serializer. The clock generation circuit may generate a plurality of output clock signals by performing an emphasis operation for a plurality of clock signals based on a plurality of data. The serializer may output the plurality of data as output data in synchronization with the plurality of output clock signals.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: July 14, 2020
    Assignee: SK hynix Inc.
    Inventor: Hae Kang Jung
  • Patent number: 10698848
    Abstract: A system includes a data transmission unit, a termination resistor and a data reception unit. The data transmission unit may drive a data transmission line based on data, and drive the data transmission line to a voltage level corresponding to a termination voltage during a specified operation period. The termination resistor may be coupled between the data transmission line and a termination node. The data reception unit may receive a signal transmitted through the data transmission line.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: June 30, 2020
    Assignee: SK hynix Inc.
    Inventor: Hae Kang Jung
  • Publication number: 20200202908
    Abstract: A semiconductor apparatus includes a first chip and a second chip. The first chip provides a first termination control signal to the second chip and the second chip provides a termination resistance for the first chip based on the first termination control signal, when the first chip receives data.
    Type: Application
    Filed: August 23, 2019
    Publication date: June 25, 2020
    Applicant: SK hynix Inc.
    Inventor: Hae Kang JUNG
  • Patent number: 10673473
    Abstract: A circuit may include a transmitter for generating a signal indicative of input data, an on-chip channel for transmitting the signal from the transmitter, and a receiver comprising a receiving terminal that has a negative resistance value as input resistance of the receiving terminal, the receiver generating a signal indicative of recovered data based on the transmitted signal through the on-chip channel. The circuit may recycle a portion of charge stored in the on-chip channel using charge recycling, and the charge recycling is associated with the negative resistance value of the input resistance.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: June 2, 2020
    Assignees: SK hynix Inc., POSTECH ACADEMY-INDUSTRY FOUNDATION
    Inventors: Hong June Park, Ji Hoon Lim, Hae Kang Jung
  • Publication number: 20200151135
    Abstract: A data transmission circuit includes a data bus inversion encoding circuit configured to compare previous output data and current output data, invert or non-invert the current output data to control the number of data transitions; and transmitters configured to drive signal transmission lines based on outputs of the data bus inversion encoding circuit.
    Type: Application
    Filed: January 17, 2020
    Publication date: May 14, 2020
    Applicant: SK hynix Inc.
    Inventors: Hae Kang JUNG, Hong Joo SONG
  • Patent number: 10629253
    Abstract: A semiconductor package for performing a reset operation includes a first semiconductor device including a first resistor element coupled to a reset pin, the first semiconductor device configured to be applied with a reset signal through the reset pin such that the reset operation is performed. The semiconductor package includes a second semiconductor device including a second resistor element coupled to the reset pin, the second semiconductor device configured to be applied with the reset signal through the reset pin such that the reset operation is performed. The first resistor element and the second resistor element may be selectively coupled to the reset pin when the reset operation is performed.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: April 21, 2020
    Assignee: SK hynix Inc.
    Inventors: Keun Soo Song, Hongjoo Song, Hae Kang Jung
  • Patent number: 10580466
    Abstract: A transmitting device includes a calibration circuit and a transmission circuit. The calibration circuit generates calibration codes by performing a calibration operation. The calibration circuit also generates compensation calibration codes by increasing or decreasing values of the calibration codes according to whether a number of codes among the calibration codes having a predetermined level is greater than or equal to a threshold value. The transmission circuit drives a signal transmission line based on an input signal and the compensation calibration codes.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: March 3, 2020
    Assignee: SK hynix Inc.
    Inventor: Hae Kang Jung
  • Patent number: 10572431
    Abstract: A data transmission circuit includes a data bus inversion encoding circuit configured to compare previous output data and current output data, invert or non-invert the current output data to control the number of data transitions; and transmitters configured to drive signal transmission lines based on outputs of the data bus inversion encoding circuit.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: February 25, 2020
    Assignee: SK hynix Inc.
    Inventors: Hae Kang Jung, Hong Joo Song
  • Patent number: 10522203
    Abstract: A semiconductor device may include a calibration circuit and an output circuit. The calibration circuit may perform a calibration operation for setting a resistance value of the output circuit. The calibrations circuit may perform the calibration operation by being coupled, through a signal transmission line, to a reference resistor provided in another semiconductor device.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: December 31, 2019
    Assignee: SK hynix Inc.
    Inventor: Hae Kang Jung
  • Publication number: 20190319779
    Abstract: A transmitting circuit may include a clock generation circuit and a serializer. The clock generation circuit may generate a plurality of output clock signals by performing an emphasis operation for a plurality of clock signals based on a plurality of data. The serializer may output the plurality of data as output data in synchronization with the plurality of output clock signals.
    Type: Application
    Filed: November 26, 2018
    Publication date: October 17, 2019
    Applicant: SK hynix Inc.
    Inventor: Hae Kang JUNG
  • Publication number: 20190312550
    Abstract: A receiver circuit receives a signal from a semiconductor device. The receiver circuit includes an input buffer including a first plurality of transistors, the input buffer being configured to detect a fabrication condition of the receiver circuit, generate a control signal according to the detected fabrication condition, and control a gain of an input signal by adjusting a number of operating transistors among the first plurality of transistors in response to the control signal; and a latch circuit configured to latch an output signal of the input buffer, and adjust threshold voltages of a second plurality of transistors in response to a test signal.
    Type: Application
    Filed: April 4, 2018
    Publication date: October 10, 2019
    Inventors: Hae Kang JUNG, Yong Suk CHOI, Yong Bin KIM, Gyunam JEON, Dae-Han KWON, Joo Hwan CHO
  • Publication number: 20190295624
    Abstract: A semiconductor package for performing a reset operation includes a first semiconductor device including a first resistor element coupled to a reset pin, the first semiconductor device configured to be applied with a reset signal through the reset pin such that the reset operation is performed. The semiconductor package includes a second semiconductor device including a second resistor element coupled to the reset pin, the second semiconductor device configured to be applied with the reset signal through the reset pin such that the reset operation is performed. The first resistor element and the second resistor element may be selectively coupled to the reset pin when the reset operation is performed.
    Type: Application
    Filed: July 24, 2018
    Publication date: September 26, 2019
    Applicant: SK hynix Inc.
    Inventors: Keun Soo SONG, Hongjoo SONG, Hae Kang JUNG
  • Publication number: 20190244643
    Abstract: A transmitting device includes a calibration circuit and a transmission circuit. The calibration circuit generates calibration codes by performing a calibration operation. The calibration circuit also generates compensation calibration codes by increasing or decreasing values of the calibration codes according to whether a number of codes among the calibration codes having a predetermined level is greater than or equal to a threshold value. The transmission circuit drives a signal transmission line based on an input signal and the compensation calibration codes.
    Type: Application
    Filed: April 17, 2019
    Publication date: August 8, 2019
    Applicant: SK hynix Inc.
    Inventor: Hae Kang JUNG
  • Patent number: 10354703
    Abstract: A semiconductor device may include a calibration circuit and an output circuit. The calibration circuit may perform a calibration operation for setting a resistance value of the output circuit. The calibrations circuit may perform the calibration operation by being coupled, through a signal transmission line, to a reference resistor provided in another semiconductor device.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: July 16, 2019
    Assignee: SK hynix Inc.
    Inventor: Hae Kang Jung