Patents by Inventor Hajime Kimura

Hajime Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240142832
    Abstract: To provide a display device or the like that enables stable curing of a resin. The display device includes a first circuit and a second circuit over the same substrate. The first circuit has a function of performing display; the second circuit has a function of driving the first circuit; the second circuit includes a transistor and a capacitor; the transistor includes an oxide semiconductor layer over a first insulating layer; the capacitor includes a first conductive layer, a second insulating layer, and a second conductive layer; the first conductive layer is positioned over the first insulating layer; one of a source and a drain of the transistor is electrically connected to the second conductive layer; and the first conductive layer and the oxide semiconductor layer include the same metal element.
    Type: Application
    Filed: December 26, 2023
    Publication date: May 2, 2024
    Inventors: Hajime KIMURA, Tetsuji ISHITANI
  • Publication number: 20240145485
    Abstract: A semiconductor device including a circuit which does not easily deteriorate is provided. The semiconductor device includes a first transistor, a second transistor, a first switch, a second switch, and a third switch. A first terminal of the first transistor is connected to a first wiring. A second terminal of the first transistor is connected to a second wiring. A gate and a first terminal of the second transistor are connected to the first wiring. A second terminal of the second transistor is connected to a gate of the first transistor. The first switch is connected between the second wiring and a third wiring. The second switch is connected between the second wiring and the third wiring. The third switch is connected between the gate of the first transistor and the third wiring.
    Type: Application
    Filed: October 24, 2023
    Publication date: May 2, 2024
    Inventors: Hajime KIMURA, Atsushi UMEZAKI
  • Publication number: 20240146140
    Abstract: In this stator, lead wire extended portions and a power wire extended portion are extended from a resin portion by an extended portion separating portion such that the lead wire extended portions are separated from the power wire extended portion by distances that are greater than a maximum value of the width of clearance between an end-side portion of the lead wire extended portion and a facing portion located next to the end-side portion, the resin portion being provided so as to cover lead wire portions and a power wire portion.
    Type: Application
    Filed: February 1, 2022
    Publication date: May 2, 2024
    Applicants: AISIN CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Toshiya SUGIYAMA, Munehiro TAKAHASHI, Keisuke KIMURA, Ken TAKEDA, Takahito NOZAWA, Takashi MATSUMOTO, Yoshitada YAMAGISHI, Katsuhide KITAGAWA, Hajime KATO
  • Publication number: 20240147733
    Abstract: A semiconductor device that can perform product-sum operation with low power consumption is provided. The semiconductor device includes first and second circuits; the first circuit includes a first holding node and the second circuit includes a second holding node. The first circuit is electrically connected to first and second input wirings and first and second wirings, the second circuit is electrically connected to the first and second input wirings and the first and second wirings, and the first and second circuits each have a function of holding first and second potentials corresponding to first data at the first and second holding nodes. When a potential corresponding to second data is input to each of the first and second input wirings, the first circuit outputs a current to one of the first wiring and the second wiring and the second circuit outputs a current to the other of the first wiring and the second wiring.
    Type: Application
    Filed: December 21, 2023
    Publication date: May 2, 2024
    Inventors: Hajime KIMURA, Yoshiyuki KUROKAWA
  • Patent number: 11960174
    Abstract: A pixel electrode or a common electrode is a light-transmissive conductive film; therefore, it is formed of ITO conventionally. Accordingly, the number of manufacturing steps and masks, and manufacturing cost have been increased. An object of the present invention is to provide a semiconductor device, a liquid crystal display device, and an electronic appliance each having a wide viewing angle, less numbers of manufacturing steps and masks, and low manufacturing cost compared with a conventional device. A semiconductor layer of a transistor, a pixel electrode, and a common electrode of a liquid crystal element are formed in the same step.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Patent number: 11961894
    Abstract: A semiconductor device includes a semiconductor layer over a substrate; a gate insulating film covering the semiconductor layer; a gate wiring including a gate electrode, which is provided over the gate insulating film and is formed by stacking a first conductive layer and a second conductive layer; an insulating film covering the semiconductor layer and the gate wiring including the gate electrode; and a source wiring including a source electrode, which is provided over the insulating film, is electrically connected to the semiconductor layer, and is formed by stacking a third conductive layer and a fourth conductive layer. The gate electrode is formed using the first conductive layer. The gate wiring is formed using the first conductive layer and the second conductive layer. The source electrode is formed using the third conductive layer. The source wiring is formed using the third conductive layer and the fourth conductive layer.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Patent number: 11961843
    Abstract: An object is to improve the drive capability of a semiconductor device. The semiconductor device includes a first transistor and a second transistor. A first terminal of the first transistor is electrically connected to a first wiring. A second terminal of the first transistor is electrically connected to a second wiring. A gate of the second transistor is electrically connected to a third wiring. A first terminal of the second transistor is electrically connected to the third wiring. A second terminal of the second transistor is electrically connected to a gate of the first transistor. A channel region is formed using an oxide semiconductor layer in each of the first transistor and the second transistor. The off-state current of each of the first transistor and the second transistor per channel width of 1 ?m is 1 aA or less.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Atsushi Umezaki, Shunpei Yamazaki
  • Patent number: 11954276
    Abstract: A touch panel including an oxide semiconductor film having conductivity is provided. The touch panel includes a transistor, a second insulating film, and a touch sensor. The transistor includes a gate electrode; a gate insulating film; a first oxide semiconductor film; a source electrode and a drain electrode; a first insulating film; and a second oxide semiconductor film. The second insulating film is over the second oxide semiconductor film so that the second oxide semiconductor film is positioned between the first insulating film and the second insulating film. The touch sensor includes a first electrode and a second electrode. One of the first and second electrodes includes the second oxide semiconductor film.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: April 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hajime Kimura, Masami Jintyou, Yasuharu Hosaka, Naoto Goto, Takahiro Iguchi, Daisuke Kurosaki, Junichi Koezuka
  • Patent number: 11955537
    Abstract: A semiconductor device includes a substrate having an insulating surface; a light-transmitting first electrode provided over the substrate; a light-transmitting second electrode provided over the substrate; a light-transmitting semiconductor layer provided so as to be electrically connected to the first electrode and the second electrode; a first wiring electrically connected to the first electrode; an insulating layer provided so as to cover at least the semiconductor layer; a light-transmitting third electrode provided over the insulating layer in a region overlapping with the semiconductor layer; and a second wiring electrically connected to the third electrode.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: April 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Publication number: 20240113138
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a capacitor, a transistor, and a first insulating layer. The capacitor includes first and second conductive layers and a second insulating layer. The second insulating layer is in contact with a side surface of the first conductive layer, and the second conductive layer covers at least part of the side surface of the first conductive layer with the second insulating layer therebetween. The transistor includes third to fifth conductive layers, a semiconductor layer, and a third insulating layer. The third conductive layer is in contact with a top surface of the first conductive layer. The first insulating layer is provided over the third conductive layer, and the fourth conductive layer is provided over the first insulating layer. The first insulating layer and the fourth conductive layer include an opening portion reaching the third conductive layer.
    Type: Application
    Filed: September 25, 2023
    Publication date: April 4, 2024
    Inventors: Hajime KIMURA, Kentaro HAYASHI, Shunpei YAMAZAKI
  • Publication number: 20240105133
    Abstract: A low-resolution image is displayed at higher resolution and afterimages are reduced. Resolution is made higher by super-resolution processing. In this case, the super-resolution processing is performed after frame interpolation processing is performed. Further, in that case, the super-resolution processing is performed using a plurality of processing systems. Therefore, even when frame frequency is made higher, the super-resolution processing can be performed at high speed. Further, since frame rate doubling is performed by the frame interpolation processing, afterimages can be reduced.
    Type: Application
    Filed: December 4, 2023
    Publication date: March 28, 2024
    Inventor: Hajime KIMURA
  • Publication number: 20240105855
    Abstract: A novel semiconductor device is provided. A component extending in a first direction, and a first conductor and a second conductor extending in a second direction are provided. The component includes a third conductor, a first insulator, a first semiconductor, and a second insulator. In a first intersection portion of the component and the first conductor, the first insulator, the first semiconductor, the second insulator, a second semiconductor, and a third insulator are provided concentrically. In a second intersection portion of the component and the second conductor, the first insulator, the first semiconductor, the second insulator, a fourth conductor, and a fourth insulator are provided concentrically around the third conductor.
    Type: Application
    Filed: December 6, 2023
    Publication date: March 28, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Hitoshi KUNITAKE
  • Patent number: 11943929
    Abstract: A semiconductor device with a large storage capacity per unit area is provided. The semiconductor device includes a first insulator including a first opening, a first conductor that is over the first insulator and includes a second opening, a second insulator that is over the first insulator and includes a third opening, and an oxide penetrating the first opening, the second opening, and the third opening. The oxide includes a first region at least in the first opening, a second region at least in the second opening, and a third region at least in the third opening. The resistances of the first region and the third region are lower than the resistance of the second region.
    Type: Grant
    Filed: March 31, 2023
    Date of Patent: March 26, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hajime Kimura, Takanori Matsuzaki, Kiyoshi Kato, Satoru Okamoto
  • Patent number: 11942483
    Abstract: A semiconductor device includes a pixel electrode and a transistor which includes a first gate electrode, a first insulating layer over the first gate electrode, a semiconductor layer over the first insulating layer, a second insulating layer over the semiconductor layer, and a second gate electrode. The pixel electrode and the second gate electrode are provided over the second insulating layer. The first gate electrode has a region overlapping with the semiconductor layer with the first insulating layer provided therebetween. The second gate electrode has a region overlapping with the semiconductor layer with the second insulating layer provided therebetween. A first region is at least part of a region where the second gate electrode overlaps with the semiconductor layer. A second region is at least part of a region where the pixel electrode is provided. The second insulating layer is thinner in the first region than in the second region.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: March 26, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Patent number: 11940697
    Abstract: To improve viewing angle characteristics by varying voltage which is applied between liquid crystal elements. A liquid crystal display device in which one pixel is provided with three or more liquid crystal elements and the level of voltage which is applied is varied between the liquid crystal elements is varied. In order to vary the level of the voltage which is applied between the liquid crystal elements, an element which divides the applied voltage is provided. In order to vary the level of the applied voltage, a capacitor, a resistor, a transistor, or the like is used. Viewing angle characteristics can be improved by varying the level of the voltage which is applied between the liquid crystal elements.
    Type: Grant
    Filed: April 7, 2022
    Date of Patent: March 26, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Publication number: 20240092307
    Abstract: An actuator of an airbag device includes a main body portion, which is attached to an attachment base, and a cap including a fitting protruding portion that is inserted into a fitting recessed portion of the main body portion. The fitting protruding portion has a holding portion, which is inserted into a holding hole of a coupling member when fitted to the main body portion and holds a leading end portion of the coupling member, and a movement permitting unit that, when a ceiling portion of the cap is subjected to pressure of a combustion gas of a squib, causes the ceiling portion to move, and causes the holding portion to move from a holding position, wherein the holding portion is inserted into the holding hole of the coupling member, to a holding released position, wherein the holding portion is removed from the holding hole.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Inventors: Yusuke KAWAMURA, Keigo KIMURA, Koji KAWAMURA, Hajime KITTE, Yoshio ONO
  • Publication number: 20240094768
    Abstract: To provide an electronic device capable of a variety of display. To provide an electronic device capable of being operated in a variety of ways. An electronic device includes a display device and first to third surfaces. The first surface includes a region in contact with the second surface, the second surface includes a region in contact with the third surface, and the first surface includes a region opposite to the third surface. The display device includes first to third display regions. The first display region includes a region overlapping with the first surface, the second display region includes a region overlapping with the second surface, and the third display region includes a region overlapping with the third surface. The first display region has a larger area than the third display region.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA
  • Publication number: 20240094574
    Abstract: A touch panel which is thin, has a simple structure, or is easily incorporated into an electronic device is provided. The touch panel includes a first substrate, a second substrate, a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, liquid crystal, and an FPC. The first conductive layer has a function of a pixel electrode. The second conductive layer has a function of a common electrode. The third and fourth conductive layers each have a function of an electrode of a touch sensor. The FPC is electrically connected to the fourth conductive layer. The first, second, third, and fourth conductive layers and the liquid crystal are provided between the first and second substrates. The first, second, and third conductive layers are provided over the first substrate. The FPC is provided over the first substrate.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Hajime KIMURA, Shunpei YAMAZAKI
  • Patent number: 11935965
    Abstract: A display device including a pixel having a memory. The pixel includes at least a display element, a capacitor, an inverter, and a switch. The switch is controlled with a signal held in the capacitor and a signal output from the inverter so that voltage is supplied to the display element. The inverter and the switch can be constituted by transistors with the same polarity. A semiconductor layer included in the pixel may be formed using a light-transmitting material. Moreover, a gate electrode, a drain electrode, and a capacitor electrode may be formed using a light-transmitting conductive layer. The pixel is formed using a light-transmitting material in such a manner, whereby the display device can be a transmissive display device while including a pixel having a memory.
    Type: Grant
    Filed: April 20, 2023
    Date of Patent: March 19, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Kengo Akimoto, Masashi Tsubuku, Toshinari Sasaki
  • Publication number: 20240088192
    Abstract: The present invention provides a technology which realizes a reliable semiconductor device including a photosensor device by preventing pent roofs of edges of a P+ layer from being generated and a metal wiring installed over the P+ layer from coming down while securing the electrical conductivity of the P+ layer. The semiconductor device includes a photosensor including a photodiode formed on a substrate. The photodiode includes: a cathode electrode; a laminated structure that is formed on the cathode electrode and in which an N+ layer, an I layer, and a P+ layer are laminated in this order; an anode electrode formed on the P+ layer; a first insulating film formed so as to cover a portion of the anode electrode and edges of the laminated structure; and a metal wiring connected to the anode electrode. The edges of the laminated structure are formed in forward tapered shapes in a cross-sectional view.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Applicant: Japan Display Inc.
    Inventors: Hajime WATAKABE, Akihiro HANADA, Marina MOCHIZUKI, Ryo ONODERA, Fumiya KIMURA, Isao SUZUMURA