Patents by Inventor Hajime Kimura

Hajime Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190258117
    Abstract: The present invention has a pixel which includes a first switch, a second switch, a third switch, a first resistor, a second resistor, a first liquid crystal element, and a second liquid crystal element. A pixel electrode of the first liquid crystal element is electrically connected to a signal line through the first switch. The pixel electrode of the first liquid crystal element is electrically connected to a pixel electrode of the second liquid crystal element through the second switch and the first resistor. The pixel electrode of the second liquid crystal element is electrically connected to a Cs line through the third switch and the second resistor. A common electrode of the first liquid crystal element is electrically connected to a common electrode of the second liquid crystal element.
    Type: Application
    Filed: February 26, 2019
    Publication date: August 22, 2019
    Inventor: Hajime Kimura
  • Patent number: 10374023
    Abstract: A display device includes: a flexible substrate; a pixel over the flexible substrate, the pixel including a transistor and a display element; a first wiring for transmitting a signal to the pixel, the first wiring extending in a first direction; a second wiring extending in a second direction intersecting the first direction; an inorganic insulating layer on a higher level than the first wiring or the second wiring; and an organic insulating layer on a higher level than the inorganic insulating layer, wherein the inorganic insulating layer has an opening exposing a part of the upper surface of the first wiring or the second wiring is exposed, and the organic insulating layer is provided in such a way as to fill the opening.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: August 6, 2019
    Assignee: Japan Display Inc.
    Inventors: Yasukazu Kimura, Takuma Nishinohara, Toshihiko Itoga, Hajime Akimoto
  • Patent number: 10374098
    Abstract: A high-performance and highly reliable semiconductor device is provided. The semiconductor device includes: a first oxide; a source electrode; a drain electrode; a second oxide over the first oxide, the source electrode, and the drain electrode; a gate insulating film over the second oxide; and a gate electrode over the gate insulating film. The source electrode is electrically connected to the first oxide. The drain electrode is electrically connected to the first oxide. Each of the first oxide and the second oxide includes In, an element M (M is Al, Ga, Y, or Sn), and Zn. Each of the first oxide and the second oxide includes more In atoms than element M atoms. An atomic ratio of the In, the Zn, and the element M in the first oxide is equal to or similar to an atomic ratio of the In, the Zn, and the element M in the second oxide.
    Type: Grant
    Filed: October 12, 2017
    Date of Patent: August 6, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuta Endo, Hiromi Sawai, Hajime Kimura
  • Patent number: 10373581
    Abstract: A semiconductor device having a normal function means is provided, in which the amplitude of an output signal is prevented from being decreased even when a digital circuit using transistors having one conductivity is employed. By turning OFF a diode-connected transistor 101, the gate terminal of a first transistor 102 is brought into a floating state. At this time, the first transistor 102 is ON and its gate-source voltage is stored in a capacitor. Then, when a potential at the source terminal of the first transistor 102 is increased, a potential at the gate terminal of the first transistor 102 is increased as well by bootstrap effect. As a result, the amplitude of an output signal is prevented from being decreased.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: August 6, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Yutaka Shionoiri
  • Patent number: 10372274
    Abstract: A touch panel including an oxide semiconductor film having conductivity is provided. The touch panel includes a transistor, a second insulating film, and a touch sensor. The transistor includes a gate electrode; a gate insulating film; a first oxide semiconductor film; a source electrode and a drain electrode; a first insulating film; and a second oxide semiconductor film. The second insulating film is over the second oxide semiconductor film so that the second oxide semiconductor film is positioned between the first insulating film and the second insulating film. The touch sensor includes a first electrode and a second electrode. One of the first and second electrodes includes the second oxide semiconductor film.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: August 6, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hajime Kimura, Masami Jintyou, Yasuharu Hosaka, Naoto Goto, Takahiro Iguchi, Daisuke Kurosaki, Junichi Koezuka
  • Publication number: 20190237481
    Abstract: In case the size of the transistor is enlarged, power consumption of the transistor is increased. Thus, the present invention provides a display device capable of preventing a current from flowing to a display element in signal writing operation without varying potentials of power source lines for supplying a current to the display element per row. In setting a gate-source voltage of a transistor by applying a predetermined current to the transistor, a potential of a gate terminal of the transistor is adjusted so as to prevent a current from flowing to a load connected to a source terminal of the transistor. Therefore, a potential of a wire connected to the gate terminal of the transistor is differentiated from a potential of a wire connected to a drain terminal of the transistor.
    Type: Application
    Filed: March 4, 2019
    Publication date: August 1, 2019
    Inventor: Hajime KIMURA
  • Publication number: 20190235323
    Abstract: By increasing an interval between electrodes which drives liquid crystals, a gradient of an electric field applied between the electrodes can be controlled and an optimal electric field can be applied between the electrodes. The invention includes a first electrode formed over a substrate, an insulating film formed over the substrate and the first electrode, a thin film transistor including a semiconductor film in which a source, a channel region, and a drain are formed over the insulating film, a second electrode located over the semiconductor film and the first electrode and including first opening patterns, and liquid crystals provided over the second electrode.
    Type: Application
    Filed: April 9, 2019
    Publication date: August 1, 2019
    Inventor: Hajime KIMURA
  • Publication number: 20190229217
    Abstract: A semiconductor device including a highly reliable transistor is provided. A semiconductor device includes a transistor. The transistor includes first and second gate electrodes, first and second gate insulators, a source electrode, a drain electrode, first to sixth oxides, first and second layers, and first and second gate insulators. The third oxide is under the source electrode. The fourth oxide is under the drain electrode. The sixth oxide is under the second gate electrode. The third and fourth oxides each have a function of supplying oxygen to the second oxide. The sixth oxide has a function of supplying oxygen to the second gate insulator.
    Type: Application
    Filed: April 8, 2019
    Publication date: July 25, 2019
    Inventors: Hajime KIMURA, Shunpei YAMAZAKI
  • Publication number: 20190219859
    Abstract: An object of the present invention is to decrease the resistance of a power supply line, to suppress a voltage drop in the power supply line, and to prevent defective display. A connection terminal portion includes a plurality of connection terminals. The plurality of connection terminals is provided with a plurality of connection pads which is part of the connection terminal. The plurality of connection pads includes a first connection pad and a second connection pad having a line width different from that of the first connection pad. Pitches between the plurality of connection pads are equal to each other.
    Type: Application
    Filed: December 20, 2018
    Publication date: July 18, 2019
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Shunpei YAMAZAKI
  • Publication number: 20190219873
    Abstract: A low-resolution image is displayed at high resolution and power consumption is reduced. Resolution is made higher by super-resolution processing. Then, display is performed with the luminance of a backlight controlled by local dimming after the super-resolution processing. By controlling the luminance of the backlight, power consumption can be reduced. Further, by performing the local dimming after the super-resolution processing, accurate display can be performed.
    Type: Application
    Filed: March 25, 2019
    Publication date: July 18, 2019
    Inventor: Hajime KIMURA
  • Patent number: 10352230
    Abstract: Out of connection passages connecting the engine cooling circuit and the intercooler cooling circuit, a coolant inflow passage is connected between downstream of a mechanical pump and also upstream of a main radiator of the engine cooling circuit, and downstream of a sub radiator and also upstream of an electric pump of the intercooler cooling circuit, and a coolant outflow passage is connected between downstream of the electric pump and also upstream of the sub radiator of the intercooler cooling circuit, and downstream of the mechanical pump and also upstream of the main radiator of the engine cooling circuit. An inter-cooling circuit valve is provided in the coolant inflow passage.
    Type: Grant
    Filed: January 7, 2016
    Date of Patent: July 16, 2019
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Noritaka Kimura, Kosuke Ihara, Yosuke Yamada, Yoshikazu Tanaka, Hajime Uto
  • Patent number: 10355068
    Abstract: Display irregularities in light emitting devices, which develop due to dispersions per pixel in the threshold value of TFTs for supplying electric current to light emitting elements, are obstacles to increasing the image quality of the light emitting devices. An electric potential in which the threshold voltage of a TFT (105) is either added to or subtracted from the electric potential of a reset signal line (110) is stored in capacitor means (108). A voltage, in which the corresponding threshold voltage is added to an image signal, is applied to a gate electrode of a TFT (106). TFTs within a pixel are disposed adjacently, and dispersion in the characteristics of the TFTs does not easily develop. The threshold value of the TFT (105) is thus cancelled, even if the threshold values of the TFTs (106) differ per pixel, and a predetermined drain current can be supplied to an EL element (109).
    Type: Grant
    Filed: September 12, 2016
    Date of Patent: July 16, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Yoshifumi Tanada
  • Patent number: 10354589
    Abstract: There is provided an active matrix EL display device that can display a clear multi gray-scale color display to reduce the shift in the potential caused by the potential drop due to the wiring resistance of a power source supply line, in order to decrease the unevenness in a display region. A plurality of drawing out ports of the power source supply line are arranged. Further, in the wiring resistance between the external input terminal and the pixel portion power source supply line, potential compensation is performed by supplying potential to the power source supply line by a feedback amplifier. Further, in addition to above structure, the power source supply line may be arranged in a matrix.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: July 16, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Hajime Kimura
  • Publication number: 20190212852
    Abstract: An input/output device includes a first sensor electrode and a second sensor electrode. In addition, the input/output device includes a first electrode and a second electrode which are electrodes for a display element, and a substrate sandwiched between the first sensor electrode and the second sensor electrode. The second sensor electrode is formed concurrently with the first electrode using the same material. The input/output device sensors a change in capacitance of a capacitor formed between the first sensor electrode and the second sensor electrode. Furthermore, a third sensor electrode to which a floating potential is applied may be provided to overlap with the first electrode. In the input/output device, either a liquid crystal element or a light-emitting element may be used, or both the liquid crystal element and the light-emitting element may be used.
    Type: Application
    Filed: December 4, 2018
    Publication date: July 11, 2019
    Inventors: Hajime KIMURA, Shunpei YAMAZAKI
  • Patent number: 10345977
    Abstract: A novel input/output panel that is highly convenient and reliable is provided. The input/output panel includes a gate wiring, a first electrode, a second electrode, a current sensing circuit, and a pixel. The first electrode is electrically connected to the gate wiring. The second electrode intersects with the gate wiring and is provided so that capacitance is generated between the first electrode and the second electrode. The current sensing circuit is electrically connected to the second electrode and has a function of sensing a change in the capacitance. The pixel includes a transistor and a display element. The transistor includes a gate electrode, a source electrode, and a drain electrode. The gate electrode is electrically connected to the gate wiring. The display element includes a third electrode and a liquid crystal material. The third electrode is electrically connected to the source electrode or the drain electrode.
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: July 9, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Shunpei Yamazaki
  • Publication number: 20190204707
    Abstract: It is an object to provide an electric field driving display device capable of displaying a high quality image and to provide an electric field driving display device in which residual images in an outline of a pixel is prevented from occurring. An insulating film is formed over a second electrode and a plurality of first electrodes are provided over the insulating film. Each of the first electrodes is electrically connected to the second electrode. The second electrode is provided to partly overlap a region between the adjacent two first electrodes. In other words, viewing the top and the bottom of the display device, the adjacent first electrodes are provided apart from each other and the second electrode is provided to embed a space between the adjacent first electrodes.
    Type: Application
    Filed: March 4, 2019
    Publication date: July 4, 2019
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Hajime KIMURA
  • Patent number: 10338447
    Abstract: A method of manufacturing, with high mass productivity, liquid crystal display devices having highly reliable thin film transistors with excellent electric characteristics is provided. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: July 2, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yukie Suzuki, Hideaki Kuwabara, Hajime Kimura
  • Patent number: 10333004
    Abstract: A semiconductor device including a highly reliable transistor is provided. A semiconductor device includes a transistor. The transistor includes first and second gate electrodes, first and second gate insulators, a source electrode, a drain electrode, first to sixth oxides, first and second layers, and first and second gate insulators. The third oxide is under the source electrode. The fourth oxide is under the drain electrode. The sixth oxide is under the second gate electrode. The third and fourth oxides each have a function of supplying oxygen to the second oxide. The sixth oxide has a function of supplying oxygen to the second gate insulator.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: June 25, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Shunpei Yamazaki
  • Publication number: 20190189641
    Abstract: A semiconductor device including a circuit which does not easily deteriorate is provided. The semiconductor device includes a first transistor, a second transistor, a first switch, a second switch, and a third switch. A first terminal of the first transistor is connected to a first wiring. A second terminal of the first transistor is connected to a second wiring. A gate and a first terminal of the second transistor are connected to the first wiring. A second terminal of the second transistor is connected to a gate of the first transistor. The first switch is connected between the second wiring and a third wiring. The second switch is connected between the second wiring and the third wiring. The third switch is connected between the gate of the first transistor and the third wiring.
    Type: Application
    Filed: February 14, 2019
    Publication date: June 20, 2019
    Inventors: Hajime KIMURA, Atsushi UMEZAKI
  • Patent number: 10326008
    Abstract: A semiconductor device includes a substrate having an insulating surface; a light-transmitting first electrode provided over the substrate; a light-transmitting second electrode provided over the substrate; a light-transmitting semiconductor layer provided so as to be electrically connected to the first electrode and the second electrode; a first wiring electrically connected to the first electrode; an insulating layer provided so as to cover at least the semiconductor layer; a light-transmitting third electrode provided over the insulating layer in a region overlapping with the semiconductor layer; and a second wiring electrically connected to the third electrode.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: June 18, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura