Patents by Inventor Hajime Kimura

Hajime Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230419891
    Abstract: Provided is a display system with high display quality and high resolution. The display system includes a first layer and a display portion. The display portion is positioned in a region overlapping with the first layer. The first layer includes a semiconductor substrate containing silicon as a material, and a plurality of first transistors and a plurality of second transistors whose channel formation regions contain silicon are formed over the semiconductor substrate. The first layer includes a first circuit and a second circuit; the first circuit includes a driver circuit for driving the display portion; and the second circuit includes a memory device, a GPU, and an EL correction circuit. The display portion includes a pixel, and the pixel includes a light-emitting device containing organic EL and is electrically connected to the driver circuit.
    Type: Application
    Filed: November 26, 2021
    Publication date: December 28, 2023
    Inventors: Shunpei YAMAZAKI, Tatsuya ONUKI, Hajime KIMURA
  • Patent number: 11856792
    Abstract: A semiconductor device that can perform product-sum operation with low power consumption is provided. The semiconductor device includes first and second circuits; the first circuit includes a first holding node and the second circuit includes a second holding node. The first circuit is electrically connected to first and second input wirings and first and second wirings, the second circuit is electrically connected to the first and second input wirings and the first and second wirings, and the first and second circuits each have a function of holding first and second potentials corresponding to first data at the first and second holding nodes. When a potential corresponding to second data is input to each of the first and second input wirings, the first circuit outputs a current to one of the first wiring and the second wiring and the second circuit outputs a current to the other of the first wiring and the second wiring.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: December 26, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Yoshiyuki Kurokawa
  • Publication number: 20230410738
    Abstract: A display device excellent in downsizing, reduction in power consumption, or layout flexibility of an arithmetic device is provided. The display device includes a pixel circuit, a driver circuit, and a functional circuit. The driver circuit has a function of outputting an image signal for performing display in the pixel circuit. The functional circuit includes a CPU including a CPU core including a flip-flop electrically connected to a backup circuit. The display device includes a first layer and a second layer. The first layer includes the driver circuit and the CPU. The second layer includes the pixel circuit and the backup circuit. The first layer includes a semiconductor layer including silicon in a channel formation region. The second layer includes a semiconductor layer including a metal oxide in a channel formation region. The CPU has a function of correcting the image signal in accordance with the amount of current flowing through the pixel circuit.
    Type: Application
    Filed: November 24, 2021
    Publication date: December 21, 2023
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Tatsuya ONUKI
  • Publication number: 20230409264
    Abstract: A display device with a novel structure, a display system with a novel structure, or operation methods of them is/are provided. The operation method of the display system including a first display device and a second display device includes the following steps: a first step of connecting the first display device and the second display device by wireless communication; a second step of transmitting first image data displayed on the first display device to the second display device; a third step of displaying, on the second display device, second image data obtained by processing at least part of the first image data; a fourth step of stopping display on the first display device; and a fifth step of processing the second image data in accordance with a manipulation with the second display device.
    Type: Application
    Filed: November 29, 2021
    Publication date: December 21, 2023
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Yoshiaki OIKAWA, Kensuke YOSHIZUMI
  • Publication number: 20230408869
    Abstract: The present invention has a pixel which includes a first switch, a second switch, a third switch, a first resistor, a second resistor, a first liquid crystal element, and a second liquid crystal element. A pixel electrode of the first liquid crystal element is electrically connected to a signal line through the first switch. The pixel electrode of the first liquid crystal element is electrically connected to a pixel electrode of the second liquid crystal element through the second switch and the first resistor. The pixel electrode of the second liquid crystal element is electrically connected to a Cs line through the third switch and the second resistor. A common electrode of the first liquid crystal element is electrically connected to a common electrode of the second liquid crystal element.
    Type: Application
    Filed: September 5, 2023
    Publication date: December 21, 2023
    Inventor: Hajime Kimura
  • Patent number: 11846963
    Abstract: To provide an electronic device capable of a variety of display. To provide an electronic device capable of being operated in a variety of ways. An electronic device includes a display device and first to third surfaces. The first surface includes a region in contact with the second surface, the second surface includes a region in contact with the third surface, and the first surface includes a region opposite to the third surface. The display device includes first to third display regions. The first display region includes a region overlapping with the first surface, the second display region includes a region overlapping with the second surface, and the third display region includes a region overlapping with the third surface. The first display region has a larger area than the third display region.
    Type: Grant
    Filed: December 29, 2022
    Date of Patent: December 19, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hajime Kimura
  • Patent number: 11848664
    Abstract: In a semiconductor device capable of product-sum operation, variations in transistor characteristics are reduced. The semiconductor device includes a first circuit including a driver unit, a correction unit, and a holding unit, and an inverter circuit. The first circuit has a function of generating an inverted signal of a signal input to an input terminal of the first circuit and outputting the inverted signal to an output terminal of the first circuit. The driver unit includes a p-channel first transistor and an n-channel second transistor having a back gate. The correction unit has a function of correcting the threshold voltage of one or both of the first transistor and the second transistor. The holding unit has a function of holding the potential of the back gate of the second transistor. The output terminal of the first circuit is electrically connected to an input terminal of the inverter circuit.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: December 19, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Yoshiyuki Kurokawa, Tatsunori Inoue
  • Publication number: 20230402547
    Abstract: To provide a method for driving a semiconductor device, by which influence of variation in threshold voltage and mobility of transistors can be reduced. The semiconductor device includes an n-channel transistor, a switch for controlling electrical connection between a gate and a first terminal of the transistor, a capacitor electrically connected between the gate and a second terminal of the transistor, and a display element. The method has a first period for holding the sum of a voltage corresponding to the threshold voltage of the transistor and an image signal voltage in the capacitor; a second period for turning on the switch so that electric charge held in the capacitor in accordance with the sum of the image signal voltage and the threshold voltage is discharged through the transistor; and a third period for supplying a current to the display element through the transistor after the second period.
    Type: Application
    Filed: August 29, 2023
    Publication date: December 14, 2023
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Hajime KIMURA
  • Publication number: 20230402084
    Abstract: A semiconductor device in which a memory region at each level of a memory device can be changed is provided. The semiconductor device includes a memory device including a first and a second memory circuit and a control circuit. The first memory circuit includes a first capacitor and a first transistor which has a function of holding charges held in the first capacitor. The second memory circuit includes a second transistor, a second capacitor which is electrically connected to a gate of the second transistor, and a third transistor which has a function of holding charges held in the second capacitor. The first and the third transistors each have a semiconductor layer including an oxide semiconductor, a gate, and a back gate. The voltage applied to the back gate of the first or the third transistor is adjusted, whereby the memory region of each of the first and the second memory circuit is changed.
    Type: Application
    Filed: August 14, 2023
    Publication date: December 14, 2023
    Inventors: Shunpei YAMAZAKI, Kiyoshi KATO, Hajime KIMURA, Atsushi MIYAGUCHI, Tatsunori INOUE
  • Publication number: 20230402018
    Abstract: A display device that is suitable for increasing in size is achieved. Three or more source lines are provided for each pixel column. Video signals having the same polarity are input to adjacent source lines during one frame period. Dot inversion driving is used to reduce a flicker, crosstalk, or the like.
    Type: Application
    Filed: August 16, 2023
    Publication date: December 14, 2023
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA
  • Patent number: 11842002
    Abstract: To provide an inexpensive display device. The display device includes a pixel and an IC chip. The pixel includes a first pixel circuit including a display element and a second pixel circuit including a light-receiving device. The one IC chip includes a control circuit, a data driver circuit, and a read circuit. The first and second pixel circuits are electrically connected to the read circuit. The control circuit has a function of controlling driving of the data driver circuit and the read circuit. The data driver circuit has a function of supplying image data to the first pixel circuit. The read circuit has a function of outputting a monitor signal corresponding to a monitor current when the monitor current flows through the first pixel circuit. The read circuit also has a function of outputting an imaging signal corresponding to imaging data acquired by the second pixel circuit.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: December 12, 2023
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kei Takahashi, Hidetomo Kobayashi, Hajime Kimura, Takeshi Osada, Hideaki Shishido, Kiyotaka Kimura, Shuichi Katsui, Takeya Hirose, Takayuki Ikeda
  • Patent number: 11843059
    Abstract: A novel semiconductor device is provided. A component extending in a first direction, and a first conductor and a second conductor extending in a second direction are provided. The component includes a third conductor, a first insulator, a first semiconductor, and a second insulator. In a first intersection portion of the component and the first conductor, the first insulator, the first semiconductor, the second insulator, a second semiconductor, and a third insulator are provided concentrically. In a second intersection portion of the component and the second conductor, the first insulator, the first semiconductor, the second insulator, a fourth conductor, and a fourth insulator are provided concentrically around the third conductor.
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: December 12, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hajime Kimura, Hitoshi Kunitake
  • Publication number: 20230397427
    Abstract: A semiconductor device that has lower power consumption and is capable of non-destructive reading is provided. The semiconductor device includes a first transistor, a first FTJ element, and a second FTJ element. A first terminal of the first transistor is electrically connected to an output terminal of the first FTJ element and an input terminal of the second FTJ element. In data writing, polarization is caused in each of the first FTJ element and the second FTJ element in accordance with the data. In data reading, voltage with which the polarization does not change is applied between the output terminal of the first FTJ element and the input terminal of the second FTJ element. At this time, the first transistor is turned on, whereby a differential current between current flowing through the first FTJ element and current flowing through the second FTJ element flows through the first transistor.
    Type: Application
    Filed: September 9, 2021
    Publication date: December 7, 2023
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Hitoshi KUNITAKE, Yuji EGI, Fumito ISAKA
  • Patent number: 11837180
    Abstract: A low-resolution image is displayed at higher resolution and afterimages are reduced. Resolution is nude higher by super-resolution processing. In this case, the super-resolution processing is performed after frame interpolation processing is performed. Further, in that case, the super-resolution processing is performed using a plurality of processing systems. Therefore, even when frame frequency is made higher, the super-resolution processing can be performed at high speed. Further, since frame rate doubling is performed by the frame interpolation processing, afterimages can be reduced.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: December 5, 2023
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Hajime Kimura
  • Patent number: 11835810
    Abstract: A touch panel which is thin, has a simple structure, or is easily incorporated into an electronic device is provided. The touch panel includes a first substrate, a second substrate, a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, liquid crystal, and an FPC. The first conductive layer has a function of a pixel electrode. The second conductive layer has a function of a common electrode. The third and fourth conductive layers each have a function of an electrode of a touch sensor. The FPC is electrically connected to the fourth conductive layer. The first, second, third, and fourth conductive layers and the liquid crystal are provided between the first and second substrates. The first, second, and third conductive layers are provided over the first substrate. The FPC is provided over the first substrate.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: December 5, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Shunpei Yamazaki
  • Publication number: 20230389262
    Abstract: A semiconductor device with a large storage capacity per unit area is provided. A semiconductor device includes a memory cell. The memory cell includes a first conductor; a first insulator over the first conductor; a first oxide over the first insulator and including a first region, a second region, and a third region positioned between the first region and the second region; a second insulator over the first oxide; a second conductor over the second insulator; a third insulator positioned in contact with a side surface of the first region; and a second oxide positioned on the side surface of the first region, with the third insulator therebetween. The first region includes a region overlapping the first conductor. The third region includes a region overlapped by the second conductor. The first region and the second region have a lower resistance than the third region.
    Type: Application
    Filed: August 11, 2023
    Publication date: November 30, 2023
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Takayuki IKEDA, Kiyoshi KATO, Yuta ENDO, Junpei SUGAO
  • Publication number: 20230384639
    Abstract: By increasing an interval between electrodes which drives liquid crystals, a gradient of an electric field applied between the electrodes can be controlled and an optimal electric field can be applied between the electrodes. The invention includes a first electrode formed over a substrate, an insulating film formed over the substrate and the first electrode, a thin film transistor including a semiconductor film in which a source, a channel region, and a drain are formed over the insulating film, a second electrode located over the semiconductor film and the first electrode and including first opening patterns, and liquid crystals provided over the second electrode.
    Type: Application
    Filed: August 9, 2023
    Publication date: November 30, 2023
    Inventor: Hajime KIMURA
  • Publication number: 20230380175
    Abstract: A semiconductor device that has lower power consumption and is capable of non-destructive reading is provided. The semiconductor device includes first to fourth transistors and first and second FTJ elements. The first FTJ element and the second FTJ element each include an input terminal, a tunnel insulating film, a dielectric, and an output terminal. One of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the third transistor, a gate of the fourth transistor, and the output terminal of the first FTJ element. One of a source and a drain of the second transistor is electrically connected to one of a source and a drain of the fourth transistor, a gate of the third transistor, and the output terminal of the second FTJ element.
    Type: Application
    Filed: October 7, 2021
    Publication date: November 23, 2023
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Takayuki IKEDA
  • Patent number: 11822197
    Abstract: To suppress a malfunction of a circuit due to deterioration in a transistor. In a transistor which continuously outputs signals having certain levels (e.g., L-level signals) in a pixel or a circuit, the direction of current flowing through the transistor is changed (inverted). That is, by changing the level of voltage applied to a first terminal and a second terminal (terminals serving as a source and a drain) every given period, the source and the drain are switched every given period. Specifically, in a portion which successively outputs signals having certain levels (e.g., L-level signals) in a circuit including a transistor, L-level signals having a plurality of different potentials (L-level signals whose potentials are changed every given period) are used as the signals having certain levels.
    Type: Grant
    Filed: November 3, 2021
    Date of Patent: November 21, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Publication number: 20230367411
    Abstract: A novel input device that is highly convenient or reliable is provided. A novel input/output device that is highly convenient or reliable is provided. A semiconductor device is provided. The present inventors have reached an idea of a structure including a plurality of conductive films configured to be capacitively coupled to an approaching object, a driver circuit that selects a conductive film from a plurality of conductive films in a predetermined order, and a sensor circuit having a function of supplying a search signal and a sensing signal.
    Type: Application
    Filed: July 28, 2023
    Publication date: November 16, 2023
    Inventors: Hajime KIMURA, Shunpei YAMAZAKI