Patents by Inventor Han Choon Lee

Han Choon Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7692302
    Abstract: A System In Package (SIP) semiconductor device and a method for manufacturing a SIP device. A TiSiN film may be used as a diffusion barrier film for metal wiring in a SIP semiconductor device. A TiSiN film may provide relatively good step coverage in a relatively easy formation process, which may maximize reliability of a semiconductor device.
    Type: Grant
    Filed: April 15, 2009
    Date of Patent: April 6, 2010
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Han-Choon Lee
  • Publication number: 20100078638
    Abstract: An image sensor and a method of fabricating an image sensor. An image sensor may include a readout circuitry arranged over a semiconductor substrate, an interlayer dielectric film provided with metal lines arranged over a semiconductor substrate, and/or a lower electrode arranged over a interlayer dielectric film such that a lower electrode may be connected to metal lines. An image sensor may include a first-type conductive layer pattern arranged over a lower electrode, an intrinsic layer arranged over a surface of a semiconductor substrate such that an intrinsic layer may substantially cover a first-type conductive layer pattern. An image sensor may include a second-type conductive layer arranged over an intrinsic layer. A method of fabricating an image sensor may include a patterned n-type amorphous silicon layer which may be treated with N2O plasma. A method of fabricating an image sensor may include H2 annealing.
    Type: Application
    Filed: September 29, 2009
    Publication date: April 1, 2010
    Inventors: Han-Choon Lee, Oh-Jin Jung
  • Patent number: 7682965
    Abstract: Provided is a method for manufacturing a semiconductor device. An insulation layer is formed on a bottom structure of a semiconductor substrate. Then, a trench and a via hole are formed by selectively etching the insulation layer, and a copper layer is deposited to fill the via hole and the trench. Next, a copper line is formed by a CMP (chemical mechanical polishing) process to planarize the copper layer, and a plasma process is performed to form a plasma-treated surface layer of the semiconductor substrate. The plasma-treated surface layer is then removed.
    Type: Grant
    Filed: November 27, 2006
    Date of Patent: March 23, 2010
    Assignee: Dongbu Electronics Co., Ltd.
    Inventors: Sang Chul Kim, Han Choon Lee
  • Patent number: 7679192
    Abstract: A semiconductor device includes a semiconductor substrate, an interlayer insulating film formed over the substrate, a trench formed in the interlayer insulating film, a cover film formed over the inside surface of the trench, a barrier layer formed over the cover film; and a metal line formed over the barrier layer which fills and seals the trench. The metal line is in direct contact with the semiconductor substrate.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: March 16, 2010
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Han-Choon Lee
  • Patent number: 7674700
    Abstract: Disclosed are an apparatus and a method for manufacturing a semiconductor device. The apparatus comprises a transfer chamber for transferring a substrate, a first process chamber connected to the transfer chamber configured to form a TiSiN layer on the substrate, a second process chamber connected to the transfer chamber configured to form a tantalum layer on the TiSiN layer, and a third process chamber connected to the transfer chamber configured to form a copper seed layer on the tantalum layer. After forming the TiSiN layer, a portion of the TiSiN layer in contact with the lower metal interconnection is etched, the tantalum layer is formed on the TiSiN layer in contact with the exposed lower metal interconnection, the copper seed layer is formed on the tantalum layer, and then the copper interconnection is formed on the copper seed layer. In this way, the copper interconnection can be efficiently formed.
    Type: Grant
    Filed: August 24, 2007
    Date of Patent: March 9, 2010
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Han Choon Lee
  • Patent number: 7666762
    Abstract: A method for fabricating a semiconductor device is provided. A nickel layer is deposited on a semiconductor substrate and plasma-processed. Rapid thermal processing is performed on the plasma-processed nickel layer to form a nickel silicide layer. The portion of the nickel layer that has not reacted with silicon is then removed.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: February 23, 2010
    Assignee: Dongbu Hitek Co., Ltd.
    Inventors: Dong Ki Jeon, Han Choon Lee
  • Patent number: 7645699
    Abstract: The present invention provides a method of forming a diffusion barrier layer comprising a TaSiN layer. The method includes depositing a TaN layer into a via hole which penetrates an insulation layer exposing a first metal line layer, and transforming the TaN layer into a TaSiN layer using a radio frequency (RF) power and a (remote) plasma using SiH4 gas. Transforming the TaN layer into a TaSiN layer may include: loading a structure including the TaN layer into a plasma reaction chamber; injecting SiH4 gas into the plasma reaction chamber; and forming the TaSiN layer by reacting Si— or Si atom-containing species with the TaN layer.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: January 12, 2010
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Han-Choon Lee
  • Publication number: 20100000726
    Abstract: A heat exchanger is provided. The heat exchanger includes at least one fin provided with a plurality of slits and a plurality of refrigerant tubes penetrating the fin. The refrigerant tubes include at least one front line tube and at least one rear line tube having a different diameter from the front line tube with reference to a fluid flow direction. The slits include at least one front line slit and at least one rear line slit having a difference width with reference to the fluid flow direction.
    Type: Application
    Filed: June 30, 2009
    Publication date: January 7, 2010
    Inventors: Sang Yeul LEE, Han Choon LEE, Dong Hwi KIM, Ju Hyok KIM, Hong Seong KIM, Yong Cheol SA
  • Patent number: 7632754
    Abstract: A method for forming a metal line of a semiconductor device includes forming an interlayer insulation film over a semiconductor substrate, forming a trench for exposing at least a portion of the semiconductor substrate by using a selective etching process, and forming a diffusion barrier layer over the interlayer film and the inner walls of the trench, by using a plasma enhanced atomic layer deposition process in which a high frequency power generator is set to have a frequency of 13.56 MHz. The plasma enhanced atomic layer deposition process is performed with a base pressure in a chamber maintained at 1×10?8 to 3×10?7 torr.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: December 15, 2009
    Assignee: Dongbu Hi-Tek Co., Ltd.
    Inventors: In-Cheol Baek, Han-Choon Lee
  • Patent number: 7582563
    Abstract: A method for fabricating a fully silicided gate, including forming a gate dielectric layer on a semiconductor substrate, depositing an amorphous silicon layer on the gate dielectric layer, forming a metallic layer on the amorphous silicon layer, depositing a hard mask on the metallic layer, wherein the amorphous silicon layer and the metal layer are silicided due to a thermal budget applied thereto, thereby forming a metal silicide layer, and patterning the metal silicide layer based on the hard mask to form a gate.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: September 1, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventors: Dae-Young Kim, Han-Choon Lee
  • Publication number: 20090200671
    Abstract: A System In Package (SIP) semiconductor device and a method for manufacturing a SIP device. A TiSiN film may be used as a diffusion barrier film for metal wiring in a SIP semiconductor device. A TiSiN film may provide relatively good step coverage in a relatively easy formation process, which may maximize reliability of a semiconductor device.
    Type: Application
    Filed: April 15, 2009
    Publication date: August 13, 2009
    Inventor: Han-Choon Lee
  • Publication number: 20090184377
    Abstract: Semiconductor devices and methods of fabricating semiconductor devices are disclosed. A disclosed semiconductor device includes a silicon substrate, a source region and a drain region. A gate electrode is formed on the silicon substrate. Also, a metal silicide layer is formed on each of the gate electrode, the source region, and the drain region. The metal silicide layer has a thickness uniformity of about 1˜20%. A disclosed fabrication method includes forming a metal layer on a silicon substrate having a gate electrode, a source region, and a drain region; performing a plasma treatment on the metal layer; forming a protective layer on the metal layer; and heat treating the silicon substrate on which the protective layer is formed to thereby form a metal silicide layer. A gas that includes nitrogen is used as a plasma gas during the plasma treatment.
    Type: Application
    Filed: November 1, 2007
    Publication date: July 23, 2009
    Inventors: Han-Choon Lee, Jin-Woo Park
  • Publication number: 20090152735
    Abstract: Provided is a method for manufacturing a metal interconnection in a semiconductor device. The semiconductor device fabricated according to one embodiment comprises a copper interconnection having reduced sheet and contact resistance. In the method for manufacturing the copper interconnection, a dielectric comprising a via hole is formed on a semiconductor substrate. A diffusion barrier is deposited in the via hole of the dielectric using a process including a plasma enhanced atomic layer deposition (PEALD) process. A copper metal layer can be formed on the via hole through an electroplating process.
    Type: Application
    Filed: September 30, 2008
    Publication date: June 18, 2009
    Inventors: Han Choon Lee, In Cheol Baek
  • Patent number: 7531451
    Abstract: A System In Package (SIP) semiconductor device and a method for manufacturing a SIP device. A TiSiN film may be used as a diffusion barrier film for metal wiring in a SIP semiconductor device. A TiSiN film may provide relatively good step coverage in a relatively easy formation process, which may maximize reliability of a semiconductor device.
    Type: Grant
    Filed: July 23, 2007
    Date of Patent: May 12, 2009
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Han-Choon Lee
  • Publication number: 20090108390
    Abstract: An image sensor may include a semiconductor substrate including a device isolating film and a light receiving device; an insulating film on the semiconductor substrate; a barrier; a metal wire layer on the insulating film; a trench between adjacent metal wires having a protective film pattern on sidewalls thereof; and a photosensitive material in the trench. A method for manufacturing an image sensor may comprise forming an insulating film on a semiconductor substrate, the semiconductor substrate having a device isolating film, a barrier and a light receiving device; forming a metal wire layer on the insulating film; forming a trench between adjacent metal wires; forming a protective film pattern on sidewall surfaces of the trench; forming a photosensitive material over the metal wire layer and in the trench; and planarizing the semiconductor substrate to remove portions of the photosensitive material over the metal wire layer.
    Type: Application
    Filed: October 29, 2008
    Publication date: April 30, 2009
    Inventor: Han Choon LEE
  • Publication number: 20090104768
    Abstract: A method for forming a metal line in a semiconductor device may include forming a silicon (Si) monolayer as an etching prevention layer over an exposed portion of a lower metal layer and sidewalls of an upper metal layer, middle metal layer, and the entire surface of curved photoresist patterns.
    Type: Application
    Filed: October 8, 2008
    Publication date: April 23, 2009
    Inventor: Han-Choon Lee
  • Publication number: 20090101949
    Abstract: An image sensor having maximized photosensitivity includes a photodiode and a transistor formed over the semiconductor substrate. A first passivation layer is formed over the semiconductor substrate including the transistor and the photodiode, a pre-metal dielectric layer formed over the first passivation layer and insulating layers having metal wirings formed over the pre-metal dielectric layer. A trench is formed in the insulating layers and the pre-metal dielectric layer exposing a portion of the first passivation layer formed over the photodiode while a second passivation layer formed on sidewalls and a bottom of the trench and over the uppermost surface of the insulating layer such that the second passivation layer directly contacts the portion of the first passivation layer formed over the photodiode. A photosensitive material is then formed over the second passivation layer and buried in the trench.
    Type: Application
    Filed: October 12, 2008
    Publication date: April 23, 2009
    Inventors: In-Cheol Back, Han-Choon Lee
  • Publication number: 20090095968
    Abstract: Provided are an image sensor and a method for manufacturing the same. A trench can be formed through metal interconnection layers of the image sensor in a region corresponding to a light receiving device for each unit pixel. A passivation layer pattern can be provided at sidewalls of the trench to inhibit light incident into the metal interconnection layers and reduce cross-talk and noise. A filler material can be provided to fill the trench. A color filter layer and microlens can be formed on the filler material. The filler material can be, for example, a polymer, an oxide layer, or a photoresist.
    Type: Application
    Filed: September 12, 2008
    Publication date: April 16, 2009
    Inventors: In Cheol Baek, Han Choon Lee
  • Publication number: 20090084129
    Abstract: A heat exchanger including a plurality of first refrigerant tubes, and a plurality of second refrigerant tubes separated from the plurality of first refrigerant tubes in an air flow direction. Further, a diameter of a respective refrigerant tube of the plurality of first refrigerant tubes is smaller than a diameter of a respective refrigerant tube of the plurality of second refrigerant tubes.
    Type: Application
    Filed: August 29, 2008
    Publication date: April 2, 2009
    Inventors: Dong Hwi Kim, Yong Cheol Sa, Han Choon Lee, Sang Yeul Lee, Ju Hyok Kim, Hong Seong Kim
  • Publication number: 20090065897
    Abstract: A M-I-M capacitor semiconductor device capable of enhancing the reliability and capacitance of a capacitor and maximizing the integration density of the device, and a method of fabricating the same are disclosed. The semiconductor device includes a semiconductor substrate, a capacitor lower metal layer formed over the semiconductor substrate, a SiN capacitor dielectric layer having a thickness of approximately 30 nm or less formed over the capacitor lower metal layer, and a capacitor upper metal layer formed over a portion of the capacitor dielectric layer and overlapping with the capacitor lower metal layer.
    Type: Application
    Filed: September 4, 2008
    Publication date: March 12, 2009
    Inventor: Han-Choon Lee