Patents by Inventor Han Choon Lee

Han Choon Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060006542
    Abstract: Enhanced step coverage and reduced resistivity of a TaSiN layer may be achieved when a semiconductor device is manufactured by: forming an interlayer insulating layer on a semiconductor substrate, the interlayer insulating layer having a contact hole that partially exposes the substrate; depositing a TaN thin film on the interlayer insulating layer and in the contact hole using a reaction gas containing a Ta precursor and a nitrogen source gas; removing impurities from the TaN thin film; forming a TaSiN thin film by reacting the impurity-removed TaN thin film with a silicon source gas, and repeating the TaN-depositing, impurity-removing, and silicon source gas-reacting steps.
    Type: Application
    Filed: July 8, 2005
    Publication date: January 12, 2006
    Inventor: Han-Choon Lee
  • Patent number: 6927163
    Abstract: Disclosed is a method and an apparatus for manufacturing a barrier layer of semiconductor device. The disclosed comprises the steps of: forming an interlayer insulating layer having a contact hole on a semiconductor substrate; forming a Ti layer on the contact hole and on the interlayer insulating layer; and reacting the Ti layer with nitrogen radical to transform a part of the Ti layer into a TiN layer.
    Type: Grant
    Filed: June 26, 2002
    Date of Patent: August 9, 2005
    Assignee: DongbuAnam Semiconductor Inc.
    Inventors: Bi O Lim, Han Choon Lee
  • Publication number: 20050139934
    Abstract: Semiconductor devices and methods of fabricating semiconductor devices are disclosed. A disclosed semiconductor device includes a silicon substrate, a source region and a drain region. A gate electrode is formed on the silicon substrate. Also, a metal silicide layer is formed on each of the gate electrode, the source region, and the drain region. The metal silicide layer has a thickness uniformity of about 1˜20%. A disclosed fabrication method includes forming a metal layer on a silicon substrate having a gate electrode, a source region, and a drain region; performing a plasma treatment on the metal layer; forming a protective layer on the metal layer; and heat treating the silicon substrate on which the protective layer is formed to thereby form a metal silicide layer. A gas that includes nitrogen is used as a plasma gas during the plasma treatment.
    Type: Application
    Filed: May 25, 2004
    Publication date: June 30, 2005
    Inventors: Han-Choon Lee, Jin-Woo Park
  • Publication number: 20050142845
    Abstract: A method for forming a plug of a semiconductor device according to a preferred embodiment includes forming a metal wiring on a semiconductor substrate, forming an interlayer dielectric layer on the semiconductor substrate having the metal wiring, forming a contact hole for partially exposing the metal wiring by selectively etching the interlayer dielectric layer, annealing the semiconductor substrate having the contact hole using NH3 gas, plasma processing the annealed semiconductor substrate using the NH3, and forming a barrier layer on the interlayer dielectric layer having the contact hole.
    Type: Application
    Filed: December 30, 2004
    Publication date: June 30, 2005
    Inventors: Han-Choon Lee, Jin-Woo Park
  • Publication number: 20050062159
    Abstract: Semiconductor devices and methods of forming a barrier metal in semiconductor devices are disclosed. A disclosed semiconductor device includes a metal layer on a semiconductor substrate; an interlayer dielectric layer on the metal layer, a hole in the interlayer dielectric layer that exposes a portion of the metal layer; and a barrier metal on inner walls of the hole. The barrier metal is made of TaSiN having a resistivity less than or equal to about 10,000 ?ohm-cm.
    Type: Application
    Filed: August 25, 2004
    Publication date: March 24, 2005
    Inventor: Han-Choon Lee
  • Publication number: 20040121582
    Abstract: A semiconductor device which effectively reduces copper oxide layers on copper conductive lines is disclosed. The method includes forming a first insulating layer on a semiconductor substrate; forming a first conductive line by depositing a conductive material on the first insulating layer and selectively patterning the conductive material. A second insulating layer is deposited on top of the substrate including on the first conductive line. A via hole is formed by selectively patterning the second insulating layer to expose a certain portion of the first conductive line. A natural oxide layer is removed by plasma-processing the natural oxide layer using H2+CO gas.
    Type: Application
    Filed: December 12, 2003
    Publication date: June 24, 2004
    Applicant: Dongbu Electronics Co., Ltd.
    Inventor: Han Choon Lee
  • Publication number: 20040115930
    Abstract: Disclosed is method for forming a barrier metal of a semiconductor device. According to the method, a TiSiN layer having an atomic layer thickness is deposited by performing deposition of an SiH4 layer inside a contact hole of a semiconductor device using an atomic layer deposition process and by performing deposition of a certain precursor layer on the SiH4 layer. By repetition of this ALD process, the TiSiN layer is thickly formed at a desired thickness. Then, the TiSiN layer is plasma processed under the atmosphere of a nitrogen gas and a hydrogen gas, or an ammonia gas, and thus impurities are removed from the TiSiN layer. Therefore, it is easy to thickly form the TiSiN layer for the barrier metal. It is possible to reduce resistivity of the TiSiN layer to a relatively low level. Thereby, it is possible to decrease a contact resistance of the TiSiN layer and, further, to enhance an electrical characteristic of the semiconductor device.
    Type: Application
    Filed: December 3, 2003
    Publication date: June 17, 2004
    Applicant: Dongbu Electronics Co., Ltd.
    Inventor: Han-Choon Lee
  • Publication number: 20030003719
    Abstract: Disclosed is a method and an apparatus for manufacturing a barrier layer of semiconductor device. The disclosed comprises the steps of: forming an interlayer insulating layer having a contact hole on a semiconductor substrate; forming a Ti layer on the contact hole and on the interlayer insulating layer; and reacting the Ti layer with nitrogen radical to transform a part of the Ti layer into a TiN layer.
    Type: Application
    Filed: June 26, 2002
    Publication date: January 2, 2003
    Inventors: Bi O. Lim, Han Choon Lee