Abstract: A semiconductor device includes a first interlayer insulating film on a substrate, a via which penetrates the first interlayer insulating film, a first etching stop film which extends along an upper surface of the first interlayer insulating film, a second interlayer insulating film on the first etching stop film, the second interlayer insulating film including a plurality of periodically arranged air gaps, a first wiring pattern in the second interlayer insulating film, the first wiring pattern penetrating the first etching stop film and is connected to the via, and a capping film which covers an upper surface of the second interlayer insulating film and an upper surface of the first wiring pattern, each of the plurality of air gaps in the second interlayer insulating film extending from the first etching stop film to the capping film.

Abstract: A memory system includes a memory controller, a first memory module including first and second groups of first memory chips, a second memory module including first and second groups of second memory chips, and a channel including a first group of signal lines suitable for coupling the memory controller with the first memory module, and a second group of signal lines suitable for coupling the memory controller with the second memory module.

Abstract: A display device includes a display unit which displays an image, a roller to which an end of the display unit is fixed and which winds or unwinds the display unit by rotating, a housing which accommodates the display unit and the roller, and a guide member which is provided inside the housing and guides a movement of the display unit.

Abstract: A semiconductor device is provided. The semiconductor device includes a first stacked structure including a plurality of first insulating patterns and a plurality of first semiconductor patterns alternately stacked on a substrate, the first stacked structure extending in a first direction parallel to an upper surface of the substrate, a first conductive pattern on one side surface of the first stacked structure, the first conductive pattern extending in a second direction crossing the upper surface of the substrate, and a first ferroelectric layer between the first stacked structure and the first conductive pattern, the first ferroelectric layer extending in the second direction, wherein each of the first semiconductor patterns includes a first impurity region, a first channel region and a second impurity region which are sequentially arranged along the first direction.

Abstract: A display device capable of reducing a non-display area is disclosed. The disclosed display device includes a first through hole not overlapping with an organic cover layer surrounding at least one hole area disposed within an active area, and a second through hole passing through a substrate. Accordingly, it is possible to minimize a bezel area, which is a non-display area, and to prevent damage to a light emitting stack caused by a stripping process.

Abstract: An electrode assembly includes a separator, which is doubly sealed in a radical unit and a unit stack part to prevent short circuit occurring by contact between a positive electrode and a negative electrode due to contraction of the separator. The electrode assembly includes a unit stack part having a stacked structure including a plurality of radical units and an outer sealing part formed outside the unit stack part. Each of the radical unit is formed by alternately stacking electrodes and separators and includes a first inner sealing part in which a plurality of separators vertically stacked on the electrodes are sealed to each other on a side surface of each of the electrodes, and the outer sealing part is formed by sealing the separators of the plurality of radical units to each other outside the first inner sealing part.

Abstract: A memory device includes: a first substrate; a peripheral circuit provided on the first substrate; a first metal bonding layer provided on the peripheral circuit; a second metal bonding layer directly bonded to the first metal bonding layer; a memory cell array provided on the second metal bonding layer; and a second substrate provided on the memory cell array. A page buffer circuit in the peripheral circuit receives a verification result through the metal bonding layers, divides the verification result into stages, and sequentially outputs the verification result for the division into the stages, and a pass/failure checker in the peripheral circuit sequentially performs a counting operation about each of the stages to generate accumulated values, and compares the accumulated values and a reference value which increases from an initial value as the counting operation is performed, and the initial value is set by an external memory controller.

Abstract: The present invention is related to a method for fabricating a semiconductor device capable of forming fine patterns. The method for fabricating the semiconductor device according to the present invention may comprise forming an etch mask layer on an etch target layer; forming a spacer structure in which first spacers and second spacers are alternately disposed and spaced apart from each other on the etch mask layer; forming first spacer lines through selective etching of the first spacers; forming second spacer lines through selective etching of the second spacers; and etching the etch target layer to form a plurality of fine line patterns using the first and second spacer lines.

Abstract: Colored three-dimensional digital model generation techniques and systems are described. In one example, scanning techniques are employed by a scanning system that scans a physical object while disposed within packaging to form a three-dimension digital model. A model coloring system is employed to color the three-dimensional digital model. A two-dimensional digital image is employed that captures the same or similar physical object. In one example, features of the model are matched to the image. This is then used to align a viewing perspective with respect to the model with a viewing perspective of the object within the digital image, e.g., to find which “view” of the model corresponds with the image. The color is then applied from the digital image to the model, e.g., from pixels of the image to corresponding points in the model.

Abstract: A data storage device includes a storage, a buffer memory, and a controller. The controller is configured to control at least one of an input of data to and an output of data from the storage in response to a request transmitted from a host device. The controller is also configured to receive write data transmitted from the host device and cached in the buffer memory, encrypt the write data, and store the encrypted write data in the storage. The controller is further configured to receive read data read from the storage and cached in the buffer memory, decrypt the read data, and provide the decrypted read data to the host device.

Abstract: In a process of decomposing byproducts of a phenol production process using a reactive distillation column in which a reactor and a distillation column are integrated, since acetophenone is mixed with tar recovered to a lower part of the reactive distillation column and transferred, viscosity of the tar may be lowered so that the tar may be transferred at room temperature, and since the reactive distillation column may be operated at 0.5 to 3 bar, an operating temperature of the reactive distillation column is low as compared with a method of separating acetophenone by pressurization with high pressure, significantly reducing an operation cost of a heater required for a reaction. Also, since acetophenone is separately recovered at a position of 25 to 90% of a total number of stages in the reactive distillation column, recovery of an active ingredient may be enhanced.

Abstract: A display device includes a display unit which displays an image, a roller to which an end of the display unit is fixed and which winds or unwinds the display unit by rotating, a housing which accommodates the display unit and the roller, and a guide member which is provided inside the housing and guides a movement of the display unit.

Abstract: A garnishless type hidden lamp applied to a vehicle, may include a light source module, in which an internal lens spaced from an external lens, appearing as a garnish from outside thereof due to a color of a penetrable painting portion which reflects the external light, with an air gap interposed therebetween transmits an internal light of a light source through laser perforation holes to form a laser pattern on the external lens, so that the garnishless type hidden lamp may have the sense of unity with vehicle design by a painting garnish function of the external lens without combination with a separate metal garnish, improve a wow effect using the painting garnish, implement differentiated and customized lighting by only changing the laser pattern.

Abstract: A memory system includes a memory controller, a first memory module including first and second groups of first memory chips, a second memory module including first and second groups of second memory chips, and a channel including a first group of signal lines suitable for coupling the memory controller with the first memory module, and a second group of signal lines suitable for coupling the memory controller with the second memory module.

Abstract: A foldable display device includes: a first display panel including a first substrate and a first pixel array layer which is disposed on a first surface of the first substrate; a second display panel including a second substrate and a second pixel array layer which is disposed on a first surface of the second substrate; and a first sound generator disposed between a second surface of the first display panel opposite to the first surface of the first display panel and a second surface of the second display panel opposite to the first surface of the second display panel, where the first sound generator outputs first sound by vibrating at least one of the first and second display panels.

Abstract: The present disclosure relates to an apparatus and a method for manufacturing a battery cell, and more particularly, to an apparatus and a method for manufacturing a battery cell, wherein a pressing jig provided with a semi-elliptical pressing part presses the battery cell to remove air bubbles from the battery cell.

Abstract: A display device capable of reducing a non-display area includes a substrate including at least one hole area disposed within an emission area, and at least one blocking hole passing through inorganic insulating films disposed beneath a light emitting element while including upper and lower insulating films made of different materials. Side surfaces of the upper inorganic insulating film exposed through the blocking hole protrude beyond side surfaces of the lower inorganic insulating film exposed through the blocking hole, respectively. Accordingly, it is possible to minimize a bezel area, which is a non-display area, and to disconnect a light emitting stack by the blocking hole.

Abstract: A memory system includes a memory controller, a first memory module including first and second groups of first memory chips, a second memory module including first and second groups of second memory chips, and a channel including a first group of signal lines suitable for coupling the memory controller with the first memory module, and a second group of signal lines suitable for coupling the memory controller with the second memory module.

Abstract: Disclosed herein are a long glass fiber reinforced thermoplastic resin composition and a molded article including the same. Specifically, the thermoplastic resin composition may include 30% to 70% by weight of polyamide, 20% to 60% by weight of a reinforcing agent which contains a glass fiber and has a flat-plate shape, and 1% to 5% by weight of a silane-based coupling agent.

Abstract: A nonvolatile memory device includes a memory cell array having cell strings that each includes memory cells stacked on a substrate in a direction perpendicular to the substrate. A row decoder is connected with the memory cells through word lines. The row decoder applies a setting voltage to at least one word line of the word lines and floats the at least one word line during a floating time. A page buffer circuit is connected with the cell strings through bit lines. The page buffer senses voltage changes of the bit lines after the at least one word line is floated during the floating time and outputs a page buffer signal as a sensing result. A counter counts a number of off-cells in response to the page buffer signal. A detecting circuit outputs a detection signal associated with a defect cell based on the number of off-cells.