Patents by Inventor Han Park

Han Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11268574
    Abstract: A seal assembly for a wheel bearing, may include a core facing an internal side of a wheel bearing assembly; a slinger disposed to face an external side of the wheel bearing assembly; a sealing member fixed to the core, and having a plurality of sealing lips selectively pressed against the slinger; and a deformation unit including a first spring and a second spring mounted on the slinger, and allowing the slinger to deform according to a vehicle speed, wherein the first spring and the second spring are disposed to be parallel to each other.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: March 8, 2022
    Assignees: HYUNDAI MOTOR COMPANY, KIA MOTORS CORPORATION
    Inventor: Yong Han Park
  • Publication number: 20220065343
    Abstract: The present invention provides an electronic shift range switching device (10) which is configured to control a shift range of a vehicle, the device comprising: a housing unit (100); a shifting knob unit (200) exposed at one end thereof to the outside of the housing unit (100) and disposed at the other end thereof within the hosing unit (100) in such a manner as to be rotatable with respect to the housing unit (100); and a locking correction integrated unit (300) configured to control whether or not to interrupt the rotation of the shifting knob unit (200) and to return a position of the shifting knob unit (200) to a P shift range in a self-correction manner under a predetermined condition.
    Type: Application
    Filed: August 31, 2021
    Publication date: March 3, 2022
    Applicant: LS AUTOMOTIVE TECHNOLOGIES CO., LTD.
    Inventors: Won LEE, Hyun Seong CHO, Jin Han PARK
  • Patent number: 11264114
    Abstract: A test pattern generator includes a random command address generator suitable for generating N combinations, each combination of a command and an address, where N is an integer greater than or equal to 2; an address converter suitable for converting the N combinations into an N-dimensional address; a history storage circuit which is accessed based on the N-dimensional address; and a controller suitable for classifying the N combinations as issue targets, when an area in the history storage circuit, which is accessed based on the N-dimensional address, indicates a value of no hit.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: March 1, 2022
    Assignee: SK hynix Inc.
    Inventors: Dong-Ho Kang, Jae-Han Park
  • Publication number: 20220052257
    Abstract: A semiconductor device includes a stack structure on a substrate, the stack structure including alternating gate electrodes and insulating layers stacked along a first direction, a vertical opening through the stack structure along the first direction, the vertical opening including a channel structure having a semiconductor layer on an inner sidewall of the vertical opening, and a variable resistive material on the semiconductor layer, a vacancy concentration in the variable resistive material varies along its width to have a higher concentration closer to a center of the channel structure than to the semiconductor layer, and an impurity region on the substrate, the semiconductor layer contacting the impurity region at a bottom of the channel structure.
    Type: Application
    Filed: October 29, 2021
    Publication date: February 17, 2022
    Inventors: Kyung Hwan LEE, Yong Seok KIM, Tae Hun KIM, Seok Han PARK, Satoru YAMADA, Jae Ho HONG
  • Publication number: 20220036954
    Abstract: To program in a nonvolatile memory device including a cell region including first metal pads and a peripheral region including second metal pads and vertically connected to the cell region by the first metal pads and the second metal pads, a memory block is provided with a plurality of sub blocks disposed in a vertical direction where the memory block includes a plurality of cell strings each including a plurality of memory cells connected in series and disposed in the vertical direction. A plurality of intermediate switching transistors are disposed in a boundary portion between two adjacent sub blocks in the vertical direction. Each of the plurality of intermediate switching transistors is selectively activated based on a program address during a program operation. The selectively activating each of the plurality of intermediate switching transistors includes selectively turning on one or more intermediate switching transistors in a selected cell string based on the program address.
    Type: Application
    Filed: October 18, 2021
    Publication date: February 3, 2022
    Inventors: Chang-Yeon YU, Kui-Han KO, Il-Han PARK, June-Hong PARK, Joo-Yong PARK, Joon-Young PARK, Bong-Soon LIM
  • Patent number: 11238942
    Abstract: Nonvolatile memory device includes memory cell region including a first metal pad and a second metal pad, peripheral circuit region including a third metal pad and a fourth metal pad, vertically connected to the memory cell region. The nonvolatile memory device includes a page buffer circuit including page buffers to sense data from selected memory cells, each including two sequential sensing operations to determine one data state, and each of the page buffers including a latch to sequentially store results of the two sequential sensing operations. The nonvolatile memory device includes control circuit in the peripheral circuit region, to control the page buffers to store result of the first read operation, reset the latches after completion of the first read operation, and control the page buffers to perform the second read operation based on a valley determined based on the result of the first read operation.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: February 1, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung-Bum Kim, Il-Han Park, Ji-Young Lee, Su-Chang Jeon
  • Publication number: 20220029132
    Abstract: A display device capable of reducing a non-display area includes a substrate hole surrounded by light emitting elements, and a moisture penetration preventing layer disposed between an inner dam surrounded by the light emitting elements and the substrate hole. Accordingly, it is possible to prevent damage to light emitting stacks caused by external moisture or oxygen. Since the substrate hole is disposed within an active area, a reduction in non-display area is achieved.
    Type: Application
    Filed: October 8, 2021
    Publication date: January 27, 2022
    Inventors: Young-Wook LEE, Seon-Hui HWANG, Eun-Young PARK, Yong-Su AN, Woo-Chan CHO, Sun-Mi LEE, Jong-Han PARK
  • Publication number: 20220030557
    Abstract: The disclosure generally relates to techniques for efficiently allocating resources allocated from a macro base station by estimating the communication possibility of each sensor without direct communication with the sensor in a mobile base station. A method for resource allocation in a mobile base station may include detecting at least one sensor within a communicable range of the mobile base station, estimating a communication possibility of the sensor based on a message queue and a remaining battery level of the at least one sensor, receiving resource allocation from a macro base station based on the communication possibility, and allocating the allocated resource to the sensor.
    Type: Application
    Filed: July 23, 2021
    Publication date: January 27, 2022
    Inventors: Cheol Sun PARK, Sung Hyun CHO, Joo Han PARK, Soo Hyeong KIM
  • Publication number: 20220025177
    Abstract: Disclosed are a composite resin composition and an article containing the same. The composite resin composition may include semicrystalline polyamide; amorphous polyamide; an acrylonitrile-butadiene-styrene (ABS) resin; a compatibilizer; and a strength-reinforcing agent. The article may exhibit superior rigidity equivalent to or greater than that of conventional long-fiber thermoplastics and remarkably excellent dimensional stability. In addition, the composite resin composition and the molded article including the same may be used in replacement of steel parts so as to reduce the weight by about 30%.
    Type: Application
    Filed: November 24, 2020
    Publication date: January 27, 2022
    Inventors: Sang Sun Park, Han Sol Lee, Kyeong Bae Seo, Min Sik Seo, In Seok Kang, Wan Ki Noh, Jae Han Park, Dong Hyun Kim, Hea Lin Kim, Hyung Joo Lee, Seung Soo Hong, Dong Chang Lee, Hyeung Min Lee
  • Patent number: 11229586
    Abstract: A surfactant-free cosmetic composition is disclosed. The composition is a stable water in silicone oil (W/S) formulation containing a silicone oil phase portion and an aqueous phase portion, wherein the silicone oil phase portion contains an emollient having a pyrrolidone carboxylic acid group, oil-absorbing powder and silicone oil, and the aqueous phase portion contains 50 wt.% or more of water based on the total weight of the surfactant-free cosmetic composition. The composition may further contain a high content of vitamin C or a vitamin C derivative and has improved long term storage stability.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: January 25, 2022
    Assignee: AMOREPACIFIC CORPORATION
    Inventors: Seong Chan Eo, Seung Han Park, Byung Fhy Suh, Ji Sik Shin, Dong Won Choi, Byung Guen Chae
  • Patent number: 11233068
    Abstract: A nonvolatile memory device including: a first semiconductor layer including word lines, bit lines, first and second upper substrates adjacent to each other and a memory cell array, wherein the memory cell array includes a first vertical structure on the first upper substrate and a second vertical structure on the second upper substrate; and a second semiconductor layer under the first semiconductor layer, wherein the second semiconductor layer includes a lower substrate that includes row decoder and page buffer circuits, wherein the first vertical structure includes a first via area in which a first through-hole via is provided, wherein the first through-hole via passes through the first vertical structure and connects a first bit line and a first page buffer circuit, and the second vertical structure includes a first partial block, wherein the first partial block overlaps the first via area.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: January 25, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Bong-soon Lim, Jin-young Kim, Sang-won Shim, Il-han Park
  • Publication number: 20220001156
    Abstract: The present disclosure relates to a peritoneal cavity-bladder connecting catheter for ascites drainage. The peritoneal cavity-bladder connecting catheter for ascites drainage includes a peritoneal cavity position part positioned on the side of a peritoneal cavity by passing through a bladder wall located between the peritoneal cavity and a bladder, the peritoneal cavity position part having inlets through which ascites flow into an inner space and being formed as a film that surrounds the inner space, and a bladder position part integrally formed with the peritoneal cavity position part and positioned on the side of the bladder located on the side of the bladder wall opposite to the peritoneal cavity, the bladder position part having outlets through ascites flowed into the peritoneal cavity position part are discharged to outside, and being configured to form a closed inner space together with the peritoneal cavity position part.
    Type: Application
    Filed: October 24, 2019
    Publication date: January 6, 2022
    Inventors: IL HWAN KIM, Myeong Ju KANG, Bong Su PARK, Si Hyung PARK, Yu Jin LEE, Jin Han PARK, Jae Ha LEE, Kang Min PARK, Seong Cheol KIM, Jae Seung JUNG, So Yeong JUNG
  • Patent number: 11211403
    Abstract: A nonvolatile memory device including: a first semiconductor layer comprising a plurality of first word lines extending in a first direction, a first upper substrate and a first memory cell array, a second semiconductor layer including a plurality of second word lines extending in the first direction, second and third upper substrates adjacent to each other in the first direction and a second memory cell array, wherein the second memory cell array includes a first vertical structure on the first upper substrate and a second vertical structure on the second upper substrate, wherein the first semiconductor layer and the second semiconductor layer share a plurality of bit lines extending in a second direction, and a third semiconductor layer under the second semiconductor layer in a third direction perpendicular to the first and second directions, wherein the third semiconductor layer includes a lower substrate that includes a plurality of row decoder circuits and a plurality of page buffer circuits, wherein the
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: December 28, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Bong-soon Lim, Jin-young Kim, Sang-won Shim, Il-han Park
  • Patent number: 11210015
    Abstract: A data storage device includes a storage medium, a first buffer memory, a second buffer memory, and a controller. The controller is configured to control data input/output for the storage medium according to requests received from a host device and to store write data in the first and second buffer memories in response to a write request received from the host device.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: December 28, 2021
    Assignee: SK hynix Inc.
    Inventors: Hyung Min Kim, Do Hun Kim, Jae Han Park, Hyoung Suk Jang, Hyun Mo Kang
  • Patent number: 11202741
    Abstract: The present invention relates to a core-shell capsule comprising: a core comprising an oil, a solvent satisfying relational expression 1 below, and a water-insoluble polymer compound dissolved in the solvent; and a water-insoluble polymer shell enclosing the core. 0.01?CA/CB?100??[Relational expression 1] (in relational expression 1, CA/CB is the distribution coefficient of solvent, and when the solvent is dissolved in oil and water to reach equilibrium, CA is the concentration of the solvent dissolved in the oil and CB is the concentration of the solvent dissolved in water).
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: December 21, 2021
    Assignee: AMOREPACIFIC CORPORATION
    Inventors: Ji Sik Shin, Young Suk Cho, Seung Han Park, Byung Geun Chae
  • Publication number: 20210383875
    Abstract: A memory device includes a voltage generator that provides a read voltage to a selected word line and provides a pass voltage to a plurality of unselected word lines, and a deterioration level detection circuit. The selected word line and the unselected word lines are connected to a plurality of memory cells. The deterioration level detection circuit detects a deterioration level of memory cells connected to the selected word line based on data of memory cells that receive the read voltage. The memory cells connected to the selected word line and the memory cells that receive the read voltage are included in the plurality of memory cells. The voltage generator changes the pass voltage provided to the unselected word lines based on the deterioration level.
    Type: Application
    Filed: August 20, 2021
    Publication date: December 9, 2021
    Inventors: HAN JUN LEE, SEUNG BUM KIM, IL HAN PARK
  • Patent number: 11183249
    Abstract: To program in a nonvolatile memory device, a memory block is provided with a plurality of sub blocks disposed in a vertical direction where the memory block includes a plurality of cell strings each including a plurality of memory cells connected in series and disposed in the vertical direction. A plurality of intermediate switching transistors are disposed in a boundary portion between two adjacent sub blocks in the vertical direction. Each of the plurality of intermediate switching transistors is selectively activated based on a program address during a program operation. The selectively activating each of the plurality of intermediate switching transistors includes selectively turning on one or more intermediate switching transistors in a selected cell string based on the program address.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: November 23, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chang-Yeon Yu, Kui-Han Ko, Il-Han Park, June-Hong Park, Joo-Yong Park, Joon-Young Park, Bong-Soon Lim
  • Patent number: 11171311
    Abstract: A display device capable of reducing a non-display area includes a substrate hole surrounded by light emitting elements, and a moisture penetration preventing layer disposed between an inner dam surrounded by the light emitting elements and the substrate hole. Accordingly, it is possible to prevent damage to light emitting stacks caused by external moisture or oxygen. Since the substrate hole is disposed within an active area, a reduction in non-display area is achieved.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: November 9, 2021
    Assignee: LG Display Co., Ltd.
    Inventors: Young-Wook Lee, Seon-Hui Hwang, Eun-Young Park, Yong-Su An, Woo-Chan Cho, Sun-Mi Lee, Jong-Han Park
  • Publication number: 20210343056
    Abstract: The present embodiment relates to a method for easier production of e-books with high text legibility, for minimizing the cost and labor required in service of the e-book-related content, and for reducing file size and increasing speed by eliminating unnecessary data in the production process, and to a computer program for the method.
    Type: Application
    Filed: August 30, 2018
    Publication date: November 4, 2021
    Inventor: Jong Han PARK
  • Publication number: 20210343824
    Abstract: A display device includes: a first substrate including a display area and a pad area; a second substrate facing the first substrate, a touch portion on the second substrate, a first flexible circuit board coupled to the first substrate, a second flexible circuit board coupled to the touch portion, a first adhesive layer on the first flexible circuit board, and a second adhesive layer that attaches the first adhesive layer and the second flexible circuit board to each other. The first adhesive layer and the second adhesive layer are formed of different materials from each other.
    Type: Application
    Filed: January 25, 2019
    Publication date: November 4, 2021
    Inventors: Sung-Gyu KIM, Jong Won MOON, Jong Han PARK, Min-Young SONG, Chanyoon WOO, Jungsoo YOUN