Patents by Inventor Han Wen

Han Wen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12388049
    Abstract: The present disclosure generally relates to stacked miniaturized electronic devices and methods of forming the same. More specifically, embodiments described herein relate to semiconductor device spacers and methods of forming the same. The semiconductor device spacers described herein may be utilized to form stacked semiconductor package assemblies, stacked PCB assemblies, and the like.
    Type: Grant
    Filed: July 27, 2023
    Date of Patent: August 12, 2025
    Assignee: Applied Materials, Inc.
    Inventors: Kurtis Leschkies, Han-Wen Chen, Steven Verhaverbeke, Giback Park, Kyuil Cho, Jeffrey L. Franklin, Wei-Sheng Lei
  • Patent number: 12388420
    Abstract: A noise filter circuit includes a filter and a transistor off-resistance control circuit. The filter includes a first transistor and a charge storage component. The first transistor has off-resistance when turned off or operated under sub-threshold region. A control terminal of the first transistor is not directly tied to a reference voltage, and is used to receive a first control voltage. The charge storage component has one terminal coupled to a connection terminal of the first transistor. The transistor off-resistance control circuit is coupled to the first transistor, and arranged to set the first control voltage for controlling the off-resistance of the first transistor.
    Type: Grant
    Filed: May 8, 2023
    Date of Patent: August 12, 2025
    Assignee: MEDIATEK INC.
    Inventors: Chuan-Hung Hsiao, Sung-Han Wen
  • Patent number: 12374611
    Abstract: The present disclosure relates to semiconductor core assemblies and methods of forming the same. The semiconductor core assemblies described herein may be utilized to form semiconductor package assemblies, PCB assemblies, PCB spacer assemblies, chip carrier assemblies, intermediate carrier assemblies (e.g., for graphics cards), and the like. In one embodiment, a silicon substrate core is structured by direct laser patterning. One or more conductive interconnections are formed in the substrate core and one or more redistribution layers are formed on surfaces thereof. The silicon substrate core may thereafter be utilized as a core structure for a semiconductor package, PCB, PCB spacer, chip carrier, intermediate carrier, or the like.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: July 29, 2025
    Assignee: Applied Materials, Inc.
    Inventors: Han-Wen Chen, Steven Verhaverbeke, Giback Park, Kyuil Cho, Kurtis Leschkies, Roman Gouk, Chintan Buch, Vincent Dicaprio, Bernhard Stonas, Jean Delmas
  • Patent number: 12354968
    Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.
    Type: Grant
    Filed: July 31, 2023
    Date of Patent: July 8, 2025
    Assignee: Applied Materials, Inc.
    Inventors: Han-Wen Chen, Steven Verhaverbeke, Guan Huei See, Giback Park, Giorgio Cellere, Diego Tonini, Vincent Dicaprio, Kyuil Cho
  • Publication number: 20250219583
    Abstract: The present invention provides a power amplifier system configured to receive an input audio signal to generate an output audio signal is disclosed. The power amplifier system includes a reference signal generator, a dynamic headroom generator and a DC-DC converter. The reference signal generator is configured to generate a reference signal according to the input signal. The dynamic headroom generator is configured to generate an output reference signal according to the reference signal and a change rate of a signal, wherein the signal is the reference signal, the input audio signal, or correlated with the reference signal or the input audio signal. The DC-DC converter is configured to generate a supply voltage to a power amplifier, wherein a voltage level of the supply voltage is determined according to the output reference signal, and the power amplifier is configured to generate the output audio signal according to the input audio signal.
    Type: Application
    Filed: December 5, 2024
    Publication date: July 3, 2025
    Applicant: MEDIATEK INC.
    Inventors: Yi-Wei Huang, Yi-Han Pan, Chun-Lung Chang, Sung-Han Wen, Kuan-Hung Chen, Chia-Feng Chiang, Kuan-Ta Chen
  • Patent number: 12339948
    Abstract: A method includes a computer receiving a request to conduct an interaction from a mobile device. The computer obtains a computer address and provides the computer address to the mobile device. The mobile device provides an access request to the computer address, and the access request is thereafter routed to an identity provider computer. The identity provider computer identifies identity data associated with the mobile device or a user of the mobile device. The computer obtains the identity data or a derivative of the identity data from the identity provider computer. The computer determines if the identity data or the derivative of the identity data matches previously stored identity data or a previously stored derivative of identity data. If a match is determined, the computer provides a list of user device identifiers to the mobile device.
    Type: Grant
    Filed: June 22, 2022
    Date of Patent: June 24, 2025
    Assignee: Visa International Service Association
    Inventors: Jalpesh Chitalia, Manoj Kannembath, Amit Kumar Gupta, Charmaine Han Wen Chan, Manjush Gopinatha Menon
  • Publication number: 20250192095
    Abstract: A method for fabricating a semiconductor package includes applying polymer-based solder paste onto a substrate; bringing a plurality of solder bumps on a semiconductor die into contact with the polymer-based solder paste on the substrate; reflowing the polymer-based solder paste to form a plurality of solder joints between the substrate and the semiconductor die, wherein a post-soldering residue is produced to encapsulate a lower portion of each solder joint; and applying an underfill between the substrate and the semiconductor die to encapsulate an upper portion of the solder joint.
    Type: Application
    Filed: November 27, 2024
    Publication date: June 12, 2025
    Inventors: KUAN-NENG CHEN, HAN-WEN HU, MING-WEI WENG
  • Publication number: 20250191621
    Abstract: A page buffer circuit adapted for a page-read device which including a memory array having several pages and several bit lines. The page buffer circuit comprises the following elements. First latches, receive a weight-vector from a corresponding one of the pages through the bit lines, and import an input-vector through a data input/output path. The weight-vector has a plurality of weight bit-data, and the input-vector has a plurality of input bit-data. Second latches, store the input bit-data of the input-vector. Logic operation units, coupled to the first latches to receive the weight bit-data, and coupled to the second latches to receive the input bit-data, perform a logic operation of the input bit-data and the weight bit-data to generate a logic operation result. The logic operation result is sent to one the first latches. A control circuit, selectively enables the logic operation units to perform the logic operation.
    Type: Application
    Filed: December 11, 2023
    Publication date: June 12, 2025
    Inventors: Bo-Rong LIN, Han-Wen HU, Yung-Chun LI, Huai-Mu WANG
  • Publication number: 20250183856
    Abstract: The present invention provides a multi-stage amplifier including at least one inter-stage amplifier, an output amplifier, a high-pass filter and a feedback amplifier is disclosed. The at least one inter-stage amplifier is configured to amplify an input signal to generate a signal. The output amplifier is configured to receive the signal to generate an output signal. The high-pass filter is configured to filter the signal and the output signal to generate a filtered signal and a filtered output signal, respectively. The feedback amplifier is configured to receive the filtered signal and the filtered output signal to generate a feedback signal to an input terminal of one of the at least one inter-stage amplifier and the output amplifier.
    Type: Application
    Filed: November 26, 2024
    Publication date: June 5, 2025
    Applicant: MEDIATEK INC.
    Inventors: You-Shin Chen, Sung-Han Wen, Ya-Chi Chen
  • Patent number: 12314261
    Abstract: A filtered search method, for performing a search within a data set, and the data set includes several data points. The filtered search method includes the following steps. Dividing the data set into several clusters based on a similarity of the data points. Dividing each of the clusters into an inlier part and an outlier part based on a distribution density of the data points. Performing a coarse search on all of the inlier parts, to filter out inlier parts of a first candidate number. Performing a fine search on the inlier parts of the first candidate number, to search data points of a second candidate number. Obtaining a search result based on the data points of the second candidate number, and the data points of the second candidate number are close to a target point.
    Type: Grant
    Filed: May 6, 2024
    Date of Patent: May 27, 2025
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Chih-Huai Shih, Han-Wen Hu, Huai-Mu Wang, Yung-Chun Li
  • Publication number: 20250157548
    Abstract: The disclosure discloses a memory device and an operation method thereof. A target memory cell and at least one replicated memory cell belonging to the same memory string are selected. A target weight value written into the target memory cell is replicated to the at least one replicated memory cell, wherein the target memory cell and the at least one replicated memory cell store the target weight value. In response to a command of reading or computing on the target memory cell received by the memory device, reading or computing is performed on the target memory cell and the at least one replicated memory cell simultaneously.
    Type: Application
    Filed: March 20, 2024
    Publication date: May 15, 2025
    Inventors: Huai-Mu WANG, Han-Wen HU, Yung-Chun LI, Chih-Chang HSIEH, Shang-Ting LIN
  • Publication number: 20250156420
    Abstract: A filtered search method, for performing a search within a data set, and the data set includes several data points. The filtered search method includes the following steps. Dividing the data set into several clusters based on a similarity of the data points. Dividing each of the clusters into an inlier part and an outlier part based on a distribution density of the data points. Performing a coarse search on all of the inlier parts, to filter out inlier parts of a first candidate number. Performing a fine search on the inlier parts of the first candidate number, to search data points of a second candidate number. Obtaining a search result based on the data points of the second candidate number, and the data points of the second candidate number are close to a target point.
    Type: Application
    Filed: May 6, 2024
    Publication date: May 15, 2025
    Inventors: Chih-Huai SHIH, Han-Wen HU, Huai-Mu WANG, Yung-Chun LI
  • Publication number: 20250158628
    Abstract: An analog-to-digital conversion device, includes the following elements. A sensing circuit, coupled to a bit line of a memory array, and used to sense a current in the bit line to generate a bit-sequence, the bit-sequence has a form of a thermometer code to represent an analog value. A latch logic circuit, including a plurality of latches and a plurality of logic circuits to form a page buffer of the memory array, and used to generate a bit-set according to the bit-sequence, the bit-set has a form of a binary code to represent a digital value. The latches and the logic circuits are used to perform a conversion process to convert the bit-sequence into the bit-set, and the conversion process has a bit width.
    Type: Application
    Filed: June 7, 2024
    Publication date: May 15, 2025
    Inventors: Han-Wen HU, Yung-Chun LI, Chih-Chang HSIEH, BO-RONG LIN, Huai-Mu WANG, Chih-Huai SHIH
  • Publication number: 20250157508
    Abstract: The application discloses a memory device and a computation method thereof. A plurality of weight data are stored in a plurality of first memory cells of the memory device. A plurality of input data are input via a plurality of string select lines. A plurality of memory cell currents are generated in the plurality of first memory cells based on the weight data and the input data. The memory cell currents are summed on a plurality of bit lines coupled to the plurality of string select lines to obtain a plurality of summed currents. The summed currents are converted into a plurality of analog-to-digital conversion results. The plurality of analog-to-digital conversion results are accumulated to obtain a computational result.
    Type: Application
    Filed: April 22, 2024
    Publication date: May 15, 2025
    Inventors: Huai-Mu WANG, Han-Wen HU, Yung-Chun LI, Bo-Rong LIN
  • Patent number: 12288282
    Abstract: This disclosure is directed to a method and apparatus for displaying an expression in a virtual scene. The method includes: displaying a virtual scene; displaying an expression selection region at a first target position in the virtual scene in response to a drag operation on an expression addition icon; and displaying the first target expression in the virtual scene in response to a selection operation on a first target expression in a plurality of first candidate expressions.
    Type: Grant
    Filed: October 24, 2022
    Date of Patent: April 29, 2025
    Assignee: Tencent Technology (Shenzhen) Company Limited
    Inventors: Lin Lin, Haohui Liang, Zixi Liu, Bokai Su, Shanshan Qian, Yiqi Li, Ya Zhang, Yinchao Chen, Han Wen
  • Publication number: 20250130613
    Abstract: An example folding device includes a first assembly; a second assembly; a hinge assembly comprising: a first gear defining a first gear axis; a first scoop receiver defining a first scoop axis; and a continuous display spanning the hinge assembly from the first assembly to the second assembly; and first assembly linkage components comprising: a first arm having a. medial end rotatably connected to the hinge assembly about the first gear axis and a lateral end slidably connected to the first assembly; and a first scoop having a. curved medial end that slides within the first scoop receiver about the first scoop axis and a lateral end rotatably connected to the first assembly about a first scoop rotating center.
    Type: Application
    Filed: May 30, 2023
    Publication date: April 24, 2025
    Inventors: Yongho Lim, Peiwen Hung, Han-Wen Yeh, Wen Shian Lin
  • Patent number: 12249520
    Abstract: A wet etch apparatus includes a wafer chuck, a dispensing nozzle, a liquid etchant container, and an electric field generator. The dispensing nozzle is above the wafer chuck. The liquid etchant container is in fluid communication with the dispensing nozzle. The electric field generator is operative to generate an electric field across the wafer chuck. The electric field generator includes a first electrode and a second electrode spaced apart from the first electrode in a direction substantially perpendicular to a top surface of the wafer chuck, and the second electrode is an electrode plate above the wafer chuck.
    Type: Grant
    Filed: August 28, 2021
    Date of Patent: March 11, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hong-Ting Lu, Han-Wen Liao
  • Publication number: 20250080128
    Abstract: A DAC cell circuit includes: at least a DAC cell, including: a first MOSFET having a drain coupled to a first switch for receiving a first current and coupled to a second switch for generating a second current, a source coupled to ground, and a gate coupled to a first bias voltage; a capacitor coupled between the gate and the drain of the first MOSFET; and a dead-band switch coupled between the gate of the first MOSFET and the bias node. The dead-band switch is controlled by a signal which is periodic with respect to a frequency equal to an input data rate of the DAC cell, and the dead-band switch is open during a data transition.
    Type: Application
    Filed: September 3, 2024
    Publication date: March 6, 2025
    Applicant: MEDIATEK INC.
    Inventors: SUJITH KUMAR BILLA, Sung-Han Wen
  • Publication number: 20250032924
    Abstract: In a method for controlling a virtual object in a virtual scene which is displayed by a first terminal. A first account is logged in to the first terminal. The virtual scene includes at least one first virtual object at a first position and that is associated with the first account. An interaction invitation interface is displayed. An interaction request is transmitted to at least one second terminal in response to a trigger operation for the interaction invitation interface. Each of the second terminal is associated with a different second account. Each of at least one second virtual object is controlled to interact with the at least one first virtual object in response to an interaction request and based on whether a distance between a second position of the respective second virtual object and the first position is less than a first distance threshold.
    Type: Application
    Filed: October 15, 2024
    Publication date: January 30, 2025
    Applicant: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Ya ZHANG, Han WEN, Yiqi LI, Yinchao CHEN, Xiyang ZHOU, Luyu SUN
  • Patent number: D1077785
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: June 3, 2025
    Assignee: Mous Products Ltd.
    Inventors: Thomas Han Wen Ting, Simon Holroyd, Daniel Richard Platt, Felix John William Church Crowther, Tobias Cedric Lane