Abstract: A method includes forming a dielectric layer over a contact pad of a device, forming a first polymer layer over the dielectric layer, forming a first conductive line and a first portion of a second conductive line over the first polymer layer, patterning a photoresist to form an opening over the first portion of the second conductive feature, wherein after patterning the photoresist the first conductive line remains covered by photoresist, forming a second portion of the second conductive line in the opening, wherein the second portion of the second conductive line physically contacts the first portion of the second conductive line, and forming a second polymer layer extending completely over the first conductive line and the second portion of the second conductive line.

Abstract: A memory device, includes a memory array for storing a plurality of vector data each of which has an MSB vector and a LSB vector. The memory array includes a plurality of memory units each of which has a first bit and a second bit. The first bit is used to store the MSB vector of each vector data, the second bit is used to store the LSB vector of each vector data. A bit line corresponding to each vector data executes one time of bit-line-setup, and reads the MSB vector and the LSB vector of each vector data according to the bit line. The threshold voltage distribution of each memory unit is divided into N states, where N is a positive integer and N is less than 2 to the power of 2, and the effective bit number stored by each memory unit is less than 2.

Abstract: An apparatus for hole drilling in a substrate is provided. The apparatus includes a laser system configured to apply a laser beam onto the substrate for removing material from a set of areas on the substrate by directing the laser beam onto predefined positions corresponding to the set of areas on the substrate in a sequence. The apparatus includes a ventilation system configured to produce a fluid flow along one or more sides of the substrate. The apparatus controls the laser beam such that the laser beam is sequentially positioned according to a first laser beam movement direction and a second laser beam movement direction.

Abstract: Disclosed are a method and system for transaction management, a network device, and a readable storage medium. The method includes the following. A coordinating node receives a structured query language (SQL) request externally initiated, where the SQL request is forwarded by a master node. The coordinating node decomposes the SQL request into sub-SQL (SubSQL) requests, and transmits each of the SubSQL requests to a corresponding slave node. Each slave node receives and processes a corresponding SubSQL request, transmits execution status information of the corresponding SubSQL request to the coordinating node and/or other slave nodes, and receives execution status information in processing respective SubSQL requests by the other slave nodes. Each particular slave node of one or more of the slave nodes feeds back a current local transaction status set of the particular slave node according to status query information received from the master node or the coordinating node.

Abstract: Embodiments of the present disclosure generally relate to planarization of surfaces on substrates and on layers formed on substrates. More specifically, embodiments of the present disclosure relate to planarization of surfaces on substrates for advanced packaging applications, such as surfaces of polymeric material layers. In one implementation, the method includes mechanically grinding a substrate surface against a polishing surface in the presence of a grinding slurry during a first polishing process to remove a portion of a material formed on the substrate; and then chemically mechanically polishing the substrate surface against the polishing surface in the presence of a polishing slurry during a second polishing process to reduce any roughness or unevenness caused by the first polishing process.

Abstract: Integrated fan-out packages and methods of forming the same are disclosed. An integrated fan-out package includes two dies, an encapsulant, a first metal line and a plurality of dummy vias. The encapsulant is disposed between the two dies. The first metal line is disposed over the two dies and the encapsulant, and electrically connected to the two dies. The plurality of dummy vias is disposed over the encapsulant and aside the first metal line.

Abstract: A detection system and method for the migrating cell is provided. The system is configured to detect a migrating cell combined with an immunomagnetic bead. The system includes a platform, a microchannel, a magnetic field source, a coherent light source and an optical sensing module. The microchannel is configured to allow the migrating cell to flow in it along a flow direction. The magnetic field source is configured to provide magnetic force to the migrating cell combined with the immunomagnetic bead. The magnetic force includes at least one magnetic force component and the magnetic force component is opposite to the flow direction of the microchannel. The coherent light source is configured to provide the microchannel with the coherent light. The optical sensing module is configured to receive the interference light caused by the coherent light being reflected by the sample inside the microchannel.

Abstract: Described herein are new methods for making lung bud organoids (LBOs) that have the capacity of developing into branching airways and alveolar structures that a least partially recapitulate human lung development from mammalian, preferably human, pluripotent stem cells including embryonic stem cells (ESCs) and induced pluripotent stem cells (IPSC), either by culturing branched LBO in a 3D matrix or by transplanting the LBO under the kidney capsule of immune deficient mice. Branched LBOs contain pulmonary endoderm and mesoderm compatible with pulmonary mesenchyme, and undergo branching morphogenesis. Also described are LBOs harboring certain mutations that induce a fibrotic phenotype, and methods of making same. The mutated (B)LBOs can be used for screening agents that may treat pulmonary fibrosis.

Abstract: A storage device and a data accessing method are disclosed, wherein the storage device includes a memory circuit and a control circuit. The memory circuit includes a plurality of multi-level cells, and each of the multi-level cells is configured to store at least a first bit, a second bit and a third bit in at least a first page, a second page and a third page. The control circuit is configured to read the first bits according to a one-time reading operation related to the first bits, read the second bits according to M-times reading operations related to the second bits, and read the third bits according to N-times reading operations related to the third bits, wherein the difference between M and N is less than or equal to one.

Abstract: A voltage controller of a display system includes a gate high voltage detector for detecting a gate high voltage, and a gate low voltage detector for detecting a gate low voltage. The gate high voltage and the gate low voltage are supplied to a gate driver, and the gate high voltage is greater than the gate low voltage.

Abstract: A digital-to-analog converter (DAC) includes a plurality of DAC cells, a mismatch error sorting circuit, and a dynamic element matching (DEM) circuit. The mismatch error sorting circuit generates a sorting result of the plurality of DAC cells according to mismatch error levels of the plurality of DAC cells. The DEM circuit shapes the mismatch error levels of the plurality of DAC cells according to the sorting result of the plurality of DAC cells.

Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.

Abstract: An embodiment of the present application provides a semiconductor device, including a substrate, a chip, a latch-up protection circuit, and a redistribution layer. The chip is on the substrate. The latch-up protection circuit is separated from the chip in a direction. The redistribution layer transmits a signal between the latch-up protection circuit and the chip.

Abstract: The present disclosure relates to semiconductor core assemblies and methods of forming the same. The semiconductor core assemblies described herein may be utilized to form semiconductor package assemblies, PCB assemblies, PCB spacer assemblies, chip carrier assemblies, intermediate carrier assemblies (e.g., for graphics cards), and the like. In one embodiment, a silicon substrate core is structured by direct laser patterning. One or more conductive interconnections are formed in the substrate core and one or more redistribution layers are formed on surfaces thereof. The silicon substrate core may thereafter be utilized as a core structure for a semiconductor package, PCB, PCB spacer, chip carrier, intermediate carrier, or the like.

Abstract: A method for arranging appointments in an appointment schedule is to be implemented by a computer storing data that includes a session including a plurality of time slots. The data further includes a plurality of cumulative values corresponding respectively to the time slots and a plurality of maximum values related respectively to the cumulative values. The method includes steps of: in response to receipt of a message for reserving a desired time slot selected from among the time slots, changing the cumulative value and the maximum value that correspond to the desired time slot respectively to a first value and a second value; and performing procedures to update the appointment data related to two groups of the time slots that are in the reservation session and that are respectively after the desired time slot and before the desired time slot.

Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.

Abstract: The present disclosure generally relates to stacked miniaturized electronic devices and methods of forming the same. More specifically, embodiments described herein relate to semiconductor device spacers and methods of forming the same. The semiconductor device spacers described herein may be utilized to form stacked semiconductor package assemblies, stacked PCB assemblies, and the like.

Abstract: The present disclosure relates to semiconductor core assemblies and methods of forming the same. The semiconductor core assemblies described herein may be utilized to form semiconductor package assemblies, PCB assemblies, PCB spacer assemblies, chip carrier assemblies, intermediate carrier assemblies (e.g., for graphics cards), and the like. In one embodiment, a silicon substrate core is structured by direct laser patterning. One or more conductive interconnections are formed in the substrate core and one or more redistribution layers are formed on surfaces thereof. The silicon substrate core may thereafter be utilized as a core structure for a semiconductor package, PCB, PCB spacer, chip carrier, intermediate carrier, or the like.

Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first die, having a first surface and an opposing second surface; a redistribution layer (RDL) having a surface, wherein the first surface of the first die is on and electrically coupled to the surface of the RDL by non-solder interconnects; and a second die at the second surface of the first die, wherein the second die is electrically coupled directly to the second surface of the first die by solder interconnects.

Abstract: A tri-level digital-to-analog converter (DAC) element includes a first DAC cell. The first DAC cell includes a first reference circuit, a second reference circuit, and a switch circuit. The first reference circuit provides a first reference signal. The second reference circuit provides a second reference signal. The first switch circuit receives a control input from an input port of the tri-level DAC element, and controls interconnection between the first reference circuit, the second reference circuit, and an output port of the tri-level DAC element according to the control input. During a period in which the tri-level DAC element operates in a “0” state, the first switch circuit is arranged to couple at least one of the first reference circuit and the second reference circuit to the output port of the tri-level DAC element.